1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* 2 /*
3 * Copyright (C) 2007 Krzysztof Halasa <khc@pm 3 * Copyright (C) 2007 Krzysztof Halasa <khc@pm.waw.pl>
4 */ 4 */
5 5
6 #ifndef IXP4XX_QMGR_H 6 #ifndef IXP4XX_QMGR_H
7 #define IXP4XX_QMGR_H 7 #define IXP4XX_QMGR_H
8 8
9 #include <linux/io.h> 9 #include <linux/io.h>
10 #include <linux/kernel.h> 10 #include <linux/kernel.h>
11 11
12 #define DEBUG_QMGR 0 12 #define DEBUG_QMGR 0
13 13
14 #define HALF_QUEUES 32 14 #define HALF_QUEUES 32
15 #define QUEUES 64 15 #define QUEUES 64
16 #define MAX_QUEUE_LENGTH 4 /* in dwords * 16 #define MAX_QUEUE_LENGTH 4 /* in dwords */
17 17
18 #define QUEUE_STAT1_EMPTY 1 /* q 18 #define QUEUE_STAT1_EMPTY 1 /* queue status bits */
19 #define QUEUE_STAT1_NEARLY_EMPTY 2 19 #define QUEUE_STAT1_NEARLY_EMPTY 2
20 #define QUEUE_STAT1_NEARLY_FULL 4 20 #define QUEUE_STAT1_NEARLY_FULL 4
21 #define QUEUE_STAT1_FULL 8 21 #define QUEUE_STAT1_FULL 8
22 #define QUEUE_STAT2_UNDERFLOW 1 22 #define QUEUE_STAT2_UNDERFLOW 1
23 #define QUEUE_STAT2_OVERFLOW 2 23 #define QUEUE_STAT2_OVERFLOW 2
24 24
25 #define QUEUE_WATERMARK_0_ENTRIES 0 25 #define QUEUE_WATERMARK_0_ENTRIES 0
26 #define QUEUE_WATERMARK_1_ENTRY 1 26 #define QUEUE_WATERMARK_1_ENTRY 1
27 #define QUEUE_WATERMARK_2_ENTRIES 2 27 #define QUEUE_WATERMARK_2_ENTRIES 2
28 #define QUEUE_WATERMARK_4_ENTRIES 3 28 #define QUEUE_WATERMARK_4_ENTRIES 3
29 #define QUEUE_WATERMARK_8_ENTRIES 4 29 #define QUEUE_WATERMARK_8_ENTRIES 4
30 #define QUEUE_WATERMARK_16_ENTRIES 5 30 #define QUEUE_WATERMARK_16_ENTRIES 5
31 #define QUEUE_WATERMARK_32_ENTRIES 6 31 #define QUEUE_WATERMARK_32_ENTRIES 6
32 #define QUEUE_WATERMARK_64_ENTRIES 7 32 #define QUEUE_WATERMARK_64_ENTRIES 7
33 33
34 /* queue interrupt request conditions */ 34 /* queue interrupt request conditions */
35 #define QUEUE_IRQ_SRC_EMPTY 0 35 #define QUEUE_IRQ_SRC_EMPTY 0
36 #define QUEUE_IRQ_SRC_NEARLY_EMPTY 1 36 #define QUEUE_IRQ_SRC_NEARLY_EMPTY 1
37 #define QUEUE_IRQ_SRC_NEARLY_FULL 2 37 #define QUEUE_IRQ_SRC_NEARLY_FULL 2
38 #define QUEUE_IRQ_SRC_FULL 3 38 #define QUEUE_IRQ_SRC_FULL 3
39 #define QUEUE_IRQ_SRC_NOT_EMPTY 4 39 #define QUEUE_IRQ_SRC_NOT_EMPTY 4
40 #define QUEUE_IRQ_SRC_NOT_NEARLY_EMPTY 5 40 #define QUEUE_IRQ_SRC_NOT_NEARLY_EMPTY 5
41 #define QUEUE_IRQ_SRC_NOT_NEARLY_FULL 6 41 #define QUEUE_IRQ_SRC_NOT_NEARLY_FULL 6
42 #define QUEUE_IRQ_SRC_NOT_FULL 7 42 #define QUEUE_IRQ_SRC_NOT_FULL 7
43 43
44 struct qmgr_regs { 44 struct qmgr_regs {
45 u32 acc[QUEUES][MAX_QUEUE_LENGTH]; /* 45 u32 acc[QUEUES][MAX_QUEUE_LENGTH]; /* 0x000 - 0x3FF */
46 u32 stat1[4]; /* 0x400 - 0x4 46 u32 stat1[4]; /* 0x400 - 0x40F */
47 u32 stat2[2]; /* 0x410 - 0x4 47 u32 stat2[2]; /* 0x410 - 0x417 */
48 u32 statne_h; /* 0x418 - que 48 u32 statne_h; /* 0x418 - queue nearly empty */
49 u32 statf_h; /* 0x41C - que 49 u32 statf_h; /* 0x41C - queue full */
50 u32 irqsrc[4]; /* 0x420 - 0x4 50 u32 irqsrc[4]; /* 0x420 - 0x42F IRC source */
51 u32 irqen[2]; /* 0x430 - 0x4 51 u32 irqen[2]; /* 0x430 - 0x437 IRQ enabled */
52 u32 irqstat[2]; /* 0x438 - 0x4 52 u32 irqstat[2]; /* 0x438 - 0x43F - IRQ access only */
53 u32 reserved[1776]; 53 u32 reserved[1776];
54 u32 sram[2048]; /* 0x2000 - 0x 54 u32 sram[2048]; /* 0x2000 - 0x3FFF - config and buffer */
55 }; 55 };
56 56
57 void qmgr_put_entry(unsigned int queue, u32 va 57 void qmgr_put_entry(unsigned int queue, u32 val);
58 u32 qmgr_get_entry(unsigned int queue); 58 u32 qmgr_get_entry(unsigned int queue);
59 int qmgr_stat_empty(unsigned int queue); 59 int qmgr_stat_empty(unsigned int queue);
60 int qmgr_stat_below_low_watermark(unsigned int 60 int qmgr_stat_below_low_watermark(unsigned int queue);
61 int qmgr_stat_full(unsigned int queue); 61 int qmgr_stat_full(unsigned int queue);
62 int qmgr_stat_overflow(unsigned int queue); 62 int qmgr_stat_overflow(unsigned int queue);
63 void qmgr_release_queue(unsigned int queue); 63 void qmgr_release_queue(unsigned int queue);
64 void qmgr_set_irq(unsigned int queue, int src, 64 void qmgr_set_irq(unsigned int queue, int src,
65 void (*handler)(void *pdev), 65 void (*handler)(void *pdev), void *pdev);
66 void qmgr_enable_irq(unsigned int queue); 66 void qmgr_enable_irq(unsigned int queue);
67 void qmgr_disable_irq(unsigned int queue); 67 void qmgr_disable_irq(unsigned int queue);
68 68
69 /* request_ and release_queue() must be called 69 /* request_ and release_queue() must be called from non-IRQ context */
70 70
71 #if DEBUG_QMGR 71 #if DEBUG_QMGR
72 extern char qmgr_queue_descs[QUEUES][32]; 72 extern char qmgr_queue_descs[QUEUES][32];
73 73
74 int qmgr_request_queue(unsigned int queue, uns 74 int qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
75 unsigned int nearly_emp 75 unsigned int nearly_empty_watermark,
76 unsigned int nearly_ful 76 unsigned int nearly_full_watermark,
77 const char *desc_format 77 const char *desc_format, const char* name);
78 #else 78 #else
79 int __qmgr_request_queue(unsigned int queue, u 79 int __qmgr_request_queue(unsigned int queue, unsigned int len /* dwords */,
80 unsigned int nearly_e 80 unsigned int nearly_empty_watermark,
81 unsigned int nearly_f 81 unsigned int nearly_full_watermark);
82 #define qmgr_request_queue(queue, len, nearly_ 82 #define qmgr_request_queue(queue, len, nearly_empty_watermark, \
83 nearly_full_waterma 83 nearly_full_watermark, desc_format, name) \
84 __qmgr_request_queue(queue, len, nearl 84 __qmgr_request_queue(queue, len, nearly_empty_watermark, \
85 nearly_full_water 85 nearly_full_watermark)
86 #endif 86 #endif
87 87
88 #endif 88 #endif
89 89
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