1 /* SPDX-License-Identifier: GPL-2.0-only */ <<
2 /* 1 /*
3 * Freescale DSPI controller driver 2 * Freescale DSPI controller driver
4 * 3 *
5 * Copyright (c) 2017 Angelo Dureghello <angel 4 * Copyright (c) 2017 Angelo Dureghello <angelo@sysam.it>
>> 5 *
>> 6 * This program is free software; you can redistribute it and/or modify
>> 7 * it under the terms of the GNU General Public License version 2 as
>> 8 * published by the Free Software Foundation.
>> 9 *
>> 10 * This program is distributed in the hope that it will be useful,
>> 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> 13 * GNU General Public License for more details.
6 */ 14 */
7 15
8 #ifndef SPI_FSL_DSPI_HEADER_H 16 #ifndef SPI_FSL_DSPI_HEADER_H
9 #define SPI_FSL_DSPI_HEADER_H 17 #define SPI_FSL_DSPI_HEADER_H
10 18
11 /** 19 /**
12 * struct fsl_dspi_platform_data - platform da 20 * struct fsl_dspi_platform_data - platform data for the Freescale DSPI driver
13 * @bus_num: board specific identifier for thi 21 * @bus_num: board specific identifier for this DSPI driver.
14 * @cs_num: number of chip selects supported b 22 * @cs_num: number of chip selects supported by this DSPI driver.
15 */ 23 */
16 struct fsl_dspi_platform_data { 24 struct fsl_dspi_platform_data {
17 u32 cs_num; 25 u32 cs_num;
18 u32 bus_num; 26 u32 bus_num;
19 u32 sck_cs_delay; 27 u32 sck_cs_delay;
20 u32 cs_sck_delay; 28 u32 cs_sck_delay;
21 }; 29 };
22 30
23 #endif /* SPI_FSL_DSPI_HEADER_H */ 31 #endif /* SPI_FSL_DSPI_HEADER_H */
24 32
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