1 /* SPDX-License-Identifier: GPL-2.0 */ 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* 2 /*
3 * Platform data for the chipidea USB dual rol 3 * Platform data for the chipidea USB dual role controller
4 */ 4 */
5 5
6 #ifndef __LINUX_USB_CHIPIDEA_H 6 #ifndef __LINUX_USB_CHIPIDEA_H
7 #define __LINUX_USB_CHIPIDEA_H 7 #define __LINUX_USB_CHIPIDEA_H
8 8
9 #include <linux/extcon.h> 9 #include <linux/extcon.h>
10 #include <linux/usb/otg.h> 10 #include <linux/usb/otg.h>
11 11
12 struct ci_hdrc; 12 struct ci_hdrc;
13 13
14 /** 14 /**
15 * struct ci_hdrc_cable - structure for extern 15 * struct ci_hdrc_cable - structure for external connector cable state tracking
16 * @connected: true if cable is connected, fal 16 * @connected: true if cable is connected, false otherwise
17 * @changed: set to true when extcon event hap 17 * @changed: set to true when extcon event happen
18 * @enabled: set to true if we've enabled the 18 * @enabled: set to true if we've enabled the vbus or id interrupt
19 * @edev: device which generate events 19 * @edev: device which generate events
20 * @ci: driver state of the chipidea device 20 * @ci: driver state of the chipidea device
21 * @nb: hold event notification callback 21 * @nb: hold event notification callback
22 * @conn: used for notification registration 22 * @conn: used for notification registration
23 */ 23 */
24 struct ci_hdrc_cable { 24 struct ci_hdrc_cable {
25 bool connec 25 bool connected;
26 bool change 26 bool changed;
27 bool enable 27 bool enabled;
28 struct extcon_dev *edev; 28 struct extcon_dev *edev;
29 struct ci_hdrc *ci; 29 struct ci_hdrc *ci;
30 struct notifier_block nb; 30 struct notifier_block nb;
31 }; 31 };
32 32
33 struct ci_hdrc_platform_data { 33 struct ci_hdrc_platform_data {
34 const char *name; 34 const char *name;
35 /* offset of the capability registers 35 /* offset of the capability registers */
36 uintptr_t capoffset; 36 uintptr_t capoffset;
37 unsigned power_budget; 37 unsigned power_budget;
38 struct phy *phy; 38 struct phy *phy;
39 /* old usb_phy interface */ 39 /* old usb_phy interface */
40 struct usb_phy *usb_phy; 40 struct usb_phy *usb_phy;
41 enum usb_phy_interface phy_mode; 41 enum usb_phy_interface phy_mode;
42 unsigned long flags; 42 unsigned long flags;
43 #define CI_HDRC_REGS_SHARED BIT(0) 43 #define CI_HDRC_REGS_SHARED BIT(0)
44 #define CI_HDRC_DISABLE_DEVICE_STREAMING 44 #define CI_HDRC_DISABLE_DEVICE_STREAMING BIT(1)
45 #define CI_HDRC_SUPPORTS_RUNTIME_PM BIT(2) 45 #define CI_HDRC_SUPPORTS_RUNTIME_PM BIT(2)
46 #define CI_HDRC_DISABLE_HOST_STREAMING BIT(3) 46 #define CI_HDRC_DISABLE_HOST_STREAMING BIT(3)
47 #define CI_HDRC_DISABLE_STREAMING (CI_HDRC_DIS 47 #define CI_HDRC_DISABLE_STREAMING (CI_HDRC_DISABLE_DEVICE_STREAMING | \
48 CI_HDRC_DISABLE_HOST_STREAMING 48 CI_HDRC_DISABLE_HOST_STREAMING)
49 /* 49 /*
50 * Only set it when DCCPARAMS.DC==1 an 50 * Only set it when DCCPARAMS.DC==1 and DCCPARAMS.HC==1,
51 * but otg is not supported (no regist 51 * but otg is not supported (no register otgsc).
52 */ 52 */
53 #define CI_HDRC_DUAL_ROLE_NOT_OTG BIT(4) 53 #define CI_HDRC_DUAL_ROLE_NOT_OTG BIT(4)
54 #define CI_HDRC_IMX28_WRITE_FIX BIT(5) 54 #define CI_HDRC_IMX28_WRITE_FIX BIT(5)
55 #define CI_HDRC_FORCE_FULLSPEED BIT(6) 55 #define CI_HDRC_FORCE_FULLSPEED BIT(6)
56 #define CI_HDRC_TURN_VBUS_EARLY_ON BIT(7) 56 #define CI_HDRC_TURN_VBUS_EARLY_ON BIT(7)
57 #define CI_HDRC_SET_NON_ZERO_TTHA BIT(8) 57 #define CI_HDRC_SET_NON_ZERO_TTHA BIT(8)
58 #define CI_HDRC_OVERRIDE_AHB_BURST BIT(9) 58 #define CI_HDRC_OVERRIDE_AHB_BURST BIT(9)
59 #define CI_HDRC_OVERRIDE_TX_BURST BIT(10 59 #define CI_HDRC_OVERRIDE_TX_BURST BIT(10)
60 #define CI_HDRC_OVERRIDE_RX_BURST BIT(11 60 #define CI_HDRC_OVERRIDE_RX_BURST BIT(11)
61 #define CI_HDRC_OVERRIDE_PHY_CONTROL BIT(12 61 #define CI_HDRC_OVERRIDE_PHY_CONTROL BIT(12) /* Glue layer manages phy */
62 #define CI_HDRC_REQUIRES_ALIGNED_DMA BIT(13 62 #define CI_HDRC_REQUIRES_ALIGNED_DMA BIT(13)
63 #define CI_HDRC_IMX_IS_HSIC BIT(14 63 #define CI_HDRC_IMX_IS_HSIC BIT(14)
64 #define CI_HDRC_PMQOS BIT(15 64 #define CI_HDRC_PMQOS BIT(15)
65 #define CI_HDRC_PHY_VBUS_CONTROL BIT(16 65 #define CI_HDRC_PHY_VBUS_CONTROL BIT(16)
66 #define CI_HDRC_HAS_PORTSC_PEC_MISSED BIT(17 66 #define CI_HDRC_HAS_PORTSC_PEC_MISSED BIT(17)
67 #define CI_HDRC_FORCE_VBUS_ACTIVE_ALWAYS 67 #define CI_HDRC_FORCE_VBUS_ACTIVE_ALWAYS BIT(18)
68 enum usb_dr_mode dr_mode; 68 enum usb_dr_mode dr_mode;
69 #define CI_HDRC_CONTROLLER_RESET_EVENT 69 #define CI_HDRC_CONTROLLER_RESET_EVENT 0
70 #define CI_HDRC_CONTROLLER_STOPPED_EVENT 70 #define CI_HDRC_CONTROLLER_STOPPED_EVENT 1
71 #define CI_HDRC_IMX_HSIC_ACTIVE_EVENT 71 #define CI_HDRC_IMX_HSIC_ACTIVE_EVENT 2
72 #define CI_HDRC_IMX_HSIC_SUSPEND_EVENT 72 #define CI_HDRC_IMX_HSIC_SUSPEND_EVENT 3
73 #define CI_HDRC_CONTROLLER_VBUS_EVENT 73 #define CI_HDRC_CONTROLLER_VBUS_EVENT 4
74 int (*notify_event) (struct ci_hdr 74 int (*notify_event) (struct ci_hdrc *ci, unsigned event);
75 struct regulator *reg_vbus; 75 struct regulator *reg_vbus;
76 struct usb_otg_caps ci_otg_caps; 76 struct usb_otg_caps ci_otg_caps;
77 bool tpl_support; 77 bool tpl_support;
78 /* interrupt threshold setting */ 78 /* interrupt threshold setting */
79 u32 itc_setting; 79 u32 itc_setting;
80 u32 ahb_burst_conf 80 u32 ahb_burst_config;
81 u32 tx_burst_size; 81 u32 tx_burst_size;
82 u32 rx_burst_size; 82 u32 rx_burst_size;
83 83
84 /* VBUS and ID signal state tracking, 84 /* VBUS and ID signal state tracking, using extcon framework */
85 struct ci_hdrc_cable vbus_e 85 struct ci_hdrc_cable vbus_extcon;
86 struct ci_hdrc_cable id_ext 86 struct ci_hdrc_cable id_extcon;
87 u32 phy_clkgate_de 87 u32 phy_clkgate_delay_us;
88 88
89 /* pins */ 89 /* pins */
90 struct pinctrl *pctl; 90 struct pinctrl *pctl;
91 struct pinctrl_state *pins_default; 91 struct pinctrl_state *pins_default;
92 struct pinctrl_state *pins_host; 92 struct pinctrl_state *pins_host;
93 struct pinctrl_state *pins_device; 93 struct pinctrl_state *pins_device;
94 94
95 /* platform-specific hooks */ 95 /* platform-specific hooks */
96 int (*hub_control)(struct ci_hdrc *ci, 96 int (*hub_control)(struct ci_hdrc *ci, u16 typeReq, u16 wValue,
97 u16 wIndex, char *b 97 u16 wIndex, char *buf, u16 wLength,
98 bool *done, unsigne 98 bool *done, unsigned long *flags);
99 void (*enter_lpm)(struct ci_hdrc *ci, 99 void (*enter_lpm)(struct ci_hdrc *ci, bool enable);
100 }; 100 };
101 101
102 /* Default offset of capability registers */ 102 /* Default offset of capability registers */
103 #define DEF_CAPOFFSET 0x100 103 #define DEF_CAPOFFSET 0x100
104 104
105 /* Add ci hdrc device */ 105 /* Add ci hdrc device */
106 struct platform_device *ci_hdrc_add_device(str 106 struct platform_device *ci_hdrc_add_device(struct device *dev,
107 struct resource *res, 107 struct resource *res, int nres,
108 struct ci_hdrc_platfor 108 struct ci_hdrc_platform_data *platdata);
109 /* Remove ci hdrc device */ 109 /* Remove ci hdrc device */
110 void ci_hdrc_remove_device(struct platform_dev 110 void ci_hdrc_remove_device(struct platform_device *pdev);
111 /* Get current available role */ 111 /* Get current available role */
112 enum usb_dr_mode ci_hdrc_query_available_role( 112 enum usb_dr_mode ci_hdrc_query_available_role(struct platform_device *pdev);
113 113
114 #endif 114 #endif
115 115
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