1 // SPDX-License-Identifier: GPL-2.0+ 1
2 /*
3 * USB 338x super/high/full speed USB device c
4 * Unlike many such controllers, this one talk
5 *
6 * Copyright (C) 2002 NetChip Technology, Inc.
7 * Copyright (C) 2003 David Brownell
8 * Copyright (C) 2014 Ricardo Ribalda - Qtechn
9 */
10
11 #ifndef __LINUX_USB_USB338X_H
12 #define __LINUX_USB_USB338X_H
13
14 #include <linux/usb/net2280.h>
15
16 /*
17 * Extra defined bits for net2280 registers
18 */
19 #define SCRATCH
20
21 #define DEFECT7374_FSM_FIELD
22 #define SUPER_SPEED
23 #define DMA_REQUEST_OUTSTANDING
24 #define DMA_PAUSE_DONE_INTERRUPT
25 #define SET_ISOCHRONOUS_DELAY
26 #define SET_SEL
27 #define SUPER_SPEED_MODE
28
29 /*ep_cfg*/
30 #define MAX_BURST_SIZE
31 #define EP_FIFO_BYTE_COUNT
32 #define IN_ENDPOINT_ENABLE
33 #define IN_ENDPOINT_TYPE
34 #define OUT_ENDPOINT_ENABLE
35 #define OUT_ENDPOINT_TYPE
36 #define USB3380_EP_CFG_MASK_IN ((0x3 << IN_END
37 BIT(IN_ENDPOIN
38 #define USB3380_EP_CFG_MASK_OUT ((0x3 << OUT_E
39 BIT(OUT_ENDPOI
40
41 struct usb338x_usb_ext_regs {
42 u32 usbclass;
43 #define DEVICE_PROTOCOL
44 #define DEVICE_SUB_CLASS
45 #define DEVICE_CLASS
46 u32 ss_sel;
47 #define U2_SYSTEM_EXIT_LATENCY
48 #define U1_SYSTEM_EXIT_LATENCY
49 u32 ss_del;
50 #define U2_DEVICE_EXIT_LATENCY
51 #define U1_DEVICE_EXIT_LATENCY
52 u32 usb2lpm;
53 #define USB_L1_LPM_HIRD
54 #define USB_L1_LPM_REMOTE_WAKE
55 #define USB_L1_LPM_SUPPORT
56 u32 usb3belt;
57 #define BELT_MULTIPLIER
58 #define BEST_EFFORT_LATENCY_TOLERANCE
59 u32 usbctl2;
60 #define LTM_ENABLE
61 #define U2_ENABLE
62 #define U1_ENABLE
63 #define FUNCTION_SUSPEND
64 #define USB3_CORE_ENABLE
65 #define USB2_CORE_ENABLE
66 #define SERIAL_NUMBER_STRING_ENABLE
67 u32 in_timeout;
68 #define GPEP3_TIMEOUT
69 #define GPEP2_TIMEOUT
70 #define GPEP1_TIMEOUT
71 #define GPEP0_TIMEOUT
72 #define GPEP3_TIMEOUT_VALUE
73 #define GPEP3_TIMEOUT_ENABLE
74 #define GPEP2_TIMEOUT_VALUE
75 #define GPEP2_TIMEOUT_ENABLE
76 #define GPEP1_TIMEOUT_VALUE
77 #define GPEP1_TIMEOUT_ENABLE
78 #define GPEP0_TIMEOUT_VALUE
79 #define GPEP0_TIMEOUT_ENABLE
80 u32 isodelay;
81 #define ISOCHRONOUS_DELAY
82 } __packed;
83
84 struct usb338x_fifo_regs {
85 /* offset 0x0500, 0x0520, 0x0540, 0x05
86 u32 ep_fifo_size_base;
87 #define IN_FIFO_BASE_ADDRESS
88 #define IN_FIFO_SIZE
89 #define OUT_FIFO_BASE_ADDRESS
90 #define OUT_FIFO_SIZE
91 u32 ep_fifo_out_wrptr;
92 u32 ep_fifo_out_rdptr;
93 u32 ep_fifo_in_wrptr;
94 u32 ep_fifo_in_rdptr;
95 u32 unused[3];
96 } __packed;
97
98
99 /* Link layer */
100 struct usb338x_ll_regs {
101 /* offset 0x700 */
102 u32 ll_ltssm_ctrl1;
103 u32 ll_ltssm_ctrl2;
104 u32 ll_ltssm_ctrl3;
105 u32 unused1;
106
107 /* 0x710 */
108 u32 unused2;
109 u32 ll_general_ctrl0;
110 u32 ll_general_ctrl1;
111 #define PM_U3_AUTO_EXIT
112 #define PM_U2_AUTO_EXIT
113 #define PM_U1_AUTO_EXIT
114 #define PM_FORCE_U2_ENTRY
115 #define PM_FORCE_U1_ENTRY
116 #define PM_LGO_COLLISION_SEND_LAU
117 #define PM_DIR_LINK_REJECT
118 #define PM_FORCE_LINK_ACCEPT
119 #define PM_DIR_ENTRY_U3
120 #define PM_DIR_ENTRY_U2
121 #define PM_DIR_ENTRY_U1
122 #define PM_U2_ENABLE
123 #define PM_U1_ENABLE
124 #define SKP_THRESHOLD_ADJUST_FMW
125 #define RESEND_DPP_ON_LRTY_FMW
126 #define DL_BIT_VALUE_FMW
127 #define FORCE_DL_BIT
128 u32 ll_general_ctrl2;
129 #define SELECT_INVERT_LANE_POLARITY
130 #define FORCE_INVERT_LANE_POLARITY
131
132 /* 0x720 */
133 u32 ll_general_ctrl3;
134 u32 ll_general_ctrl4;
135 u32 ll_error_gen;
136 u32 unused3;
137
138 /* 0x730 */
139 u32 unused4[4];
140
141 /* 0x740 */
142 u32 unused5[2];
143 u32 ll_lfps_5;
144 #define TIMER_LFPS_6US
145 u32 ll_lfps_6;
146 #define TIMER_LFPS_80US
147
148 /* 0x750 */
149 u32 unused6[8];
150
151 /* 0x770 */
152 u32 unused7[3];
153 u32 ll_tsn_counters_2;
154 #define HOT_TX_NORESET_TS2
155
156 /* 0x780 */
157 u32 ll_tsn_counters_3;
158 #define HOT_RX_RESET_TS2
159 u32 unused8[3];
160
161 /* 0x790 */
162 u32 unused9;
163 u32 ll_lfps_timers_2;
164 #define LFPS_TIMERS_2_WORKAROUND_VALUE
165 u32 unused10;
166 u32 ll_tsn_chicken_bit;
167 #define RECOVERY_IDLE_TO_RECOVER_FMW
168 } __packed;
169
170 /* protocol layer */
171 struct usb338x_pl_regs {
172 /* offset 0x800 */
173 u32 pl_reg_1;
174 u32 pl_reg_2;
175 u32 pl_reg_3;
176 u32 pl_reg_4;
177 u32 pl_ep_ctrl;
178 /* Protocol Layer Endpoint Control*/
179 #define PL_EP_CTRL
180 #define ENDPOINT_SELECT
181 /* [4:0] */
182 #define EP_INITIALIZED
183 #define SEQUENCE_NUMBER_RESET
184 #define CLEAR_ACK_ERROR_CODE
185 u32 pl_reg_6;
186 u32 pl_reg_7;
187 u32 pl_reg_8;
188 u32 pl_ep_status_1;
189 /* Protocol Layer Endpoint Status 1*/
190 #define PL_EP_STATUS_1
191 #define STATE
192 #define ACK_GOOD_NORMAL
193 #define ACK_GOOD_MORE_ACKS_TO_COME
194 u32 pl_ep_status_2;
195 u32 pl_ep_status_3;
196 /* Protocol Layer Endpoint Status 3*/
197 #define PL_EP_STATUS_3
198 #define SEQUENCE_NUMBER
199 u32 pl_ep_status_4;
200 /* Protocol Layer Endpoint Status 4*/
201 #define PL_EP_STATUS_4
202 u32 pl_ep_cfg_4;
203 /* Protocol Layer Endpoint Configurati
204 #define PL_EP_CFG_4
205 #define NON_CTRL_IN_TOLERATE_BAD_DIR
206 } __packed;
207
208 #endif /* __LINUX_USB_USB338X_H */
209
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.