1 /* SPDX-License-Identifier: GPL-2.0 */ << 2 /* Miscellaneous definitions for VIA chipsets 1 /* Miscellaneous definitions for VIA chipsets 3 Currently used only by drivers/parport/parp 2 Currently used only by drivers/parport/parport_pc.c */ 4 3 5 /* Values for SuperIO function select configur 4 /* Values for SuperIO function select configuration register */ 6 #define VIA_FUNCTION_PARPORT_SPP 0x00 5 #define VIA_FUNCTION_PARPORT_SPP 0x00 7 #define VIA_FUNCTION_PARPORT_ECP 0x01 6 #define VIA_FUNCTION_PARPORT_ECP 0x01 8 #define VIA_FUNCTION_PARPORT_EPP 0x02 7 #define VIA_FUNCTION_PARPORT_EPP 0x02 9 #define VIA_FUNCTION_PARPORT_DISABLE 0x03 8 #define VIA_FUNCTION_PARPORT_DISABLE 0x03 10 #define VIA_FUNCTION_PROBE 0xFF /* S 9 #define VIA_FUNCTION_PROBE 0xFF /* Special magic value to be used in code, not to be written into chip */ 11 10 12 /* Bits for parallel port mode configuration r 11 /* Bits for parallel port mode configuration register */ 13 #define VIA_PARPORT_ECPEPP 0X20 12 #define VIA_PARPORT_ECPEPP 0X20 14 #define VIA_PARPORT_BIDIR 0x80 13 #define VIA_PARPORT_BIDIR 0x80 15 14 16 /* VIA configuration registers */ 15 /* VIA configuration registers */ 17 #define VIA_CONFIG_INDEX 0x3F0 16 #define VIA_CONFIG_INDEX 0x3F0 18 #define VIA_CONFIG_DATA 0x3F1 17 #define VIA_CONFIG_DATA 0x3F1 19 18 20 /* Mask for parallel port IRQ bits (in ISA PnP 19 /* Mask for parallel port IRQ bits (in ISA PnP IRQ routing register 1) */ 21 #define VIA_IRQCONTROL_PARALLEL 0xF0 20 #define VIA_IRQCONTROL_PARALLEL 0xF0 22 /* Mask for parallel port DMA bits (in ISA PnP 21 /* Mask for parallel port DMA bits (in ISA PnP DMA routing register) */ 23 #define VIA_DMACONTROL_PARALLEL 0x0C 22 #define VIA_DMACONTROL_PARALLEL 0x0C 24 23
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