1 /* SPDX-License-Identifier: GPL-2.0 */ << 2 #ifndef MT9P031_H 1 #ifndef MT9P031_H 3 #define MT9P031_H 2 #define MT9P031_H 4 3 5 struct v4l2_subdev; 4 struct v4l2_subdev; 6 5 7 /* 6 /* 8 * struct mt9p031_platform_data - MT9P031 plat 7 * struct mt9p031_platform_data - MT9P031 platform data 9 * @ext_freq: Input clock frequency 8 * @ext_freq: Input clock frequency 10 * @target_freq: Pixel clock frequency 9 * @target_freq: Pixel clock frequency 11 */ 10 */ 12 struct mt9p031_platform_data { 11 struct mt9p031_platform_data { 13 unsigned int pixclk_pol:1; << 14 int ext_freq; 12 int ext_freq; 15 int target_freq; 13 int target_freq; 16 }; 14 }; 17 15 18 #endif 16 #endif 19 17
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