1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* 2 /*
3 * Copyright (C) 2024 Intel Corporation 3 * Copyright (C) 2024 Intel Corporation
4 */ 4 */
5 5
6 #ifndef __IPU6_PCI_TBL_H__ 6 #ifndef __IPU6_PCI_TBL_H__
7 #define __IPU6_PCI_TBL_H__ 7 #define __IPU6_PCI_TBL_H__
8 8
9 #include <linux/pci.h> 9 #include <linux/pci.h>
10 10
11 #define PCI_DEVICE_ID_INTEL_IPU6 11 #define PCI_DEVICE_ID_INTEL_IPU6 0x9a19
12 #define PCI_DEVICE_ID_INTEL_IPU6SE 12 #define PCI_DEVICE_ID_INTEL_IPU6SE 0x4e19
13 #define PCI_DEVICE_ID_INTEL_IPU6EP_ADLP 13 #define PCI_DEVICE_ID_INTEL_IPU6EP_ADLP 0x465d
14 #define PCI_DEVICE_ID_INTEL_IPU6EP_ADLN 14 #define PCI_DEVICE_ID_INTEL_IPU6EP_ADLN 0x462e
15 #define PCI_DEVICE_ID_INTEL_IPU6EP_RPLP 15 #define PCI_DEVICE_ID_INTEL_IPU6EP_RPLP 0xa75d
16 #define PCI_DEVICE_ID_INTEL_IPU6EP_MTL 16 #define PCI_DEVICE_ID_INTEL_IPU6EP_MTL 0x7d19
17 17
18 static const struct pci_device_id ipu6_pci_tbl 18 static const struct pci_device_id ipu6_pci_tbl[] = {
19 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INT 19 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IPU6) },
20 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INT 20 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IPU6SE) },
21 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INT 21 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IPU6EP_ADLP) },
22 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INT 22 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IPU6EP_ADLN) },
23 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INT 23 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IPU6EP_RPLP) },
24 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INT 24 { PCI_VDEVICE(INTEL, PCI_DEVICE_ID_INTEL_IPU6EP_MTL) },
25 { } 25 { }
26 }; 26 };
27 27
28 #endif /* __IPU6_PCI_TBL_H__ */ 28 #endif /* __IPU6_PCI_TBL_H__ */
29 29
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