1 /* SPDX-License-Identifier: GPL-2.0-or-later * <<
2 /* 1 /*
3 * Copyright 2017 IBM Corp. 2 * Copyright 2017 IBM Corp.
>> 3 *
>> 4 * This program is free software; you can redistribute it and/or
>> 5 * modify it under the terms of the GNU General Public License
>> 6 * as published by the Free Software Foundation; either version
>> 7 * 2 of the License, or (at your option) any later version.
4 */ 8 */
5 9
6 #ifndef _MISC_CXLLIB_H 10 #ifndef _MISC_CXLLIB_H
7 #define _MISC_CXLLIB_H 11 #define _MISC_CXLLIB_H
8 12
9 #include <linux/pci.h> 13 #include <linux/pci.h>
10 #include <asm/reg.h> 14 #include <asm/reg.h>
11 15
12 /* 16 /*
13 * cxl driver exports a in-kernel 'library' AP 17 * cxl driver exports a in-kernel 'library' API which can be called by
14 * other drivers to help interacting with an I 18 * other drivers to help interacting with an IBM XSL.
15 */ 19 */
16 20
17 /* 21 /*
18 * tells whether capi is supported on the PCIe 22 * tells whether capi is supported on the PCIe slot where the
19 * device is seated 23 * device is seated
20 * 24 *
21 * Input: 25 * Input:
22 * dev: device whose slot needs to be che 26 * dev: device whose slot needs to be checked
23 * flags: 0 for the time being 27 * flags: 0 for the time being
24 */ 28 */
25 bool cxllib_slot_is_supported(struct pci_dev * 29 bool cxllib_slot_is_supported(struct pci_dev *dev, unsigned long flags);
26 30
27 31
28 /* 32 /*
29 * Returns the configuration parameters to be 33 * Returns the configuration parameters to be used by the XSL or device
30 * 34 *
31 * Input: 35 * Input:
32 * dev: device, used to find PHB 36 * dev: device, used to find PHB
33 * Output: 37 * Output:
34 * struct cxllib_xsl_config: 38 * struct cxllib_xsl_config:
35 * version 39 * version
36 * capi BAR address, i.e. 0x20000 40 * capi BAR address, i.e. 0x2000000000000-0x2FFFFFFFFFFFF
37 * capi BAR size 41 * capi BAR size
38 * data send control (XSL_DSNCTL) 42 * data send control (XSL_DSNCTL)
39 * dummy read address (XSL_DRA) 43 * dummy read address (XSL_DRA)
40 */ 44 */
41 #define CXL_XSL_CONFIG_VERSION1 1 45 #define CXL_XSL_CONFIG_VERSION1 1
42 struct cxllib_xsl_config { 46 struct cxllib_xsl_config {
43 u32 version; /* format version 47 u32 version; /* format version for register encoding */
44 u32 log_bar_size;/* log size of th 48 u32 log_bar_size;/* log size of the capi_window */
45 u64 bar_addr; /* address of the 49 u64 bar_addr; /* address of the start of capi window */
46 u64 dsnctl; /* matches defini 50 u64 dsnctl; /* matches definition of XSL_DSNCTL */
47 u64 dra; /* real address t 51 u64 dra; /* real address that can be used for dummy read */
48 }; 52 };
49 53
50 int cxllib_get_xsl_config(struct pci_dev *dev, 54 int cxllib_get_xsl_config(struct pci_dev *dev, struct cxllib_xsl_config *cfg);
51 55
52 56
53 /* 57 /*
54 * Activate capi for the pci host bridge assoc 58 * Activate capi for the pci host bridge associated with the device.
55 * Can be extended to deactivate once we know 59 * Can be extended to deactivate once we know how to do it.
56 * Device must be ready to accept messages fro 60 * Device must be ready to accept messages from the CAPP unit and
57 * respond accordingly (TLB invalidates, ...) 61 * respond accordingly (TLB invalidates, ...)
58 * 62 *
59 * PHB is switched to capi mode through calls 63 * PHB is switched to capi mode through calls to skiboot.
60 * CAPP snooping is activated 64 * CAPP snooping is activated
61 * 65 *
62 * Input: 66 * Input:
63 * dev: device whose PHB should switch mo 67 * dev: device whose PHB should switch mode
64 * mode: mode to switch to i.e. CAPI or P 68 * mode: mode to switch to i.e. CAPI or PCI
65 * flags: options related to the mode 69 * flags: options related to the mode
66 */ 70 */
67 enum cxllib_mode { 71 enum cxllib_mode {
68 CXL_MODE_CXL, 72 CXL_MODE_CXL,
69 CXL_MODE_PCI, 73 CXL_MODE_PCI,
70 }; 74 };
71 75
72 #define CXL_MODE_NO_DMA 0 76 #define CXL_MODE_NO_DMA 0
73 #define CXL_MODE_DMA_TVT0 1 77 #define CXL_MODE_DMA_TVT0 1
74 #define CXL_MODE_DMA_TVT1 2 78 #define CXL_MODE_DMA_TVT1 2
75 79
76 int cxllib_switch_phb_mode(struct pci_dev *dev 80 int cxllib_switch_phb_mode(struct pci_dev *dev, enum cxllib_mode mode,
77 unsigned long flags); 81 unsigned long flags);
78 82
79 83
80 /* 84 /*
81 * Set the device for capi DMA. 85 * Set the device for capi DMA.
82 * Define its dma_ops and dma offset so that a 86 * Define its dma_ops and dma offset so that allocations will be using TVT#1
83 * 87 *
84 * Input: 88 * Input:
85 * dev: device to set 89 * dev: device to set
86 * flags: options. CXL_MODE_DMA_TVT1 shou 90 * flags: options. CXL_MODE_DMA_TVT1 should be used
87 */ 91 */
88 int cxllib_set_device_dma(struct pci_dev *dev, 92 int cxllib_set_device_dma(struct pci_dev *dev, unsigned long flags);
89 93
90 94
91 /* 95 /*
92 * Get the Process Element structure for the g 96 * Get the Process Element structure for the given thread
93 * 97 *
94 * Input: 98 * Input:
95 * task: task_struct for the context of the 99 * task: task_struct for the context of the translation
96 * translation_mode: whether addresses shou 100 * translation_mode: whether addresses should be translated
97 * Output: 101 * Output:
98 * attr: attributes to fill up the Process 102 * attr: attributes to fill up the Process Element structure from CAIA
99 */ 103 */
100 struct cxllib_pe_attributes { 104 struct cxllib_pe_attributes {
101 u64 sr; 105 u64 sr;
102 u32 lpid; 106 u32 lpid;
103 u32 tid; 107 u32 tid;
104 u32 pid; 108 u32 pid;
105 }; 109 };
106 #define CXL_TRANSLATED_MODE 0 110 #define CXL_TRANSLATED_MODE 0
107 #define CXL_REAL_MODE 1 111 #define CXL_REAL_MODE 1
108 112
109 int cxllib_get_PE_attributes(struct task_struc 113 int cxllib_get_PE_attributes(struct task_struct *task,
110 unsigned long translation_mode, s 114 unsigned long translation_mode, struct cxllib_pe_attributes *attr);
111 115
112 116
113 /* 117 /*
114 * Handle memory fault. 118 * Handle memory fault.
115 * Fault in all the pages of the specified buf 119 * Fault in all the pages of the specified buffer for the permissions
116 * provided in ‘flags’ 120 * provided in ‘flags’
117 * 121 *
118 * Shouldn't be called from interrupt context 122 * Shouldn't be called from interrupt context
119 * 123 *
120 * Input: 124 * Input:
121 * mm: struct mm for the thread faulting 125 * mm: struct mm for the thread faulting the pages
122 * addr: base address of the buffer to pa 126 * addr: base address of the buffer to page in
123 * size: size of the buffer to page in 127 * size: size of the buffer to page in
124 * flags: permission requested (DSISR_ISS 128 * flags: permission requested (DSISR_ISSTORE...)
125 */ 129 */
126 int cxllib_handle_fault(struct mm_struct *mm, 130 int cxllib_handle_fault(struct mm_struct *mm, u64 addr, u64 size, u64 flags);
127 131
128 132
129 #endif /* _MISC_CXLLIB_H */ 133 #endif /* _MISC_CXLLIB_H */
130 134
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