1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3- 1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
2 /* 2 /*
3 * Copyright(c) 2018 Intel Corporation. 3 * Copyright(c) 2018 Intel Corporation.
4 * 4 *
5 */ 5 */
6 6
7 #ifndef TID_RDMA_DEFS_H 7 #ifndef TID_RDMA_DEFS_H
8 #define TID_RDMA_DEFS_H 8 #define TID_RDMA_DEFS_H
9 9
10 #include <rdma/ib_pack.h> 10 #include <rdma/ib_pack.h>
11 11
12 struct tid_rdma_read_req { 12 struct tid_rdma_read_req {
13 __le32 kdeth0; 13 __le32 kdeth0;
14 __le32 kdeth1; 14 __le32 kdeth1;
15 struct ib_reth reth; 15 struct ib_reth reth;
16 __be32 tid_flow_psn; 16 __be32 tid_flow_psn;
17 __be32 tid_flow_qp; 17 __be32 tid_flow_qp;
18 __be32 verbs_qp; 18 __be32 verbs_qp;
19 }; 19 };
20 20
21 struct tid_rdma_read_resp { 21 struct tid_rdma_read_resp {
22 __le32 kdeth0; 22 __le32 kdeth0;
23 __le32 kdeth1; 23 __le32 kdeth1;
24 __be32 aeth; 24 __be32 aeth;
25 __be32 reserved[4]; 25 __be32 reserved[4];
26 __be32 verbs_psn; 26 __be32 verbs_psn;
27 __be32 verbs_qp; 27 __be32 verbs_qp;
28 }; 28 };
29 29
30 struct tid_rdma_write_req { 30 struct tid_rdma_write_req {
31 __le32 kdeth0; 31 __le32 kdeth0;
32 __le32 kdeth1; 32 __le32 kdeth1;
33 struct ib_reth reth; 33 struct ib_reth reth;
34 __be32 reserved[2]; 34 __be32 reserved[2];
35 __be32 verbs_qp; 35 __be32 verbs_qp;
36 }; 36 };
37 37
38 struct tid_rdma_write_resp { 38 struct tid_rdma_write_resp {
39 __le32 kdeth0; 39 __le32 kdeth0;
40 __le32 kdeth1; 40 __le32 kdeth1;
41 __be32 aeth; 41 __be32 aeth;
42 __be32 reserved[3]; 42 __be32 reserved[3];
43 __be32 tid_flow_psn; 43 __be32 tid_flow_psn;
44 __be32 tid_flow_qp; 44 __be32 tid_flow_qp;
45 __be32 verbs_qp; 45 __be32 verbs_qp;
46 }; 46 };
47 47
48 struct tid_rdma_write_data { 48 struct tid_rdma_write_data {
49 __le32 kdeth0; 49 __le32 kdeth0;
50 __le32 kdeth1; 50 __le32 kdeth1;
51 __be32 reserved[6]; 51 __be32 reserved[6];
52 __be32 verbs_qp; 52 __be32 verbs_qp;
53 }; 53 };
54 54
55 struct tid_rdma_resync { 55 struct tid_rdma_resync {
56 __le32 kdeth0; 56 __le32 kdeth0;
57 __le32 kdeth1; 57 __le32 kdeth1;
58 __be32 reserved[6]; 58 __be32 reserved[6];
59 __be32 verbs_qp; 59 __be32 verbs_qp;
60 }; 60 };
61 61
62 struct tid_rdma_ack { 62 struct tid_rdma_ack {
63 __le32 kdeth0; 63 __le32 kdeth0;
64 __le32 kdeth1; 64 __le32 kdeth1;
65 __be32 aeth; 65 __be32 aeth;
66 __be32 reserved[2]; 66 __be32 reserved[2];
67 __be32 tid_flow_psn; 67 __be32 tid_flow_psn;
68 __be32 verbs_psn; 68 __be32 verbs_psn;
69 __be32 tid_flow_qp; 69 __be32 tid_flow_qp;
70 __be32 verbs_qp; 70 __be32 verbs_qp;
71 }; 71 };
72 72
73 /* 73 /*
74 * TID RDMA Opcodes 74 * TID RDMA Opcodes
75 */ 75 */
76 #define IB_OPCODE_TID_RDMA 0xe0 76 #define IB_OPCODE_TID_RDMA 0xe0
77 enum { 77 enum {
78 IB_OPCODE_WRITE_REQ = 0x0, 78 IB_OPCODE_WRITE_REQ = 0x0,
79 IB_OPCODE_WRITE_RESP = 0x1, 79 IB_OPCODE_WRITE_RESP = 0x1,
80 IB_OPCODE_WRITE_DATA = 0x2, 80 IB_OPCODE_WRITE_DATA = 0x2,
81 IB_OPCODE_WRITE_DATA_LAST = 0x3, 81 IB_OPCODE_WRITE_DATA_LAST = 0x3,
82 IB_OPCODE_READ_REQ = 0x4, 82 IB_OPCODE_READ_REQ = 0x4,
83 IB_OPCODE_READ_RESP = 0x5, 83 IB_OPCODE_READ_RESP = 0x5,
84 IB_OPCODE_RESYNC = 0x6, 84 IB_OPCODE_RESYNC = 0x6,
85 IB_OPCODE_ACK = 0x7, 85 IB_OPCODE_ACK = 0x7,
86 86
87 IB_OPCODE(TID_RDMA, WRITE_REQ), 87 IB_OPCODE(TID_RDMA, WRITE_REQ),
88 IB_OPCODE(TID_RDMA, WRITE_RESP), 88 IB_OPCODE(TID_RDMA, WRITE_RESP),
89 IB_OPCODE(TID_RDMA, WRITE_DATA), 89 IB_OPCODE(TID_RDMA, WRITE_DATA),
90 IB_OPCODE(TID_RDMA, WRITE_DATA_LAST), 90 IB_OPCODE(TID_RDMA, WRITE_DATA_LAST),
91 IB_OPCODE(TID_RDMA, READ_REQ), 91 IB_OPCODE(TID_RDMA, READ_REQ),
92 IB_OPCODE(TID_RDMA, READ_RESP), 92 IB_OPCODE(TID_RDMA, READ_RESP),
93 IB_OPCODE(TID_RDMA, RESYNC), 93 IB_OPCODE(TID_RDMA, RESYNC),
94 IB_OPCODE(TID_RDMA, ACK), 94 IB_OPCODE(TID_RDMA, ACK),
95 }; 95 };
96 96
97 #define TID_OP(x) IB_OPCODE_TID_RDMA_##x 97 #define TID_OP(x) IB_OPCODE_TID_RDMA_##x
98 98
99 /* 99 /*
100 * Define TID RDMA specific WR opcodes. The ib 100 * Define TID RDMA specific WR opcodes. The ib_wr_opcode
101 * enum already provides some reserved values 101 * enum already provides some reserved values for use by
102 * low level drivers. Two of those are used bu 102 * low level drivers. Two of those are used but renamed
103 * to be more descriptive. 103 * to be more descriptive.
104 */ 104 */
105 #define IB_WR_TID_RDMA_WRITE IB_WR_RESERVED1 105 #define IB_WR_TID_RDMA_WRITE IB_WR_RESERVED1
106 #define IB_WR_TID_RDMA_READ IB_WR_RESERVED2 106 #define IB_WR_TID_RDMA_READ IB_WR_RESERVED2
107 107
108 #endif /* TID_RDMA_DEFS_H */ 108 #endif /* TID_RDMA_DEFS_H */
109 109
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