1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* 2 /*
3 * Copyright (C) 2014 NVIDIA Corporation 3 * Copyright (C) 2014 NVIDIA Corporation
4 */ 4 */
5 5
6 #ifndef __SOC_TEGRA_PM_H__ 6 #ifndef __SOC_TEGRA_PM_H__
7 #define __SOC_TEGRA_PM_H__ 7 #define __SOC_TEGRA_PM_H__
8 8
9 #include <linux/errno.h> <<
10 <<
11 enum tegra_suspend_mode { 9 enum tegra_suspend_mode {
12 TEGRA_SUSPEND_NONE = 0, 10 TEGRA_SUSPEND_NONE = 0,
13 TEGRA_SUSPEND_LP2, /* CPU voltage off 11 TEGRA_SUSPEND_LP2, /* CPU voltage off */
14 TEGRA_SUSPEND_LP1, /* CPU voltage off, 12 TEGRA_SUSPEND_LP1, /* CPU voltage off, DRAM self-refresh */
15 TEGRA_SUSPEND_LP0, /* CPU + core volta 13 TEGRA_SUSPEND_LP0, /* CPU + core voltage off, DRAM self-refresh */
16 TEGRA_MAX_SUSPEND_MODE, 14 TEGRA_MAX_SUSPEND_MODE,
17 TEGRA_SUSPEND_NOT_READY, <<
18 }; 15 };
19 16
20 #if defined(CONFIG_PM_SLEEP) && defined(CONFIG !! 17 #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM)
21 enum tegra_suspend_mode 18 enum tegra_suspend_mode
22 tegra_pm_validate_suspend_mode(enum tegra_susp 19 tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode);
23 20
24 /* low-level resume entry point */ 21 /* low-level resume entry point */
25 void tegra_resume(void); 22 void tegra_resume(void);
26 <<
27 int tegra30_pm_secondary_cpu_suspend(unsigned <<
28 void tegra_pm_clear_cpu_in_lp2(void); <<
29 void tegra_pm_set_cpu_in_lp2(void); <<
30 int tegra_pm_enter_lp2(void); <<
31 int tegra_pm_park_secondary_cpu(unsigned long <<
32 void tegra_pm_init_suspend(void); <<
33 #else 23 #else
34 static inline enum tegra_suspend_mode 24 static inline enum tegra_suspend_mode
35 tegra_pm_validate_suspend_mode(enum tegra_susp 25 tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode)
36 { 26 {
37 return TEGRA_SUSPEND_NONE; 27 return TEGRA_SUSPEND_NONE;
38 } 28 }
39 29
40 static inline void tegra_resume(void) 30 static inline void tegra_resume(void)
41 { <<
42 } <<
43 <<
44 static inline int tegra30_pm_secondary_cpu_sus <<
45 { <<
46 return -ENOTSUPP; <<
47 } <<
48 <<
49 static inline void tegra_pm_clear_cpu_in_lp2(v <<
50 { <<
51 } <<
52 <<
53 static inline void tegra_pm_set_cpu_in_lp2(voi <<
54 { <<
55 } <<
56 <<
57 static inline int tegra_pm_enter_lp2(void) <<
58 { <<
59 return -ENOTSUPP; <<
60 } <<
61 <<
62 static inline int tegra_pm_park_secondary_cpu( <<
63 { <<
64 return -ENOTSUPP; <<
65 } <<
66 <<
67 static inline void tegra_pm_init_suspend(void) <<
68 { 31 {
69 } 32 }
70 #endif /* CONFIG_PM_SLEEP */ 33 #endif /* CONFIG_PM_SLEEP */
71 34
72 #endif /* __SOC_TEGRA_PM_H__ */ 35 #endif /* __SOC_TEGRA_PM_H__ */
73 36
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