1 /* SPDX-License-Identifier: GPL-2.0-only */ 1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* 2 /*
3 * Copyright (C) 2014 NVIDIA Corporation 3 * Copyright (C) 2014 NVIDIA Corporation
4 */ 4 */
5 5
6 #ifndef __SOC_TEGRA_PM_H__ 6 #ifndef __SOC_TEGRA_PM_H__
7 #define __SOC_TEGRA_PM_H__ 7 #define __SOC_TEGRA_PM_H__
8 8
9 #include <linux/errno.h> 9 #include <linux/errno.h>
10 10
11 enum tegra_suspend_mode { 11 enum tegra_suspend_mode {
12 TEGRA_SUSPEND_NONE = 0, 12 TEGRA_SUSPEND_NONE = 0,
13 TEGRA_SUSPEND_LP2, /* CPU voltage off 13 TEGRA_SUSPEND_LP2, /* CPU voltage off */
14 TEGRA_SUSPEND_LP1, /* CPU voltage off, 14 TEGRA_SUSPEND_LP1, /* CPU voltage off, DRAM self-refresh */
15 TEGRA_SUSPEND_LP0, /* CPU + core volta 15 TEGRA_SUSPEND_LP0, /* CPU + core voltage off, DRAM self-refresh */
16 TEGRA_MAX_SUSPEND_MODE, 16 TEGRA_MAX_SUSPEND_MODE,
17 TEGRA_SUSPEND_NOT_READY, <<
18 }; 17 };
19 18
20 #if defined(CONFIG_PM_SLEEP) && defined(CONFIG !! 19 #if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM)
21 enum tegra_suspend_mode 20 enum tegra_suspend_mode
22 tegra_pm_validate_suspend_mode(enum tegra_susp 21 tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode);
23 22
24 /* low-level resume entry point */ 23 /* low-level resume entry point */
25 void tegra_resume(void); 24 void tegra_resume(void);
26 25
27 int tegra30_pm_secondary_cpu_suspend(unsigned 26 int tegra30_pm_secondary_cpu_suspend(unsigned long arg);
28 void tegra_pm_clear_cpu_in_lp2(void); 27 void tegra_pm_clear_cpu_in_lp2(void);
29 void tegra_pm_set_cpu_in_lp2(void); 28 void tegra_pm_set_cpu_in_lp2(void);
30 int tegra_pm_enter_lp2(void); 29 int tegra_pm_enter_lp2(void);
31 int tegra_pm_park_secondary_cpu(unsigned long 30 int tegra_pm_park_secondary_cpu(unsigned long cpu);
32 void tegra_pm_init_suspend(void); <<
33 #else 31 #else
34 static inline enum tegra_suspend_mode 32 static inline enum tegra_suspend_mode
35 tegra_pm_validate_suspend_mode(enum tegra_susp 33 tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode)
36 { 34 {
37 return TEGRA_SUSPEND_NONE; 35 return TEGRA_SUSPEND_NONE;
38 } 36 }
39 37
40 static inline void tegra_resume(void) 38 static inline void tegra_resume(void)
41 { 39 {
42 } 40 }
43 41
44 static inline int tegra30_pm_secondary_cpu_sus 42 static inline int tegra30_pm_secondary_cpu_suspend(unsigned long arg)
45 { 43 {
46 return -ENOTSUPP; 44 return -ENOTSUPP;
47 } 45 }
48 46
49 static inline void tegra_pm_clear_cpu_in_lp2(v 47 static inline void tegra_pm_clear_cpu_in_lp2(void)
50 { 48 {
51 } 49 }
52 50
53 static inline void tegra_pm_set_cpu_in_lp2(voi 51 static inline void tegra_pm_set_cpu_in_lp2(void)
54 { 52 {
55 } 53 }
56 54
57 static inline int tegra_pm_enter_lp2(void) 55 static inline int tegra_pm_enter_lp2(void)
58 { 56 {
59 return -ENOTSUPP; 57 return -ENOTSUPP;
60 } 58 }
61 59
62 static inline int tegra_pm_park_secondary_cpu( 60 static inline int tegra_pm_park_secondary_cpu(unsigned long cpu)
63 { 61 {
64 return -ENOTSUPP; 62 return -ENOTSUPP;
65 } <<
66 <<
67 static inline void tegra_pm_init_suspend(void) <<
68 { <<
69 } 63 }
70 #endif /* CONFIG_PM_SLEEP */ 64 #endif /* CONFIG_PM_SLEEP */
71 65
72 #endif /* __SOC_TEGRA_PM_H__ */ 66 #endif /* __SOC_TEGRA_PM_H__ */
73 67
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