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Linux/include/sound/designware_i2s.h

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Diff markup

Differences between /include/sound/designware_i2s.h (Version linux-6.11.5) and /include/sound/designware_i2s.h (Version linux-3.10.108)


  1 /* SPDX-License-Identifier: GPL-2.0-or-later * << 
  2 /*                                                  1 /*
  3  * Copyright (ST) 2012 Rajeev Kumar (rajeevkum !!   2  * Copyright (ST) 2012 Rajeev Kumar (rajeev-dlh.kumar@st.com)
                                                   >>   3  *
                                                   >>   4  * This program is free software; you can redistribute it and/or modify
                                                   >>   5  * it under the terms of the GNU General Public License as published by
                                                   >>   6  * the Free Software Foundation; either version 2 of the License, or
                                                   >>   7  * (at your option) any later version.
                                                   >>   8  *
                                                   >>   9  * This program is distributed in the hope that it will be useful,
                                                   >>  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
                                                   >>  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
                                                   >>  12  * GNU General Public License for more details.
                                                   >>  13  *
                                                   >>  14  * You should have received a copy of the GNU General Public License
                                                   >>  15  * along with this program; if not, write to the Free Software
                                                   >>  16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
                                                   >>  17  *
  4  */                                                18  */
  5                                                    19 
  6 #ifndef __SOUND_DESIGNWARE_I2S_H                   20 #ifndef __SOUND_DESIGNWARE_I2S_H
  7 #define __SOUND_DESIGNWARE_I2S_H                   21 #define __SOUND_DESIGNWARE_I2S_H
  8                                                    22 
  9 #include <linux/dmaengine.h>                       23 #include <linux/dmaengine.h>
 10 #include <linux/types.h>                           24 #include <linux/types.h>
 11                                                    25 
 12 /*                                                 26 /*
 13  * struct i2s_clk_config_data - represent i2s      27  * struct i2s_clk_config_data - represent i2s clk configuration data
 14  * @chan_nr: number of channel                     28  * @chan_nr: number of channel
 15  * @data_width: number of bits per sample (8/1     29  * @data_width: number of bits per sample (8/16/24/32 bit)
 16  * @sample_rate: sampling frequency (8Khz, 16K     30  * @sample_rate: sampling frequency (8Khz, 16Khz, 32Khz, 44Khz, 48Khz)
 17  */                                                31  */
 18 struct i2s_clk_config_data {                       32 struct i2s_clk_config_data {
 19         int chan_nr;                               33         int chan_nr;
 20         u32 data_width;                            34         u32 data_width;
 21         u32 sample_rate;                           35         u32 sample_rate;
 22 };                                                 36 };
 23                                                    37 
 24 struct dw_i2s_dev;                             << 
 25                                                << 
 26 struct i2s_platform_data {                         38 struct i2s_platform_data {
 27         #define DWC_I2S_PLAY    (1 << 0)           39         #define DWC_I2S_PLAY    (1 << 0)
 28         #define DWC_I2S_RECORD  (1 << 1)           40         #define DWC_I2S_RECORD  (1 << 1)
 29         #define DW_I2S_SLAVE    (1 << 2)       << 
 30         #define DW_I2S_MASTER   (1 << 3)       << 
 31         unsigned int cap;                          41         unsigned int cap;
 32         int channel;                               42         int channel;
 33         u32 snd_fmts;                              43         u32 snd_fmts;
 34         u32 snd_rates;                             44         u32 snd_rates;
 35                                                    45 
 36         #define DW_I2S_QUIRK_COMP_REG_OFFSET   << 
 37         #define DW_I2S_QUIRK_COMP_PARAM1       << 
 38         #define DW_I2S_QUIRK_16BIT_IDX_OVERRID << 
 39         unsigned int quirks;                   << 
 40         unsigned int i2s_reg_comp1;            << 
 41         unsigned int i2s_reg_comp2;            << 
 42                                                << 
 43         void *play_dma_data;                       46         void *play_dma_data;
 44         void *capture_dma_data;                    47         void *capture_dma_data;
 45         bool (*filter)(struct dma_chan *chan,      48         bool (*filter)(struct dma_chan *chan, void *slave);
 46         int (*i2s_clk_cfg)(struct i2s_clk_conf     49         int (*i2s_clk_cfg)(struct i2s_clk_config_data *config);
 47         int (*i2s_pd_init)(struct dw_i2s_dev * << 
 48 };                                                 50 };
 49                                                    51 
 50 struct i2s_dma_data {                              52 struct i2s_dma_data {
 51         void *data;                                53         void *data;
 52         dma_addr_t addr;                           54         dma_addr_t addr;
 53         u32 max_burst;                             55         u32 max_burst;
 54         enum dma_slave_buswidth addr_width;        56         enum dma_slave_buswidth addr_width;
 55         bool (*filter)(struct dma_chan *chan,      57         bool (*filter)(struct dma_chan *chan, void *slave);
 56 };                                                 58 };
 57                                                    59 
 58 /* I2S DMA registers */                            60 /* I2S DMA registers */
 59 #define I2S_RXDMA               0x01C0             61 #define I2S_RXDMA               0x01C0
 60 #define I2S_TXDMA               0x01C8             62 #define I2S_TXDMA               0x01C8
 61                                                    63 
 62 #define TWO_CHANNEL_SUPPORT     2       /* up      64 #define TWO_CHANNEL_SUPPORT     2       /* up to 2.0 */
 63 #define FOUR_CHANNEL_SUPPORT    4       /* up      65 #define FOUR_CHANNEL_SUPPORT    4       /* up to 3.1 */
 64 #define SIX_CHANNEL_SUPPORT     6       /* up      66 #define SIX_CHANNEL_SUPPORT     6       /* up to 5.1 */
 65 #define EIGHT_CHANNEL_SUPPORT   8       /* up      67 #define EIGHT_CHANNEL_SUPPORT   8       /* up to 7.1 */
 66                                                    68 
 67 #endif /*  __SOUND_DESIGNWARE_I2S_H */             69 #endif /*  __SOUND_DESIGNWARE_I2S_H */
 68                                                    70 

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