1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux 1 2 /* 3 * ARM Power State and Coordination Interface 4 * 5 * This header holds common PSCI defines and m 6 * by: ARM kernel, ARM64 kernel, KVM ARM/ARM64 7 * 8 * Copyright (C) 2014 Linaro Ltd. 9 * Author: Anup Patel <anup.patel@linaro.org> 10 */ 11 12 #ifndef _UAPI_LINUX_PSCI_H 13 #define _UAPI_LINUX_PSCI_H 14 15 /* 16 * PSCI v0.1 interface 17 * 18 * The PSCI v0.1 function numbers are implemen 19 * 20 * Only PSCI return values such as: SUCCESS, N 21 * INVALID_PARAMS, and DENIED defined below ar 22 * to PSCI v0.1. 23 */ 24 25 /* PSCI v0.2 interface */ 26 #define PSCI_0_2_FN_BASE 27 #define PSCI_0_2_FN(n) 28 #define PSCI_0_2_64BIT 29 #define PSCI_0_2_FN64_BASE 30 (PSCI_ 31 #define PSCI_0_2_FN64(n) 32 33 #define PSCI_0_2_FN_PSCI_VERSION 34 #define PSCI_0_2_FN_CPU_SUSPEND 35 #define PSCI_0_2_FN_CPU_OFF 36 #define PSCI_0_2_FN_CPU_ON 37 #define PSCI_0_2_FN_AFFINITY_INFO 38 #define PSCI_0_2_FN_MIGRATE 39 #define PSCI_0_2_FN_MIGRATE_INFO_TYPE 40 #define PSCI_0_2_FN_MIGRATE_INFO_UP_CPU 41 #define PSCI_0_2_FN_SYSTEM_OFF 42 #define PSCI_0_2_FN_SYSTEM_RESET 43 44 #define PSCI_0_2_FN64_CPU_SUSPEND 45 #define PSCI_0_2_FN64_CPU_ON 46 #define PSCI_0_2_FN64_AFFINITY_INFO 47 #define PSCI_0_2_FN64_MIGRATE 48 #define PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU 49 50 #define PSCI_1_0_FN_PSCI_FEATURES 51 #define PSCI_1_0_FN_CPU_FREEZE 52 #define PSCI_1_0_FN_CPU_DEFAULT_SUSPEND 53 #define PSCI_1_0_FN_NODE_HW_STATE 54 #define PSCI_1_0_FN_SYSTEM_SUSPEND 55 #define PSCI_1_0_FN_SET_SUSPEND_MODE 56 #define PSCI_1_0_FN_STAT_RESIDENCY 57 #define PSCI_1_0_FN_STAT_COUNT 58 59 #define PSCI_1_1_FN_SYSTEM_RESET2 60 #define PSCI_1_1_FN_MEM_PROTECT 61 #define PSCI_1_1_FN_MEM_PROTECT_CHECK_RANGE 62 63 #define PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND 64 #define PSCI_1_0_FN64_NODE_HW_STATE 65 #define PSCI_1_0_FN64_SYSTEM_SUSPEND 66 #define PSCI_1_0_FN64_STAT_RESIDENCY 67 #define PSCI_1_0_FN64_STAT_COUNT 68 69 #define PSCI_1_1_FN64_SYSTEM_RESET2 70 #define PSCI_1_1_FN64_MEM_PROTECT_CHECK_RANGE 71 72 /* PSCI v0.2 power state encoding for CPU_SUSP 73 #define PSCI_0_2_POWER_STATE_ID_MASK 74 #define PSCI_0_2_POWER_STATE_ID_SHIFT 75 #define PSCI_0_2_POWER_STATE_TYPE_SHIFT 76 #define PSCI_0_2_POWER_STATE_TYPE_MASK 77 (0x1 << PSCI_0 78 #define PSCI_0_2_POWER_STATE_AFFL_SHIFT 79 #define PSCI_0_2_POWER_STATE_AFFL_MASK 80 (0x3 << PSCI_0 81 82 /* PSCI extended power state encoding for CPU_ 83 #define PSCI_1_0_EXT_POWER_STATE_ID_MASK 84 #define PSCI_1_0_EXT_POWER_STATE_ID_SHIFT 85 #define PSCI_1_0_EXT_POWER_STATE_TYPE_SHIFT 86 #define PSCI_1_0_EXT_POWER_STATE_TYPE_MASK 87 (0x1 << PSCI_1 88 89 /* PSCI v0.2 affinity level state returned by 90 #define PSCI_0_2_AFFINITY_LEVEL_ON 91 #define PSCI_0_2_AFFINITY_LEVEL_OFF 92 #define PSCI_0_2_AFFINITY_LEVEL_ON_PENDING 93 94 /* PSCI v0.2 multicore support in Trusted OS r 95 #define PSCI_0_2_TOS_UP_MIGRATE 96 #define PSCI_0_2_TOS_UP_NO_MIGRATE 97 #define PSCI_0_2_TOS_MP 98 99 /* PSCI v1.1 reset type encoding for SYSTEM_RE 100 #define PSCI_1_1_RESET_TYPE_SYSTEM_WARM_RESET 101 #define PSCI_1_1_RESET_TYPE_VENDOR_START 102 103 /* PSCI version decoding (independent of PSCI 104 #define PSCI_VERSION_MAJOR_SHIFT 105 #define PSCI_VERSION_MINOR_MASK 106 ((1U << PSCI_VERSION_MAJOR_SHI 107 #define PSCI_VERSION_MAJOR_MASK 108 #define PSCI_VERSION_MAJOR(ver) 109 (((ver) & PSCI_VERSION_MAJOR_M 110 #define PSCI_VERSION_MINOR(ver) 111 ((ver) & PSCI_VERSION_MINOR_MA 112 #define PSCI_VERSION(maj, min) 113 ((((maj) << PSCI_VERSION_MAJOR_SHIFT) 114 ((min) & PSCI_VERSION_MINOR_MASK)) 115 116 /* PSCI features decoding (>=1.0) */ 117 #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT 118 #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK 119 (0x1 << PSCI_1_0_FEATU 120 121 #define PSCI_1_0_OS_INITIATED 122 #define PSCI_1_0_SUSPEND_MODE_PC 123 #define PSCI_1_0_SUSPEND_MODE_OSI 124 125 /* PSCI return values (inclusive of all PSCI v 126 #define PSCI_RET_SUCCESS 127 #define PSCI_RET_NOT_SUPPORTED 128 #define PSCI_RET_INVALID_PARAMS 129 #define PSCI_RET_DENIED 130 #define PSCI_RET_ALREADY_ON 131 #define PSCI_RET_ON_PENDING 132 #define PSCI_RET_INTERNAL_FAILURE 133 #define PSCI_RET_NOT_PRESENT 134 #define PSCI_RET_DISABLED 135 #define PSCI_RET_INVALID_ADDRESS 136 137 #endif /* _UAPI_LINUX_PSCI_H */ 138
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