1 /* 1 /*
2 * Copyright (c) 2018, Mellanox Technologies i 2 * Copyright (c) 2018, Mellanox Technologies inc. All rights reserved.
3 * 3 *
4 * This software is available to you under a c 4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed un 5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, ava 6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this sourc 7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below: 8 * OpenIB.org BSD license below:
9 * 9 *
10 * Redistribution and use in source and bi 10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted pro 11 * without modification, are permitted provided that the following
12 * conditions are met: 12 * conditions are met:
13 * 13 *
14 * - Redistributions of source code must 14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of condi 15 * copyright notice, this list of conditions and the following
16 * disclaimer. 16 * disclaimer.
17 * 17 *
18 * - Redistributions in binary form must 18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of condi 19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/ 20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution. 21 * provided with the distribution.
22 * 22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT W 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMIT 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR P 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTH 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER L 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARIS 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE. 30 * SOFTWARE.
31 */ 31 */
32 32
33 #ifndef MLX5_USER_IOCTL_VERBS_H 33 #ifndef MLX5_USER_IOCTL_VERBS_H
34 #define MLX5_USER_IOCTL_VERBS_H 34 #define MLX5_USER_IOCTL_VERBS_H
35 35
36 #include <linux/types.h> 36 #include <linux/types.h>
37 37
38 enum mlx5_ib_uapi_flow_action_flags { 38 enum mlx5_ib_uapi_flow_action_flags {
39 MLX5_IB_UAPI_FLOW_ACTION_FLAGS_REQUIRE 39 MLX5_IB_UAPI_FLOW_ACTION_FLAGS_REQUIRE_METADATA = 1 << 0,
40 }; 40 };
41 41
42 enum mlx5_ib_uapi_flow_table_type { 42 enum mlx5_ib_uapi_flow_table_type {
43 MLX5_IB_UAPI_FLOW_TABLE_TYPE_NIC_RX 43 MLX5_IB_UAPI_FLOW_TABLE_TYPE_NIC_RX = 0x0,
44 MLX5_IB_UAPI_FLOW_TABLE_TYPE_NIC_TX 44 MLX5_IB_UAPI_FLOW_TABLE_TYPE_NIC_TX = 0x1,
45 MLX5_IB_UAPI_FLOW_TABLE_TYPE_FDB 45 MLX5_IB_UAPI_FLOW_TABLE_TYPE_FDB = 0x2,
46 MLX5_IB_UAPI_FLOW_TABLE_TYPE_RDMA_RX 46 MLX5_IB_UAPI_FLOW_TABLE_TYPE_RDMA_RX = 0x3,
47 MLX5_IB_UAPI_FLOW_TABLE_TYPE_RDMA_TX 47 MLX5_IB_UAPI_FLOW_TABLE_TYPE_RDMA_TX = 0x4,
48 }; 48 };
49 49
50 enum mlx5_ib_uapi_flow_action_packet_reformat_ 50 enum mlx5_ib_uapi_flow_action_packet_reformat_type {
51 MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORM 51 MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 = 0x0,
52 MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORM 52 MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL = 0x1,
53 MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORM 53 MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 = 0x2,
54 MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORM 54 MLX5_IB_UAPI_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL = 0x3,
55 }; 55 };
56 56
57 enum mlx5_ib_uapi_reg_dmabuf_flags { 57 enum mlx5_ib_uapi_reg_dmabuf_flags {
58 MLX5_IB_UAPI_REG_DMABUF_ACCESS_DATA_DI 58 MLX5_IB_UAPI_REG_DMABUF_ACCESS_DATA_DIRECT = 1 << 0,
59 }; 59 };
60 60
61 struct mlx5_ib_uapi_devx_async_cmd_hdr { 61 struct mlx5_ib_uapi_devx_async_cmd_hdr {
62 __aligned_u64 wr_id; 62 __aligned_u64 wr_id;
63 __u8 out_data[]; 63 __u8 out_data[];
64 }; 64 };
65 65
66 enum mlx5_ib_uapi_dm_type { 66 enum mlx5_ib_uapi_dm_type {
67 MLX5_IB_UAPI_DM_TYPE_MEMIC, 67 MLX5_IB_UAPI_DM_TYPE_MEMIC,
68 MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM, 68 MLX5_IB_UAPI_DM_TYPE_STEERING_SW_ICM,
69 MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ 69 MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_SW_ICM,
70 MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PAT 70 MLX5_IB_UAPI_DM_TYPE_HEADER_MODIFY_PATTERN_SW_ICM,
71 MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM, 71 MLX5_IB_UAPI_DM_TYPE_ENCAP_SW_ICM,
72 }; 72 };
73 73
74 enum mlx5_ib_uapi_devx_create_event_channel_fl 74 enum mlx5_ib_uapi_devx_create_event_channel_flags {
75 MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_ 75 MLX5_IB_UAPI_DEVX_CR_EV_CH_FLAGS_OMIT_DATA = 1 << 0,
76 }; 76 };
77 77
78 struct mlx5_ib_uapi_devx_async_event_hdr { 78 struct mlx5_ib_uapi_devx_async_event_hdr {
79 __aligned_u64 cookie; 79 __aligned_u64 cookie;
80 __u8 out_data[]; 80 __u8 out_data[];
81 }; 81 };
82 82
83 enum mlx5_ib_uapi_pp_alloc_flags { 83 enum mlx5_ib_uapi_pp_alloc_flags {
84 MLX5_IB_UAPI_PP_ALLOC_FLAGS_DEDICATED_ 84 MLX5_IB_UAPI_PP_ALLOC_FLAGS_DEDICATED_INDEX = 1 << 0,
85 }; 85 };
86 86
87 enum mlx5_ib_uapi_uar_alloc_type { 87 enum mlx5_ib_uapi_uar_alloc_type {
88 MLX5_IB_UAPI_UAR_ALLOC_TYPE_BF = 0x0, 88 MLX5_IB_UAPI_UAR_ALLOC_TYPE_BF = 0x0,
89 MLX5_IB_UAPI_UAR_ALLOC_TYPE_NC = 0x1, 89 MLX5_IB_UAPI_UAR_ALLOC_TYPE_NC = 0x1,
90 }; 90 };
91 91
92 enum mlx5_ib_uapi_query_port_flags { 92 enum mlx5_ib_uapi_query_port_flags {
93 MLX5_IB_UAPI_QUERY_PORT_VPORT 93 MLX5_IB_UAPI_QUERY_PORT_VPORT = 1 << 0,
94 MLX5_IB_UAPI_QUERY_PORT_VPORT_VHCA_ID 94 MLX5_IB_UAPI_QUERY_PORT_VPORT_VHCA_ID = 1 << 1,
95 MLX5_IB_UAPI_QUERY_PORT_VPORT_STEERING 95 MLX5_IB_UAPI_QUERY_PORT_VPORT_STEERING_ICM_RX = 1 << 2,
96 MLX5_IB_UAPI_QUERY_PORT_VPORT_STEERING 96 MLX5_IB_UAPI_QUERY_PORT_VPORT_STEERING_ICM_TX = 1 << 3,
97 MLX5_IB_UAPI_QUERY_PORT_VPORT_REG_C0 97 MLX5_IB_UAPI_QUERY_PORT_VPORT_REG_C0 = 1 << 4,
98 MLX5_IB_UAPI_QUERY_PORT_ESW_OWNER_VHCA 98 MLX5_IB_UAPI_QUERY_PORT_ESW_OWNER_VHCA_ID = 1 << 5,
99 }; 99 };
100 100
101 struct mlx5_ib_uapi_reg { 101 struct mlx5_ib_uapi_reg {
102 __u32 value; 102 __u32 value;
103 __u32 mask; 103 __u32 mask;
104 }; 104 };
105 105
106 struct mlx5_ib_uapi_query_port { 106 struct mlx5_ib_uapi_query_port {
107 __aligned_u64 flags; 107 __aligned_u64 flags;
108 __u16 vport; 108 __u16 vport;
109 __u16 vport_vhca_id; 109 __u16 vport_vhca_id;
110 __u16 esw_owner_vhca_id; 110 __u16 esw_owner_vhca_id;
111 __u16 rsvd0; 111 __u16 rsvd0;
112 __aligned_u64 vport_steering_icm_rx; 112 __aligned_u64 vport_steering_icm_rx;
113 __aligned_u64 vport_steering_icm_tx; 113 __aligned_u64 vport_steering_icm_tx;
114 struct mlx5_ib_uapi_reg reg_c0; 114 struct mlx5_ib_uapi_reg reg_c0;
115 }; 115 };
116 116
117 #endif 117 #endif
118 118
119 119
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