1 /* SPDX-License-Identifier: GPL-2.0 */ <<
2 1
3 #ifndef TRIDENTFB_DEBUG 2 #ifndef TRIDENTFB_DEBUG
4 #define TRIDENTFB_DEBUG 0 3 #define TRIDENTFB_DEBUG 0
5 #endif 4 #endif
6 5
7 #if TRIDENTFB_DEBUG 6 #if TRIDENTFB_DEBUG
8 #define debug(f, a...) printk("%s:" f, __fun !! 7 #define debug(f,a...) printk("%s:" f, __FUNCTION__ , ## a);mdelay(1000);
9 #else 8 #else
10 #define debug(f, a...) !! 9 #define debug(f,a...)
11 #endif 10 #endif
12 11
13 #define output(f, a...) pr_info("tridentfb: " !! 12 #define output(f, a...) printk("tridentfb: " f, ## a)
14 13
15 #define Kb (1024) 14 #define Kb (1024)
16 #define Mb (Kb*Kb) 15 #define Mb (Kb*Kb)
17 16
18 /* PCI IDS of supported cards temporarily here 17 /* PCI IDS of supported cards temporarily here */
19 18
20 #define CYBER9320 0x9320 19 #define CYBER9320 0x9320
21 #define CYBER9388 0x9388 20 #define CYBER9388 0x9388
22 #define CYBER9382 0x9382 /* the 21 #define CYBER9382 0x9382 /* the real PCI id for this is 9660 */
23 #define CYBER9385 0x9385 /* dit 22 #define CYBER9385 0x9385 /* ditto */
24 #define CYBER9397 0x9397 23 #define CYBER9397 0x9397
25 #define CYBER9397DVD 0x939A 24 #define CYBER9397DVD 0x939A
26 #define CYBER9520 0x9520 25 #define CYBER9520 0x9520
27 #define CYBER9525DVD 0x9525 26 #define CYBER9525DVD 0x9525
28 #define TGUI9440 0x9440 <<
29 #define TGUI9660 0x9660 27 #define TGUI9660 0x9660
30 #define PROVIDIA9685 0x9685 <<
31 #define IMAGE975 0x9750 28 #define IMAGE975 0x9750
32 #define IMAGE985 0x9850 29 #define IMAGE985 0x9850
33 #define BLADE3D 0x9880 30 #define BLADE3D 0x9880
34 #define CYBERBLADEE4 0x9540 31 #define CYBERBLADEE4 0x9540
35 #define CYBERBLADEi7 0x8400 32 #define CYBERBLADEi7 0x8400
36 #define CYBERBLADEi7D 0x8420 33 #define CYBERBLADEi7D 0x8420
37 #define CYBERBLADEi1 0x8500 34 #define CYBERBLADEi1 0x8500
38 #define CYBERBLADEi1D 0x8520 35 #define CYBERBLADEi1D 0x8520
39 #define CYBERBLADEAi1 0x8600 36 #define CYBERBLADEAi1 0x8600
40 #define CYBERBLADEAi1D 0x8620 37 #define CYBERBLADEAi1D 0x8620
41 #define CYBERBLADEXPAi1 0x8820 38 #define CYBERBLADEXPAi1 0x8820
42 #define CYBERBLADEXPm8 0x9910 39 #define CYBERBLADEXPm8 0x9910
43 #define CYBERBLADEXPm16 0x9930 40 #define CYBERBLADEXPm16 0x9930
44 41
>> 42 /* acceleration families */
>> 43 #define IMAGE 0
>> 44 #define BLADE 1
>> 45 #define XP 2
>> 46
>> 47 #define is_image(id)
>> 48 #define is_xp(id) ((id == CYBERBLADEXPAi1) ||\
>> 49 (id == CYBERBLADEXPm8) ||\
>> 50 (id == CYBERBLADEXPm16))
>> 51
>> 52 #define is_blade(id) ((id == BLADE3D) ||\
>> 53 (id == CYBERBLADEE4) ||\
>> 54 (id == CYBERBLADEi7) ||\
>> 55 (id == CYBERBLADEi7D) ||\
>> 56 (id == CYBERBLADEi1) ||\
>> 57 (id == CYBERBLADEi1D) ||\
>> 58 (id == CYBERBLADEAi1) ||\
>> 59 (id == CYBERBLADEAi1D))
>> 60
45 /* these defines are for 'lcd' variable */ 61 /* these defines are for 'lcd' variable */
46 #define LCD_STRETCH 0 62 #define LCD_STRETCH 0
47 #define LCD_CENTER 1 63 #define LCD_CENTER 1
48 #define LCD_BIOS 2 64 #define LCD_BIOS 2
49 65
>> 66 /* display types */
>> 67 #define DISPLAY_CRT 0
>> 68 #define DISPLAY_FP 1
>> 69
>> 70 #define flatpanel (displaytype == DISPLAY_FP)
>> 71
50 /* General Registers */ 72 /* General Registers */
51 #define SPR 0x1F /* Software Pr 73 #define SPR 0x1F /* Software Programming Register (videoram) */
52 74
53 /* 3C4 */ 75 /* 3C4 */
54 #define RevisionID 0x09 76 #define RevisionID 0x09
55 #define OldOrNew 0x0B 77 #define OldOrNew 0x0B
56 #define ConfPort1 0x0C 78 #define ConfPort1 0x0C
57 #define ConfPort2 0x0C 79 #define ConfPort2 0x0C
58 #define NewMode2 0x0D 80 #define NewMode2 0x0D
59 #define NewMode1 0x0E 81 #define NewMode1 0x0E
60 #define Protection 0x11 82 #define Protection 0x11
61 #define MCLKLow 0x16 83 #define MCLKLow 0x16
62 #define MCLKHigh 0x17 84 #define MCLKHigh 0x17
63 #define ClockLow 0x18 85 #define ClockLow 0x18
64 #define ClockHigh 0x19 86 #define ClockHigh 0x19
65 #define SSetup 0x20 87 #define SSetup 0x20
66 #define SKey 0x37 88 #define SKey 0x37
67 #define SPKey 0x57 89 #define SPKey 0x57
68 90
>> 91 /* 0x3x4 */
>> 92 #define CRTHTotal 0x00
>> 93 #define CRTHDispEnd 0x01
>> 94 #define CRTHBlankStart 0x02
>> 95 #define CRTHBlankEnd 0x03
>> 96 #define CRTHSyncStart 0x04
>> 97 #define CRTHSyncEnd 0x05
>> 98
>> 99 #define CRTVTotal 0x06
>> 100 #define CRTVDispEnd 0x12
>> 101 #define CRTVBlankStart 0x15
>> 102 #define CRTVBlankEnd 0x16
>> 103 #define CRTVSyncStart 0x10
>> 104 #define CRTVSyncEnd 0x11
>> 105
>> 106 #define CRTOverflow 0x07
>> 107 #define CRTPRowScan 0x08
>> 108 #define CRTMaxScanLine 0x09
>> 109 #define CRTModeControl 0x17
>> 110 #define CRTLineCompare 0x18
>> 111
69 /* 3x4 */ 112 /* 3x4 */
>> 113 #define StartAddrHigh 0x0C
>> 114 #define StartAddrLow 0x0D
>> 115 #define Offset 0x13
>> 116 #define Underline 0x14
>> 117 #define CRTCMode 0x17
70 #define CRTCModuleTest 0x1E 118 #define CRTCModuleTest 0x1E
71 #define FIFOControl 0x20 119 #define FIFOControl 0x20
72 #define LinearAddReg 0x21 120 #define LinearAddReg 0x21
73 #define DRAMTiming 0x23 121 #define DRAMTiming 0x23
74 #define New32 0x23 122 #define New32 0x23
75 #define RAMDACTiming 0x25 123 #define RAMDACTiming 0x25
76 #define CRTHiOrd 0x27 124 #define CRTHiOrd 0x27
77 #define AddColReg 0x29 125 #define AddColReg 0x29
78 #define InterfaceSel 0x2A 126 #define InterfaceSel 0x2A
79 #define HorizOverflow 0x2B 127 #define HorizOverflow 0x2B
80 #define GETest 0x2D 128 #define GETest 0x2D
81 #define Performance 0x2F 129 #define Performance 0x2F
82 #define GraphEngReg 0x36 130 #define GraphEngReg 0x36
83 #define I2C 0x37 131 #define I2C 0x37
84 #define PixelBusReg 0x38 132 #define PixelBusReg 0x38
85 #define PCIReg 0x39 133 #define PCIReg 0x39
86 #define DRAMControl 0x3A 134 #define DRAMControl 0x3A
87 #define MiscContReg 0x3C 135 #define MiscContReg 0x3C
88 #define CursorXLow 0x40 136 #define CursorXLow 0x40
89 #define CursorXHigh 0x41 137 #define CursorXHigh 0x41
90 #define CursorYLow 0x42 138 #define CursorYLow 0x42
91 #define CursorYHigh 0x43 139 #define CursorYHigh 0x43
92 #define CursorLocLow 0x44 140 #define CursorLocLow 0x44
93 #define CursorLocHigh 0x45 141 #define CursorLocHigh 0x45
94 #define CursorXOffset 0x46 142 #define CursorXOffset 0x46
95 #define CursorYOffset 0x47 143 #define CursorYOffset 0x47
96 #define CursorFG1 0x48 144 #define CursorFG1 0x48
97 #define CursorFG2 0x49 145 #define CursorFG2 0x49
98 #define CursorFG3 0x4A 146 #define CursorFG3 0x4A
99 #define CursorFG4 0x4B 147 #define CursorFG4 0x4B
100 #define CursorBG1 0x4C 148 #define CursorBG1 0x4C
101 #define CursorBG2 0x4D 149 #define CursorBG2 0x4D
102 #define CursorBG3 0x4E 150 #define CursorBG3 0x4E
103 #define CursorBG4 0x4F 151 #define CursorBG4 0x4F
104 #define CursorControl 0x50 152 #define CursorControl 0x50
105 #define PCIRetry 0x55 153 #define PCIRetry 0x55
106 #define PreEndControl 0x56 154 #define PreEndControl 0x56
107 #define PreEndFetch 0x57 155 #define PreEndFetch 0x57
108 #define PCIMaster 0x60 156 #define PCIMaster 0x60
109 #define Enhancement0 0x62 157 #define Enhancement0 0x62
110 #define NewEDO 0x64 158 #define NewEDO 0x64
111 #define TVinterface 0xC0 159 #define TVinterface 0xC0
112 #define TVMode 0xC1 160 #define TVMode 0xC1
113 #define ClockControl 0xCF 161 #define ClockControl 0xCF
114 162
115 163
116 /* 3CE */ 164 /* 3CE */
117 #define MiscExtFunc 0x0F 165 #define MiscExtFunc 0x0F
118 #define PowerStatus 0x23 166 #define PowerStatus 0x23
119 #define MiscIntContReg 0x2F 167 #define MiscIntContReg 0x2F
120 #define CyberControl 0x30 168 #define CyberControl 0x30
121 #define CyberEnhance 0x31 169 #define CyberEnhance 0x31
122 #define FPConfig 0x33 170 #define FPConfig 0x33
123 #define VertStretch 0x52 171 #define VertStretch 0x52
124 #define HorStretch 0x53 172 #define HorStretch 0x53
125 #define BiosMode 0x5c 173 #define BiosMode 0x5c
126 #define BiosReg 0x5d 174 #define BiosReg 0x5d
127 175
128 /* Graphics Engine */ <<
129 #define STATUS 0x2120 <<
130 #define OLDCMD 0x2124 <<
131 #define DRAWFL 0x2128 <<
132 #define OLDCLR 0x212C <<
133 #define OLDDST 0x2138 <<
134 #define OLDSRC 0x213C <<
135 #define OLDDIM 0x2140 <<
136 #define CMD 0x2144 <<
137 #define ROP 0x2148 <<
138 #define COLOR 0x2160 <<
139 #define BGCOLOR 0x2164 <<
140 #define SRC1 0x2100 <<
141 #define SRC2 0x2104 <<
142 #define DST1 0x2108 <<
143 #define DST2 0x210C <<
144 <<
145 #define ROP_S 0xCC <<
146 #define ROP_P 0xF0 <<
147 #define ROP_X 0x66 <<
148 176
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