1 # SPDX-License-Identifier: GPL-2.0-only << 2 << 3 config NO_DMA << 4 bool << 5 1 6 config HAS_DMA 2 config HAS_DMA 7 bool 3 bool 8 depends on !NO_DMA 4 depends on !NO_DMA 9 default y 5 default y 10 6 11 config DMA_OPS << 12 depends on HAS_DMA << 13 bool << 14 << 15 # << 16 # IOMMU drivers that can bypass the IOMMU code << 17 # mapping fast path should select this option << 18 # flag in struct device where applicable << 19 # << 20 config DMA_OPS_BYPASS << 21 bool << 22 << 23 # Lets platform IOMMU driver choose between by << 24 config ARCH_HAS_DMA_MAP_DIRECT << 25 bool << 26 << 27 config NEED_SG_DMA_FLAGS << 28 bool << 29 << 30 config NEED_SG_DMA_LENGTH 7 config NEED_SG_DMA_LENGTH 31 bool 8 bool 32 9 33 config NEED_DMA_MAP_STATE 10 config NEED_DMA_MAP_STATE 34 bool 11 bool 35 12 36 config ARCH_DMA_ADDR_T_64BIT 13 config ARCH_DMA_ADDR_T_64BIT 37 def_bool 64BIT || PHYS_ADDR_T_64BIT 14 def_bool 64BIT || PHYS_ADDR_T_64BIT 38 15 39 config ARCH_HAS_DMA_SET_MASK !! 16 config ARCH_HAS_DMA_COHERENCE_H 40 bool << 41 << 42 # << 43 # Select this option if the architecture needs << 44 # DMA_ATTR_WRITE_COMBINE. Normally the "uncac << 45 # people think of when saying write combine, s << 46 # need to enable this. << 47 # << 48 config ARCH_HAS_DMA_WRITE_COMBINE << 49 bool << 50 << 51 # << 52 # Select if the architectures provides the arc << 53 # << 54 config ARCH_HAS_DMA_MARK_CLEAN << 55 bool << 56 << 57 config DMA_DECLARE_COHERENT << 58 bool 17 bool 59 18 60 config ARCH_HAS_SETUP_DMA_OPS !! 19 config HAVE_GENERIC_DMA_COHERENT 61 bool << 62 << 63 config ARCH_HAS_TEARDOWN_DMA_OPS << 64 bool 20 bool 65 21 66 config ARCH_HAS_SYNC_DMA_FOR_DEVICE 22 config ARCH_HAS_SYNC_DMA_FOR_DEVICE 67 bool 23 bool 68 24 69 config ARCH_HAS_SYNC_DMA_FOR_CPU 25 config ARCH_HAS_SYNC_DMA_FOR_CPU 70 bool 26 bool 71 select NEED_DMA_MAP_STATE 27 select NEED_DMA_MAP_STATE 72 28 73 config ARCH_HAS_SYNC_DMA_FOR_CPU_ALL 29 config ARCH_HAS_SYNC_DMA_FOR_CPU_ALL 74 bool 30 bool 75 31 76 config ARCH_HAS_DMA_PREP_COHERENT !! 32 config ARCH_HAS_DMA_COHERENT_TO_PFN 77 bool 33 bool 78 34 79 config ARCH_HAS_FORCE_DMA_UNENCRYPTED !! 35 config ARCH_HAS_DMA_MMAP_PGPROT 80 bool 36 bool 81 37 82 # !! 38 config DMA_DIRECT_OPS 83 # Select this option if the architecture assum << 84 # by default. << 85 # << 86 config ARCH_DMA_DEFAULT_COHERENT << 87 bool 39 bool >> 40 depends on HAS_DMA 88 41 89 config SWIOTLB !! 42 config DMA_NONCOHERENT_CACHE_SYNC 90 bool 43 bool 91 select NEED_DMA_MAP_STATE !! 44 depends on DMA_DIRECT_OPS 92 << 93 config SWIOTLB_DYNAMIC << 94 bool "Dynamic allocation of DMA bounce << 95 default n << 96 depends on SWIOTLB << 97 help << 98 This enables dynamic resizing of the << 99 starts with one memory pool at boot << 100 pools as needed. To reduce run-time << 101 may have to specify a smaller size o << 102 "swiotlb=" on the kernel command lin << 103 << 104 If unsure, say N. << 105 << 106 config DMA_BOUNCE_UNALIGNED_KMALLOC << 107 bool << 108 depends on SWIOTLB << 109 << 110 config DMA_NEED_SYNC << 111 def_bool ARCH_HAS_SYNC_DMA_FOR_DEVICE << 112 ARCH_HAS_SYNC_DMA_FOR_CPU_ALL << 113 SWIOTLB << 114 << 115 config DMA_RESTRICTED_POOL << 116 bool "DMA Restricted Pool" << 117 depends on OF && OF_RESERVED_MEM && SW << 118 help << 119 This enables support for restricted << 120 DMA memory protection on systems wit << 121 capabilities, such as those lacking << 122 << 123 For more information see << 124 <Documentation/devicetree/bindings/r << 125 and <kernel/dma/swiotlb.c>. << 126 If unsure, say "n". << 127 << 128 # << 129 # Should be selected if we can mmap non-cohere << 130 # The only thing that is really required is a << 131 # in the pagetables << 132 # << 133 config DMA_NONCOHERENT_MMAP << 134 default y if !MMU << 135 bool << 136 << 137 config DMA_COHERENT_POOL << 138 select GENERIC_ALLOCATOR << 139 bool << 140 << 141 config DMA_GLOBAL_POOL << 142 select DMA_DECLARE_COHERENT << 143 depends on !ARCH_HAS_DMA_SET_UNCACHED << 144 depends on !DMA_DIRECT_REMAP << 145 bool << 146 << 147 config DMA_DIRECT_REMAP << 148 bool << 149 select DMA_COHERENT_POOL << 150 select DMA_NONCOHERENT_MMAP << 151 << 152 # << 153 # Fallback to arch code for DMA allocations. << 154 # << 155 config ARCH_HAS_DMA_ALLOC << 156 depends on !ARCH_HAS_DMA_SET_UNCACHED << 157 depends on !DMA_DIRECT_REMAP << 158 depends on !DMA_GLOBAL_POOL << 159 bool << 160 << 161 config DMA_CMA << 162 bool "DMA Contiguous Memory Allocator" << 163 depends on HAVE_DMA_CONTIGUOUS && CMA << 164 help << 165 This enables the Contiguous Memory A << 166 to allocate big physically-contiguou << 167 hardware components that do not supp << 168 << 169 You can disable CMA by specifying "c << 170 line. << 171 << 172 For more information see <kernel/dma << 173 If unsure, say "n". << 174 << 175 if DMA_CMA << 176 << 177 config DMA_NUMA_CMA << 178 bool "Enable separate DMA Contiguous M << 179 depends on NUMA << 180 help << 181 Enable this option to get numa CMA a << 182 can get local memory by DMA coherent << 183 << 184 You can set the size of pernuma CMA << 185 or set the node id and its size of C << 186 <node>:size[,<node>:size]" on the ke << 187 << 188 comment "Default contiguous memory area size:" << 189 << 190 config CMA_SIZE_MBYTES << 191 int "Size in Mega Bytes" << 192 depends on !CMA_SIZE_SEL_PERCENTAGE << 193 default 0 if X86 << 194 default 16 << 195 help << 196 Defines the size (in MiB) of the def << 197 Memory Allocator. If the size of 0 << 198 default, but it can be enabled by pa << 199 << 200 << 201 config CMA_SIZE_PERCENTAGE << 202 int "Percentage of total memory" << 203 depends on !CMA_SIZE_SEL_MBYTES << 204 default 0 if X86 << 205 default 10 << 206 help << 207 Defines the size of the default memo << 208 Allocator as a percentage of the tot << 209 If 0 percent is selected, CMA is dis << 210 enabled by passing cma=size[MG] to t << 211 << 212 choice << 213 prompt "Selected region size" << 214 default CMA_SIZE_SEL_MBYTES << 215 << 216 config CMA_SIZE_SEL_MBYTES << 217 bool "Use mega bytes value only" << 218 << 219 config CMA_SIZE_SEL_PERCENTAGE << 220 bool "Use percentage value only" << 221 << 222 config CMA_SIZE_SEL_MIN << 223 bool "Use lower value (minimum)" << 224 << 225 config CMA_SIZE_SEL_MAX << 226 bool "Use higher value (maximum)" << 227 << 228 endchoice << 229 << 230 config CMA_ALIGNMENT << 231 int "Maximum PAGE_SIZE order of alignm << 232 range 2 12 << 233 default 8 << 234 help << 235 DMA mapping framework by default ali << 236 PAGE_SIZE order which is greater tha << 237 size. This works well for buffers up << 238 for larger buffers it just a memory << 239 specify the maximum PAGE_SIZE order << 240 buffers will be aligned only to this << 241 expressed as a power of two multipli << 242 << 243 For example, if your system defaults << 244 of 8 means that the buffers will be << 245 45 246 If unsure, leave the default value " !! 46 config DMA_VIRT_OPS 247 !! 47 bool 248 endif !! 48 depends on HAS_DMA 249 49 250 config DMA_API_DEBUG !! 50 config SWIOTLB 251 bool "Enable debugging of DMA-API usag !! 51 bool >> 52 select DMA_DIRECT_OPS 252 select NEED_DMA_MAP_STATE 53 select NEED_DMA_MAP_STATE 253 help << 254 Enable this option to debug the use << 255 With this option you will be able to << 256 drivers like double-freeing of DMA m << 257 were never allocated. << 258 << 259 This option causes a performance deg << 260 debug device drivers and dma interac << 261 << 262 If unsure, say N. << 263 << 264 config DMA_API_DEBUG_SG << 265 bool "Debug DMA scatter-gather usage" << 266 default y << 267 depends on DMA_API_DEBUG << 268 help << 269 Perform extra checking that callers << 270 appropriate segment length/boundary << 271 preparing DMA scatterlists. << 272 << 273 This is particularly likely to have << 274 dma_map_sg() API is used for general << 275 preparing literal scatter-gather des << 276 unexpected behaviour from DMA API im << 277 is technically out-of-spec. << 278 << 279 If unsure, say N. << 280 << 281 config DMA_MAP_BENCHMARK << 282 bool "Enable benchmarking of streaming << 283 depends on DEBUG_FS << 284 help << 285 Provides /sys/kernel/debug/dma_map_b << 286 performance of dma_(un)map_page. << 287 << 288 See tools/testing/selftests/dma/dma_ <<
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