1 # SPDX-License-Identifier: GPL-2.0-only !! 1 # Select this to activate the generic irq options below >> 2 config HAVE_GENERIC_HARDIRQS >> 3 bool >> 4 >> 5 if HAVE_GENERIC_HARDIRQS 2 menu "IRQ subsystem" 6 menu "IRQ subsystem" >> 7 # >> 8 # Interrupt subsystem related configuration options >> 9 # >> 10 config GENERIC_HARDIRQS >> 11 def_bool y >> 12 3 # Options selectable by the architecture code 13 # Options selectable by the architecture code 4 14 5 # Make sparse irq Kconfig switch below availab 15 # Make sparse irq Kconfig switch below available 6 config MAY_HAVE_SPARSE_IRQ 16 config MAY_HAVE_SPARSE_IRQ 7 bool 17 bool 8 18 9 # Legacy support, required for itanic << 10 config GENERIC_IRQ_LEGACY << 11 bool << 12 << 13 # Enable the generic irq autoprobe mechanism 19 # Enable the generic irq autoprobe mechanism 14 config GENERIC_IRQ_PROBE 20 config GENERIC_IRQ_PROBE 15 bool 21 bool 16 22 17 # Use the generic /proc/interrupts implementat 23 # Use the generic /proc/interrupts implementation 18 config GENERIC_IRQ_SHOW 24 config GENERIC_IRQ_SHOW 19 bool 25 bool 20 26 21 # Print level/edge extra information 27 # Print level/edge extra information 22 config GENERIC_IRQ_SHOW_LEVEL 28 config GENERIC_IRQ_SHOW_LEVEL 23 bool 29 bool 24 30 25 # Supports effective affinity mask << 26 config GENERIC_IRQ_EFFECTIVE_AFF_MASK << 27 depends on SMP << 28 bool << 29 << 30 # Support for delayed migration from interrupt 31 # Support for delayed migration from interrupt context 31 config GENERIC_PENDING_IRQ 32 config GENERIC_PENDING_IRQ 32 bool 33 bool 33 34 34 # Support for generic irq migrating off cpu be << 35 config GENERIC_IRQ_MIGRATION << 36 bool << 37 << 38 # Alpha specific irq affinity mechanism 35 # Alpha specific irq affinity mechanism 39 config AUTO_IRQ_AFFINITY 36 config AUTO_IRQ_AFFINITY 40 bool 37 bool 41 38 42 # Interrupt injection mechanism << 43 config GENERIC_IRQ_INJECTION << 44 bool << 45 << 46 # Tasklet based software resend for pending in 39 # Tasklet based software resend for pending interrupts on enable_irq() 47 config HARDIRQS_SW_RESEND 40 config HARDIRQS_SW_RESEND 48 bool 41 bool 49 42 >> 43 # Preflow handler support for fasteoi (sparc64) >> 44 config IRQ_PREFLOW_FASTEOI >> 45 bool >> 46 50 # Edge style eoi based handler (cell) 47 # Edge style eoi based handler (cell) 51 config IRQ_EDGE_EOI_HANDLER 48 config IRQ_EDGE_EOI_HANDLER 52 bool 49 bool 53 50 54 # Generic configurable interrupt chip implemen 51 # Generic configurable interrupt chip implementation 55 config GENERIC_IRQ_CHIP 52 config GENERIC_IRQ_CHIP 56 bool 53 bool 57 select IRQ_DOMAIN << 58 54 59 # Generic irq_domain hw <--> linux irq number 55 # Generic irq_domain hw <--> linux irq number translation 60 config IRQ_DOMAIN 56 config IRQ_DOMAIN 61 bool 57 bool 62 58 63 # Support for simulated interrupts !! 59 config IRQ_DOMAIN_DEBUG 64 config IRQ_SIM !! 60 bool "Expose hardware/virtual IRQ mapping via debugfs" 65 bool !! 61 depends on IRQ_DOMAIN && DEBUG_FS 66 select IRQ_WORK !! 62 help 67 select IRQ_DOMAIN !! 63 This option will show the mapping relationship between hardware irq 68 !! 64 numbers and Linux irq numbers. The mapping is exposed via debugfs 69 # Support for hierarchical irq domains !! 65 in the file "irq_domain_mapping". 70 config IRQ_DOMAIN_HIERARCHY << 71 bool << 72 select IRQ_DOMAIN << 73 << 74 # Support for obsolete non-mapping irq domains << 75 config IRQ_DOMAIN_NOMAP << 76 bool << 77 select IRQ_DOMAIN << 78 << 79 # Support for hierarchical fasteoi+edge and fa << 80 config IRQ_FASTEOI_HIERARCHY_HANDLERS << 81 bool << 82 << 83 # Generic IRQ IPI support << 84 config GENERIC_IRQ_IPI << 85 bool << 86 depends on SMP << 87 select IRQ_DOMAIN_HIERARCHY << 88 << 89 # Generic IRQ IPI Mux support << 90 config GENERIC_IRQ_IPI_MUX << 91 bool << 92 depends on SMP << 93 << 94 # Generic MSI hierarchical interrupt domain su << 95 config GENERIC_MSI_IRQ << 96 bool << 97 select IRQ_DOMAIN_HIERARCHY << 98 << 99 config IRQ_MSI_IOMMU << 100 bool << 101 << 102 config IRQ_TIMINGS << 103 bool << 104 << 105 config GENERIC_IRQ_MATRIX_ALLOCATOR << 106 bool << 107 << 108 config GENERIC_IRQ_RESERVATION_MODE << 109 bool << 110 66 111 # Snapshot for interrupt statistics !! 67 If you don't know what this means you don't need it. 112 config GENERIC_IRQ_STAT_SNAPSHOT << 113 bool << 114 68 115 # Support forced irq threading 69 # Support forced irq threading 116 config IRQ_FORCED_THREADING 70 config IRQ_FORCED_THREADING 117 bool 71 bool 118 72 119 config SPARSE_IRQ 73 config SPARSE_IRQ 120 bool "Support sparse irq numbering" if 74 bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ 121 help !! 75 ---help--- 122 76 123 Sparse irq numbering is useful for d 77 Sparse irq numbering is useful for distro kernels that want 124 to define a high CONFIG_NR_CPUS valu 78 to define a high CONFIG_NR_CPUS value but still want to have 125 low kernel memory footprint on small 79 low kernel memory footprint on smaller machines. 126 80 127 ( Sparse irqs can also be beneficial 81 ( Sparse irqs can also be beneficial on NUMA boxes, as they spread 128 out the interrupt descriptors in a 82 out the interrupt descriptors in a more NUMA-friendly way. ) 129 83 130 If you don't know what to do here, s 84 If you don't know what to do here, say N. 131 85 132 config GENERIC_IRQ_DEBUGFS << 133 bool "Expose irq internals in debugfs" << 134 depends on DEBUG_FS << 135 select GENERIC_IRQ_INJECTION << 136 default n << 137 help << 138 << 139 Exposes internal state information t << 140 developers and debugging of hard to << 141 << 142 If you don't know what to do here, s << 143 << 144 endmenu 86 endmenu 145 !! 87 endif 146 config GENERIC_IRQ_MULTI_HANDLER << 147 bool << 148 help << 149 Allow to specify the low level IRQ h << 150 << 151 # Cavium Octeon is the last system to use this << 152 # Do not even think of enabling this on any ne << 153 config DEPRECATED_IRQ_CPU_ONOFFLINE << 154 bool << 155 depends on CAVIUM_OCTEON_SOC << 156 default CAVIUM_OCTEON_SOC <<
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