1 # SPDX-License-Identifier: GPL-2.0-only <<
2 menu "IRQ subsystem" 1 menu "IRQ subsystem"
3 # Options selectable by the architecture code 2 # Options selectable by the architecture code
4 3
5 # Make sparse irq Kconfig switch below availab 4 # Make sparse irq Kconfig switch below available
6 config MAY_HAVE_SPARSE_IRQ 5 config MAY_HAVE_SPARSE_IRQ
7 bool 6 bool
8 7
9 # Legacy support, required for itanic 8 # Legacy support, required for itanic
10 config GENERIC_IRQ_LEGACY 9 config GENERIC_IRQ_LEGACY
11 bool 10 bool
12 11
13 # Enable the generic irq autoprobe mechanism 12 # Enable the generic irq autoprobe mechanism
14 config GENERIC_IRQ_PROBE 13 config GENERIC_IRQ_PROBE
15 bool 14 bool
16 15
17 # Use the generic /proc/interrupts implementat 16 # Use the generic /proc/interrupts implementation
18 config GENERIC_IRQ_SHOW 17 config GENERIC_IRQ_SHOW
19 bool 18 bool
20 19
21 # Print level/edge extra information 20 # Print level/edge extra information
22 config GENERIC_IRQ_SHOW_LEVEL 21 config GENERIC_IRQ_SHOW_LEVEL
23 bool 22 bool
24 23
25 # Supports effective affinity mask !! 24 # Facility to allocate a hardware interrupt. This is legacy support
26 config GENERIC_IRQ_EFFECTIVE_AFF_MASK !! 25 # and should not be used in new code. Use irq domains instead.
27 depends on SMP !! 26 config GENERIC_IRQ_LEGACY_ALLOC_HWIRQ
28 bool 27 bool
29 28
30 # Support for delayed migration from interrupt 29 # Support for delayed migration from interrupt context
31 config GENERIC_PENDING_IRQ 30 config GENERIC_PENDING_IRQ
32 bool 31 bool
33 32
34 # Support for generic irq migrating off cpu be 33 # Support for generic irq migrating off cpu before the cpu is offline.
35 config GENERIC_IRQ_MIGRATION 34 config GENERIC_IRQ_MIGRATION
36 bool 35 bool
37 36
38 # Alpha specific irq affinity mechanism 37 # Alpha specific irq affinity mechanism
39 config AUTO_IRQ_AFFINITY 38 config AUTO_IRQ_AFFINITY
40 bool 39 bool
41 40
42 # Interrupt injection mechanism <<
43 config GENERIC_IRQ_INJECTION <<
44 bool <<
45 <<
46 # Tasklet based software resend for pending in 41 # Tasklet based software resend for pending interrupts on enable_irq()
47 config HARDIRQS_SW_RESEND 42 config HARDIRQS_SW_RESEND
48 bool 43 bool
49 44
>> 45 # Preflow handler support for fasteoi (sparc64)
>> 46 config IRQ_PREFLOW_FASTEOI
>> 47 bool
>> 48
50 # Edge style eoi based handler (cell) 49 # Edge style eoi based handler (cell)
51 config IRQ_EDGE_EOI_HANDLER 50 config IRQ_EDGE_EOI_HANDLER
52 bool 51 bool
53 52
54 # Generic configurable interrupt chip implemen 53 # Generic configurable interrupt chip implementation
55 config GENERIC_IRQ_CHIP 54 config GENERIC_IRQ_CHIP
56 bool 55 bool
57 select IRQ_DOMAIN 56 select IRQ_DOMAIN
58 57
59 # Generic irq_domain hw <--> linux irq number 58 # Generic irq_domain hw <--> linux irq number translation
60 config IRQ_DOMAIN 59 config IRQ_DOMAIN
61 bool 60 bool
62 61
63 # Support for simulated interrupts <<
64 config IRQ_SIM <<
65 bool <<
66 select IRQ_WORK <<
67 select IRQ_DOMAIN <<
68 <<
69 # Support for hierarchical irq domains 62 # Support for hierarchical irq domains
70 config IRQ_DOMAIN_HIERARCHY 63 config IRQ_DOMAIN_HIERARCHY
71 bool 64 bool
72 select IRQ_DOMAIN 65 select IRQ_DOMAIN
73 66
74 # Support for obsolete non-mapping irq domains <<
75 config IRQ_DOMAIN_NOMAP <<
76 bool <<
77 select IRQ_DOMAIN <<
78 <<
79 # Support for hierarchical fasteoi+edge and fa <<
80 config IRQ_FASTEOI_HIERARCHY_HANDLERS <<
81 bool <<
82 <<
83 # Generic IRQ IPI support 67 # Generic IRQ IPI support
84 config GENERIC_IRQ_IPI 68 config GENERIC_IRQ_IPI
85 bool 69 bool
86 depends on SMP <<
87 select IRQ_DOMAIN_HIERARCHY <<
88 70
89 # Generic IRQ IPI Mux support !! 71 # Generic MSI interrupt support
90 config GENERIC_IRQ_IPI_MUX !! 72 config GENERIC_MSI_IRQ
91 bool 73 bool
92 depends on SMP <<
93 74
94 # Generic MSI hierarchical interrupt domain su 75 # Generic MSI hierarchical interrupt domain support
95 config GENERIC_MSI_IRQ !! 76 config GENERIC_MSI_IRQ_DOMAIN
96 bool 77 bool
97 select IRQ_DOMAIN_HIERARCHY 78 select IRQ_DOMAIN_HIERARCHY
>> 79 select GENERIC_MSI_IRQ
98 80
99 config IRQ_MSI_IOMMU !! 81 config HANDLE_DOMAIN_IRQ
100 bool <<
101 <<
102 config IRQ_TIMINGS <<
103 bool 82 bool
104 83
105 config GENERIC_IRQ_MATRIX_ALLOCATOR !! 84 config IRQ_DOMAIN_DEBUG
106 bool !! 85 bool "Expose hardware/virtual IRQ mapping via debugfs"
107 !! 86 depends on IRQ_DOMAIN && DEBUG_FS
108 config GENERIC_IRQ_RESERVATION_MODE !! 87 help
109 bool !! 88 This option will show the mapping relationship between hardware irq
>> 89 numbers and Linux irq numbers. The mapping is exposed via debugfs
>> 90 in the file "irq_domain_mapping".
110 91
111 # Snapshot for interrupt statistics !! 92 If you don't know what this means you don't need it.
112 config GENERIC_IRQ_STAT_SNAPSHOT <<
113 bool <<
114 93
115 # Support forced irq threading 94 # Support forced irq threading
116 config IRQ_FORCED_THREADING 95 config IRQ_FORCED_THREADING
117 bool 96 bool
118 97
119 config SPARSE_IRQ 98 config SPARSE_IRQ
120 bool "Support sparse irq numbering" if 99 bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ
121 help !! 100 ---help---
122 101
123 Sparse irq numbering is useful for d 102 Sparse irq numbering is useful for distro kernels that want
124 to define a high CONFIG_NR_CPUS valu 103 to define a high CONFIG_NR_CPUS value but still want to have
125 low kernel memory footprint on small 104 low kernel memory footprint on smaller machines.
126 105
127 ( Sparse irqs can also be beneficial 106 ( Sparse irqs can also be beneficial on NUMA boxes, as they spread
128 out the interrupt descriptors in a 107 out the interrupt descriptors in a more NUMA-friendly way. )
129 108
130 If you don't know what to do here, s 109 If you don't know what to do here, say N.
131 110
132 config GENERIC_IRQ_DEBUGFS <<
133 bool "Expose irq internals in debugfs" <<
134 depends on DEBUG_FS <<
135 select GENERIC_IRQ_INJECTION <<
136 default n <<
137 help <<
138 <<
139 Exposes internal state information t <<
140 developers and debugging of hard to <<
141 <<
142 If you don't know what to do here, s <<
143 <<
144 endmenu 111 endmenu
145 <<
146 config GENERIC_IRQ_MULTI_HANDLER <<
147 bool <<
148 help <<
149 Allow to specify the low level IRQ h <<
150 <<
151 # Cavium Octeon is the last system to use this <<
152 # Do not even think of enabling this on any ne <<
153 config DEPRECATED_IRQ_CPU_ONOFFLINE <<
154 bool <<
155 depends on CAVIUM_OCTEON_SOC <<
156 default CAVIUM_OCTEON_SOC <<
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