1 # SPDX-License-Identifier: GPL-2.0-only 1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "IRQ subsystem" 2 menu "IRQ subsystem"
3 # Options selectable by the architecture code 3 # Options selectable by the architecture code
4 4
5 # Make sparse irq Kconfig switch below availab 5 # Make sparse irq Kconfig switch below available
6 config MAY_HAVE_SPARSE_IRQ 6 config MAY_HAVE_SPARSE_IRQ
7 bool 7 bool
8 8
9 # Legacy support, required for itanic 9 # Legacy support, required for itanic
10 config GENERIC_IRQ_LEGACY 10 config GENERIC_IRQ_LEGACY
11 bool 11 bool
12 12
13 # Enable the generic irq autoprobe mechanism 13 # Enable the generic irq autoprobe mechanism
14 config GENERIC_IRQ_PROBE 14 config GENERIC_IRQ_PROBE
15 bool 15 bool
16 16
17 # Use the generic /proc/interrupts implementat 17 # Use the generic /proc/interrupts implementation
18 config GENERIC_IRQ_SHOW 18 config GENERIC_IRQ_SHOW
19 bool 19 bool
20 20
21 # Print level/edge extra information 21 # Print level/edge extra information
22 config GENERIC_IRQ_SHOW_LEVEL 22 config GENERIC_IRQ_SHOW_LEVEL
23 bool 23 bool
24 24
25 # Supports effective affinity mask 25 # Supports effective affinity mask
26 config GENERIC_IRQ_EFFECTIVE_AFF_MASK 26 config GENERIC_IRQ_EFFECTIVE_AFF_MASK
27 depends on SMP <<
28 bool 27 bool
29 28
30 # Support for delayed migration from interrupt 29 # Support for delayed migration from interrupt context
31 config GENERIC_PENDING_IRQ 30 config GENERIC_PENDING_IRQ
32 bool 31 bool
33 32
34 # Support for generic irq migrating off cpu be 33 # Support for generic irq migrating off cpu before the cpu is offline.
35 config GENERIC_IRQ_MIGRATION 34 config GENERIC_IRQ_MIGRATION
36 bool 35 bool
37 36
38 # Alpha specific irq affinity mechanism 37 # Alpha specific irq affinity mechanism
39 config AUTO_IRQ_AFFINITY 38 config AUTO_IRQ_AFFINITY
40 bool 39 bool
41 40
42 # Interrupt injection mechanism 41 # Interrupt injection mechanism
43 config GENERIC_IRQ_INJECTION 42 config GENERIC_IRQ_INJECTION
44 bool 43 bool
45 44
46 # Tasklet based software resend for pending in 45 # Tasklet based software resend for pending interrupts on enable_irq()
47 config HARDIRQS_SW_RESEND 46 config HARDIRQS_SW_RESEND
48 bool 47 bool
49 48
50 # Edge style eoi based handler (cell) 49 # Edge style eoi based handler (cell)
51 config IRQ_EDGE_EOI_HANDLER 50 config IRQ_EDGE_EOI_HANDLER
52 bool 51 bool
53 52
54 # Generic configurable interrupt chip implemen 53 # Generic configurable interrupt chip implementation
55 config GENERIC_IRQ_CHIP 54 config GENERIC_IRQ_CHIP
56 bool 55 bool
57 select IRQ_DOMAIN 56 select IRQ_DOMAIN
58 57
59 # Generic irq_domain hw <--> linux irq number 58 # Generic irq_domain hw <--> linux irq number translation
60 config IRQ_DOMAIN 59 config IRQ_DOMAIN
61 bool 60 bool
62 61
63 # Support for simulated interrupts 62 # Support for simulated interrupts
64 config IRQ_SIM 63 config IRQ_SIM
65 bool 64 bool
66 select IRQ_WORK 65 select IRQ_WORK
67 select IRQ_DOMAIN 66 select IRQ_DOMAIN
68 67
69 # Support for hierarchical irq domains 68 # Support for hierarchical irq domains
70 config IRQ_DOMAIN_HIERARCHY 69 config IRQ_DOMAIN_HIERARCHY
71 bool 70 bool
72 select IRQ_DOMAIN 71 select IRQ_DOMAIN
73 72
74 # Support for obsolete non-mapping irq domains 73 # Support for obsolete non-mapping irq domains
75 config IRQ_DOMAIN_NOMAP 74 config IRQ_DOMAIN_NOMAP
76 bool 75 bool
77 select IRQ_DOMAIN 76 select IRQ_DOMAIN
78 77
79 # Support for hierarchical fasteoi+edge and fa 78 # Support for hierarchical fasteoi+edge and fasteoi+level handlers
80 config IRQ_FASTEOI_HIERARCHY_HANDLERS 79 config IRQ_FASTEOI_HIERARCHY_HANDLERS
81 bool 80 bool
82 81
83 # Generic IRQ IPI support 82 # Generic IRQ IPI support
84 config GENERIC_IRQ_IPI 83 config GENERIC_IRQ_IPI
85 bool 84 bool
86 depends on SMP <<
87 select IRQ_DOMAIN_HIERARCHY 85 select IRQ_DOMAIN_HIERARCHY
88 86
89 # Generic IRQ IPI Mux support !! 87 # Generic MSI interrupt support
90 config GENERIC_IRQ_IPI_MUX !! 88 config GENERIC_MSI_IRQ
91 bool 89 bool
92 depends on SMP <<
93 90
94 # Generic MSI hierarchical interrupt domain su 91 # Generic MSI hierarchical interrupt domain support
95 config GENERIC_MSI_IRQ !! 92 config GENERIC_MSI_IRQ_DOMAIN
96 bool 93 bool
97 select IRQ_DOMAIN_HIERARCHY 94 select IRQ_DOMAIN_HIERARCHY
>> 95 select GENERIC_MSI_IRQ
98 96
99 config IRQ_MSI_IOMMU 97 config IRQ_MSI_IOMMU
100 bool 98 bool
101 99
>> 100 config HANDLE_DOMAIN_IRQ
>> 101 bool
>> 102
102 config IRQ_TIMINGS 103 config IRQ_TIMINGS
103 bool 104 bool
104 105
105 config GENERIC_IRQ_MATRIX_ALLOCATOR 106 config GENERIC_IRQ_MATRIX_ALLOCATOR
106 bool 107 bool
107 108
108 config GENERIC_IRQ_RESERVATION_MODE 109 config GENERIC_IRQ_RESERVATION_MODE
109 bool 110 bool
110 111
111 # Snapshot for interrupt statistics <<
112 config GENERIC_IRQ_STAT_SNAPSHOT <<
113 bool <<
114 <<
115 # Support forced irq threading 112 # Support forced irq threading
116 config IRQ_FORCED_THREADING 113 config IRQ_FORCED_THREADING
117 bool 114 bool
118 115
119 config SPARSE_IRQ 116 config SPARSE_IRQ
120 bool "Support sparse irq numbering" if 117 bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ
121 help 118 help
122 119
123 Sparse irq numbering is useful for d 120 Sparse irq numbering is useful for distro kernels that want
124 to define a high CONFIG_NR_CPUS valu 121 to define a high CONFIG_NR_CPUS value but still want to have
125 low kernel memory footprint on small 122 low kernel memory footprint on smaller machines.
126 123
127 ( Sparse irqs can also be beneficial 124 ( Sparse irqs can also be beneficial on NUMA boxes, as they spread
128 out the interrupt descriptors in a 125 out the interrupt descriptors in a more NUMA-friendly way. )
129 126
130 If you don't know what to do here, s 127 If you don't know what to do here, say N.
131 128
132 config GENERIC_IRQ_DEBUGFS 129 config GENERIC_IRQ_DEBUGFS
133 bool "Expose irq internals in debugfs" 130 bool "Expose irq internals in debugfs"
134 depends on DEBUG_FS 131 depends on DEBUG_FS
135 select GENERIC_IRQ_INJECTION 132 select GENERIC_IRQ_INJECTION
136 default n 133 default n
137 help 134 help
138 135
139 Exposes internal state information t 136 Exposes internal state information through debugfs. Mostly for
140 developers and debugging of hard to 137 developers and debugging of hard to diagnose interrupt problems.
141 138
142 If you don't know what to do here, s 139 If you don't know what to do here, say N.
143 140
144 endmenu 141 endmenu
145 142
146 config GENERIC_IRQ_MULTI_HANDLER 143 config GENERIC_IRQ_MULTI_HANDLER
147 bool 144 bool
148 help 145 help
149 Allow to specify the low level IRQ h 146 Allow to specify the low level IRQ handler at run time.
150 <<
151 # Cavium Octeon is the last system to use this <<
152 # Do not even think of enabling this on any ne <<
153 config DEPRECATED_IRQ_CPU_ONOFFLINE <<
154 bool <<
155 depends on CAVIUM_OCTEON_SOC <<
156 default CAVIUM_OCTEON_SOC <<
Linux® is a registered trademark of Linus Torvalds in the United States and other countries.
TOMOYO® is a registered trademark of NTT DATA CORPORATION.