1 /* -*- linux-c -*- --------------------------- 1 /* -*- linux-c -*- ------------------------------------------------------- *
2 * 2 *
3 * Copyright 2002-2004 H. Peter Anvin - All 3 * Copyright 2002-2004 H. Peter Anvin - All Rights Reserved
4 * 4 *
5 * This program is free software; you can re 5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Pub 6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation, Inc., 53 Te 7 * the Free Software Foundation, Inc., 53 Temple Place Ste 330,
8 * Boston MA 02111-1307, USA; either version 8 * Boston MA 02111-1307, USA; either version 2 of the License, or
9 * (at your option) any later version; incor 9 * (at your option) any later version; incorporated herein by reference.
10 * 10 *
11 * ------------------------------------------- 11 * ----------------------------------------------------------------------- */
12 12
13 /* 13 /*
14 * raid6altivec$#.c 14 * raid6altivec$#.c
15 * 15 *
16 * $#-way unrolled portable integer math RAID- 16 * $#-way unrolled portable integer math RAID-6 instruction set
17 * 17 *
18 * This file is postprocessed using unroll.awk 18 * This file is postprocessed using unroll.awk
19 * 19 *
20 * <benh> hpa: in process, 20 * <benh> hpa: in process,
21 * you can just "steal" the vec unit with enab 21 * you can just "steal" the vec unit with enable_kernel_altivec() (but
22 * bracked this with preempt_disable/enable or 22 * bracked this with preempt_disable/enable or in a lock)
23 */ 23 */
24 24
25 #include <linux/raid/pq.h> 25 #include <linux/raid/pq.h>
26 26
27 #ifdef CONFIG_ALTIVEC <<
28 <<
29 #include <altivec.h> 27 #include <altivec.h>
30 #ifdef __KERNEL__ 28 #ifdef __KERNEL__
31 # include <asm/cputable.h> 29 # include <asm/cputable.h>
32 # include <asm/switch_to.h> 30 # include <asm/switch_to.h>
33 #endif /* __KERNEL__ */ <<
34 31
35 /* 32 /*
36 * This is the C data type to use. We use a v 33 * This is the C data type to use. We use a vector of
37 * signed char so vec_cmpgt() will generate th 34 * signed char so vec_cmpgt() will generate the right
38 * instruction. 35 * instruction.
39 */ 36 */
40 37
41 typedef vector signed char unative_t; 38 typedef vector signed char unative_t;
42 39
43 #define NBYTES(x) ((vector signed char) {x,x,x 40 #define NBYTES(x) ((vector signed char) {x,x,x,x, x,x,x,x, x,x,x,x, x,x,x,x})
44 #define NSIZE sizeof(unative_t) 41 #define NSIZE sizeof(unative_t)
45 42
46 /* 43 /*
47 * The SHLBYTE() operation shifts each byte le 44 * The SHLBYTE() operation shifts each byte left by 1, *not*
48 * rolling over into the next byte 45 * rolling over into the next byte
49 */ 46 */
50 static inline __attribute_const__ unative_t SH 47 static inline __attribute_const__ unative_t SHLBYTE(unative_t v)
51 { 48 {
52 return vec_add(v,v); 49 return vec_add(v,v);
53 } 50 }
54 51
55 /* 52 /*
56 * The MASK() operation returns 0xFF in any by 53 * The MASK() operation returns 0xFF in any byte for which the high
57 * bit is 1, 0x00 for any byte for which the h 54 * bit is 1, 0x00 for any byte for which the high bit is 0.
58 */ 55 */
59 static inline __attribute_const__ unative_t MA 56 static inline __attribute_const__ unative_t MASK(unative_t v)
60 { 57 {
61 unative_t zv = NBYTES(0); 58 unative_t zv = NBYTES(0);
62 59
63 /* vec_cmpgt returns a vector bool cha 60 /* vec_cmpgt returns a vector bool char; thus the need for the cast */
64 return (unative_t)vec_cmpgt(zv, v); 61 return (unative_t)vec_cmpgt(zv, v);
65 } 62 }
66 63
67 64
68 /* This is noinline to make damned sure that g 65 /* This is noinline to make damned sure that gcc doesn't move any of the
69 Altivec code around the enable/disable code 66 Altivec code around the enable/disable code */
70 static void noinline 67 static void noinline
71 raid6_altivec$#_gen_syndrome_real(int disks, s 68 raid6_altivec$#_gen_syndrome_real(int disks, size_t bytes, void **ptrs)
72 { 69 {
73 u8 **dptr = (u8 **)ptrs; 70 u8 **dptr = (u8 **)ptrs;
74 u8 *p, *q; 71 u8 *p, *q;
75 int d, z, z0; 72 int d, z, z0;
76 73
77 unative_t wd$$, wq$$, wp$$, w1$$, w2$$ 74 unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
78 unative_t x1d = NBYTES(0x1d); 75 unative_t x1d = NBYTES(0x1d);
79 76
80 z0 = disks - 3; /* Highest dat 77 z0 = disks - 3; /* Highest data disk */
81 p = dptr[z0+1]; /* XOR parity 78 p = dptr[z0+1]; /* XOR parity */
82 q = dptr[z0+2]; /* RS syndrome 79 q = dptr[z0+2]; /* RS syndrome */
83 80
84 for ( d = 0 ; d < bytes ; d += NSIZE*$ 81 for ( d = 0 ; d < bytes ; d += NSIZE*$# ) {
85 wq$$ = wp$$ = *(unative_t *)&d 82 wq$$ = wp$$ = *(unative_t *)&dptr[z0][d+$$*NSIZE];
86 for ( z = z0-1 ; z >= 0 ; z-- 83 for ( z = z0-1 ; z >= 0 ; z-- ) {
87 wd$$ = *(unative_t *)& 84 wd$$ = *(unative_t *)&dptr[z][d+$$*NSIZE];
88 wp$$ = vec_xor(wp$$, w 85 wp$$ = vec_xor(wp$$, wd$$);
89 w2$$ = MASK(wq$$); 86 w2$$ = MASK(wq$$);
90 w1$$ = SHLBYTE(wq$$); 87 w1$$ = SHLBYTE(wq$$);
91 w2$$ = vec_and(w2$$, x 88 w2$$ = vec_and(w2$$, x1d);
92 w1$$ = vec_xor(w1$$, w 89 w1$$ = vec_xor(w1$$, w2$$);
93 wq$$ = vec_xor(w1$$, w 90 wq$$ = vec_xor(w1$$, wd$$);
94 } 91 }
95 *(unative_t *)&p[d+NSIZE*$$] = 92 *(unative_t *)&p[d+NSIZE*$$] = wp$$;
96 *(unative_t *)&q[d+NSIZE*$$] = 93 *(unative_t *)&q[d+NSIZE*$$] = wq$$;
97 } 94 }
98 } 95 }
99 96
100 static void raid6_altivec$#_gen_syndrome(int d 97 static void raid6_altivec$#_gen_syndrome(int disks, size_t bytes, void **ptrs)
101 { 98 {
102 preempt_disable(); 99 preempt_disable();
103 enable_kernel_altivec(); 100 enable_kernel_altivec();
104 101
105 raid6_altivec$#_gen_syndrome_real(disk 102 raid6_altivec$#_gen_syndrome_real(disks, bytes, ptrs);
106 103
107 disable_kernel_altivec(); <<
108 preempt_enable(); 104 preempt_enable();
109 } 105 }
110 106
111 int raid6_have_altivec(void); 107 int raid6_have_altivec(void);
112 #if $# == 1 108 #if $# == 1
113 int raid6_have_altivec(void) 109 int raid6_have_altivec(void)
114 { 110 {
115 /* This assumes either all CPUs have A 111 /* This assumes either all CPUs have Altivec or none does */
116 # ifdef __KERNEL__ 112 # ifdef __KERNEL__
117 return cpu_has_feature(CPU_FTR_ALTIVEC 113 return cpu_has_feature(CPU_FTR_ALTIVEC);
118 # else 114 # else
119 return 1; 115 return 1;
120 # endif 116 # endif
121 } 117 }
122 #endif 118 #endif
123 119
124 const struct raid6_calls raid6_altivec$# = { 120 const struct raid6_calls raid6_altivec$# = {
125 raid6_altivec$#_gen_syndrome, 121 raid6_altivec$#_gen_syndrome,
126 NULL, /* XOR not yet <<
127 raid6_have_altivec, 122 raid6_have_altivec,
128 "altivecx$#", 123 "altivecx$#",
129 0 124 0
130 }; 125 };
131 126
132 #endif /* CONFIG_ALTIVEC */ 127 #endif /* CONFIG_ALTIVEC */
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