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Linux/lib/raid6/altivec.uc

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Diff markup

Differences between /lib/raid6/altivec.uc (Version linux-6.12-rc7) and /lib/raid6/altivec.uc (Version linux-4.17.19)


  1 /* -*- linux-c -*- ---------------------------      1 /* -*- linux-c -*- ------------------------------------------------------- *
  2  *                                                  2  *
  3  *   Copyright 2002-2004 H. Peter Anvin - All       3  *   Copyright 2002-2004 H. Peter Anvin - All Rights Reserved
  4  *                                                  4  *
  5  *   This program is free software; you can re      5  *   This program is free software; you can redistribute it and/or modify
  6  *   it under the terms of the GNU General Pub      6  *   it under the terms of the GNU General Public License as published by
  7  *   the Free Software Foundation, Inc., 53 Te      7  *   the Free Software Foundation, Inc., 53 Temple Place Ste 330,
  8  *   Boston MA 02111-1307, USA; either version      8  *   Boston MA 02111-1307, USA; either version 2 of the License, or
  9  *   (at your option) any later version; incor      9  *   (at your option) any later version; incorporated herein by reference.
 10  *                                                 10  *
 11  * -------------------------------------------     11  * ----------------------------------------------------------------------- */
 12                                                    12 
 13 /*                                                 13 /*
 14  * raid6altivec$#.c                                14  * raid6altivec$#.c
 15  *                                                 15  *
 16  * $#-way unrolled portable integer math RAID-     16  * $#-way unrolled portable integer math RAID-6 instruction set
 17  *                                                 17  *
 18  * This file is postprocessed using unroll.awk     18  * This file is postprocessed using unroll.awk
 19  *                                                 19  *
 20  * <benh> hpa: in process,                         20  * <benh> hpa: in process,
 21  * you can just "steal" the vec unit with enab     21  * you can just "steal" the vec unit with enable_kernel_altivec() (but
 22  * bracked this with preempt_disable/enable or     22  * bracked this with preempt_disable/enable or in a lock)
 23  */                                                23  */
 24                                                    24 
 25 #include <linux/raid/pq.h>                         25 #include <linux/raid/pq.h>
 26                                                    26 
 27 #ifdef CONFIG_ALTIVEC                              27 #ifdef CONFIG_ALTIVEC
 28                                                    28 
 29 #include <altivec.h>                               29 #include <altivec.h>
 30 #ifdef __KERNEL__                                  30 #ifdef __KERNEL__
 31 # include <asm/cputable.h>                         31 # include <asm/cputable.h>
 32 # include <asm/switch_to.h>                        32 # include <asm/switch_to.h>
 33 #endif /* __KERNEL__ */                            33 #endif /* __KERNEL__ */
 34                                                    34 
 35 /*                                                 35 /*
 36  * This is the C data type to use.  We use a v     36  * This is the C data type to use.  We use a vector of
 37  * signed char so vec_cmpgt() will generate th     37  * signed char so vec_cmpgt() will generate the right
 38  * instruction.                                    38  * instruction.
 39  */                                                39  */
 40                                                    40 
 41 typedef vector signed char unative_t;              41 typedef vector signed char unative_t;
 42                                                    42 
 43 #define NBYTES(x) ((vector signed char) {x,x,x     43 #define NBYTES(x) ((vector signed char) {x,x,x,x, x,x,x,x, x,x,x,x, x,x,x,x})
 44 #define NSIZE   sizeof(unative_t)                  44 #define NSIZE   sizeof(unative_t)
 45                                                    45 
 46 /*                                                 46 /*
 47  * The SHLBYTE() operation shifts each byte le     47  * The SHLBYTE() operation shifts each byte left by 1, *not*
 48  * rolling over into the next byte                 48  * rolling over into the next byte
 49  */                                                49  */
 50 static inline __attribute_const__ unative_t SH     50 static inline __attribute_const__ unative_t SHLBYTE(unative_t v)
 51 {                                                  51 {
 52         return vec_add(v,v);                       52         return vec_add(v,v);
 53 }                                                  53 }
 54                                                    54 
 55 /*                                                 55 /*
 56  * The MASK() operation returns 0xFF in any by     56  * The MASK() operation returns 0xFF in any byte for which the high
 57  * bit is 1, 0x00 for any byte for which the h     57  * bit is 1, 0x00 for any byte for which the high bit is 0.
 58  */                                                58  */
 59 static inline __attribute_const__ unative_t MA     59 static inline __attribute_const__ unative_t MASK(unative_t v)
 60 {                                                  60 {
 61         unative_t zv = NBYTES(0);                  61         unative_t zv = NBYTES(0);
 62                                                    62 
 63         /* vec_cmpgt returns a vector bool cha     63         /* vec_cmpgt returns a vector bool char; thus the need for the cast */
 64         return (unative_t)vec_cmpgt(zv, v);        64         return (unative_t)vec_cmpgt(zv, v);
 65 }                                                  65 }
 66                                                    66 
 67                                                    67 
 68 /* This is noinline to make damned sure that g     68 /* This is noinline to make damned sure that gcc doesn't move any of the
 69    Altivec code around the enable/disable code     69    Altivec code around the enable/disable code */
 70 static void noinline                               70 static void noinline
 71 raid6_altivec$#_gen_syndrome_real(int disks, s     71 raid6_altivec$#_gen_syndrome_real(int disks, size_t bytes, void **ptrs)
 72 {                                                  72 {
 73         u8 **dptr = (u8 **)ptrs;                   73         u8 **dptr = (u8 **)ptrs;
 74         u8 *p, *q;                                 74         u8 *p, *q;
 75         int d, z, z0;                              75         int d, z, z0;
 76                                                    76 
 77         unative_t wd$$, wq$$, wp$$, w1$$, w2$$     77         unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
 78         unative_t x1d = NBYTES(0x1d);              78         unative_t x1d = NBYTES(0x1d);
 79                                                    79 
 80         z0 = disks - 3;         /* Highest dat     80         z0 = disks - 3;         /* Highest data disk */
 81         p = dptr[z0+1];         /* XOR parity      81         p = dptr[z0+1];         /* XOR parity */
 82         q = dptr[z0+2];         /* RS syndrome     82         q = dptr[z0+2];         /* RS syndrome */
 83                                                    83 
 84         for ( d = 0 ; d < bytes ; d += NSIZE*$     84         for ( d = 0 ; d < bytes ; d += NSIZE*$# ) {
 85                 wq$$ = wp$$ = *(unative_t *)&d     85                 wq$$ = wp$$ = *(unative_t *)&dptr[z0][d+$$*NSIZE];
 86                 for ( z = z0-1 ; z >= 0 ; z--      86                 for ( z = z0-1 ; z >= 0 ; z-- ) {
 87                         wd$$ = *(unative_t *)&     87                         wd$$ = *(unative_t *)&dptr[z][d+$$*NSIZE];
 88                         wp$$ = vec_xor(wp$$, w     88                         wp$$ = vec_xor(wp$$, wd$$);
 89                         w2$$ = MASK(wq$$);         89                         w2$$ = MASK(wq$$);
 90                         w1$$ = SHLBYTE(wq$$);      90                         w1$$ = SHLBYTE(wq$$);
 91                         w2$$ = vec_and(w2$$, x     91                         w2$$ = vec_and(w2$$, x1d);
 92                         w1$$ = vec_xor(w1$$, w     92                         w1$$ = vec_xor(w1$$, w2$$);
 93                         wq$$ = vec_xor(w1$$, w     93                         wq$$ = vec_xor(w1$$, wd$$);
 94                 }                                  94                 }
 95                 *(unative_t *)&p[d+NSIZE*$$] =     95                 *(unative_t *)&p[d+NSIZE*$$] = wp$$;
 96                 *(unative_t *)&q[d+NSIZE*$$] =     96                 *(unative_t *)&q[d+NSIZE*$$] = wq$$;
 97         }                                          97         }
 98 }                                                  98 }
 99                                                    99 
100 static void raid6_altivec$#_gen_syndrome(int d    100 static void raid6_altivec$#_gen_syndrome(int disks, size_t bytes, void **ptrs)
101 {                                                 101 {
102         preempt_disable();                        102         preempt_disable();
103         enable_kernel_altivec();                  103         enable_kernel_altivec();
104                                                   104 
105         raid6_altivec$#_gen_syndrome_real(disk    105         raid6_altivec$#_gen_syndrome_real(disks, bytes, ptrs);
106                                                   106 
107         disable_kernel_altivec();                 107         disable_kernel_altivec();
108         preempt_enable();                         108         preempt_enable();
109 }                                                 109 }
110                                                   110 
111 int raid6_have_altivec(void);                     111 int raid6_have_altivec(void);
112 #if $# == 1                                       112 #if $# == 1
113 int raid6_have_altivec(void)                      113 int raid6_have_altivec(void)
114 {                                                 114 {
115         /* This assumes either all CPUs have A    115         /* This assumes either all CPUs have Altivec or none does */
116 # ifdef __KERNEL__                                116 # ifdef __KERNEL__
117         return cpu_has_feature(CPU_FTR_ALTIVEC    117         return cpu_has_feature(CPU_FTR_ALTIVEC);
118 # else                                            118 # else
119         return 1;                                 119         return 1;
120 # endif                                           120 # endif
121 }                                                 121 }
122 #endif                                            122 #endif
123                                                   123 
124 const struct raid6_calls raid6_altivec$# = {      124 const struct raid6_calls raid6_altivec$# = {
125         raid6_altivec$#_gen_syndrome,             125         raid6_altivec$#_gen_syndrome,
126         NULL,                   /* XOR not yet    126         NULL,                   /* XOR not yet implemented */
127         raid6_have_altivec,                       127         raid6_have_altivec,
128         "altivecx$#",                             128         "altivecx$#",
129         0                                         129         0
130 };                                                130 };
131                                                   131 
132 #endif /* CONFIG_ALTIVEC */                       132 #endif /* CONFIG_ALTIVEC */
                                                      

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