1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * raid6_vx$#.c 3 * raid6_vx$#.c
4 * 4 *
5 * $#-way unrolled RAID6 gen/xor functions for 5 * $#-way unrolled RAID6 gen/xor functions for s390
6 * based on the vector facility 6 * based on the vector facility
7 * 7 *
8 * Copyright IBM Corp. 2016 8 * Copyright IBM Corp. 2016
9 * Author(s): Martin Schwidefsky <schwidefsky@d 9 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
10 * 10 *
11 * This file is postprocessed using unroll.awk 11 * This file is postprocessed using unroll.awk.
12 */ 12 */
13 13
14 #include <linux/raid/pq.h> 14 #include <linux/raid/pq.h>
15 #include <asm/fpu.h> !! 15 #include <asm/fpu/api.h>
>> 16
>> 17 asm(".include \"asm/vx-insn.h\"\n");
16 18
17 #define NSIZE 16 19 #define NSIZE 16
18 20
19 static __always_inline void LOAD_CONST(void) !! 21 static inline void LOAD_CONST(void)
20 { 22 {
21 fpu_vrepib(24, 0x07); !! 23 asm volatile("VREPIB %v24,7");
22 fpu_vrepib(25, 0x1d); !! 24 asm volatile("VREPIB %v25,0x1d");
23 } 25 }
24 26
25 /* 27 /*
26 * The SHLBYTE() operation shifts each of the 28 * The SHLBYTE() operation shifts each of the 16 bytes in
27 * vector register y left by 1 bit and stores 29 * vector register y left by 1 bit and stores the result in
28 * vector register x. 30 * vector register x.
29 */ 31 */
30 #define SHLBYTE(x, y) fpu_vab(x, y, !! 32 static inline void SHLBYTE(int x, int y)
>> 33 {
>> 34 asm volatile ("VAB %0,%1,%1" : : "i" (x), "i" (y));
>> 35 }
31 36
32 /* 37 /*
33 * For each of the 16 bytes in the vector regi 38 * For each of the 16 bytes in the vector register y the MASK()
34 * operation returns 0xFF if the high bit of t 39 * operation returns 0xFF if the high bit of the byte is 1,
35 * or 0x00 if the high bit is 0. The result is 40 * or 0x00 if the high bit is 0. The result is stored in vector
36 * register x. 41 * register x.
37 */ 42 */
38 #define MASK(x, y) fpu_vesravb(x, !! 43 static inline void MASK(int x, int y)
>> 44 {
>> 45 asm volatile ("VESRAVB %0,%1,24" : : "i" (x), "i" (y));
>> 46 }
>> 47
>> 48 static inline void AND(int x, int y, int z)
>> 49 {
>> 50 asm volatile ("VN %0,%1,%2" : : "i" (x), "i" (y), "i" (z));
>> 51 }
>> 52
>> 53 static inline void XOR(int x, int y, int z)
>> 54 {
>> 55 asm volatile ("VX %0,%1,%2" : : "i" (x), "i" (y), "i" (z));
>> 56 }
39 57
40 #define AND(x, y, z) fpu_vn(x, y, z !! 58 static inline void LOAD_DATA(int x, int n, u8 *ptr)
41 #define XOR(x, y, z) fpu_vx(x, y, z !! 59 {
42 #define LOAD_DATA(x, ptr) fpu_vlm(x, x + !! 60 typedef struct { u8 _[16*n]; } addrtype;
43 #define STORE_DATA(x, ptr) fpu_vstm(x, x !! 61 register addrtype *__ptr asm("1") = (addrtype *) ptr;
44 #define COPY_VEC(x, y) fpu_vlr(x, y) !! 62
>> 63 asm volatile ("VLM %2,%3,0,%r1"
>> 64 : : "m" (*__ptr), "a" (__ptr), "i" (x), "i" (x + n - 1));
>> 65 }
>> 66
>> 67 static inline void STORE_DATA(int x, int n, u8 *ptr)
>> 68 {
>> 69 typedef struct { u8 _[16*n]; } addrtype;
>> 70 register addrtype *__ptr asm("1") = (addrtype *) ptr;
>> 71
>> 72 asm volatile ("VSTM %2,%3,0,1"
>> 73 : "=m" (*__ptr) : "a" (__ptr), "i" (x), "i" (x + n - 1));
>> 74 }
>> 75
>> 76 static inline void COPY_VEC(int x, int y)
>> 77 {
>> 78 asm volatile ("VLR %0,%1" : : "i" (x), "i" (y));
>> 79 }
45 80
46 static void raid6_s390vx$#_gen_syndrome(int di 81 static void raid6_s390vx$#_gen_syndrome(int disks, size_t bytes, void **ptrs)
47 { 82 {
48 DECLARE_KERNEL_FPU_ONSTACK32(vxstate); !! 83 struct kernel_fpu vxstate;
49 u8 **dptr, *p, *q; 84 u8 **dptr, *p, *q;
50 int d, z, z0; 85 int d, z, z0;
51 86
52 kernel_fpu_begin(&vxstate, KERNEL_VXR) 87 kernel_fpu_begin(&vxstate, KERNEL_VXR);
53 LOAD_CONST(); 88 LOAD_CONST();
54 89
55 dptr = (u8 **) ptrs; 90 dptr = (u8 **) ptrs;
56 z0 = disks - 3; /* Highest dat 91 z0 = disks - 3; /* Highest data disk */
57 p = dptr[z0 + 1]; /* XOR parity 92 p = dptr[z0 + 1]; /* XOR parity */
58 q = dptr[z0 + 2]; /* RS syndrome 93 q = dptr[z0 + 2]; /* RS syndrome */
59 94
60 for (d = 0; d < bytes; d += $#*NSIZE) 95 for (d = 0; d < bytes; d += $#*NSIZE) {
61 LOAD_DATA(0,&dptr[z0][d]); !! 96 LOAD_DATA(0,$#,&dptr[z0][d]);
62 COPY_VEC(8+$$,0+$$); 97 COPY_VEC(8+$$,0+$$);
63 for (z = z0 - 1; z >= 0; z--) 98 for (z = z0 - 1; z >= 0; z--) {
64 MASK(16+$$,8+$$); 99 MASK(16+$$,8+$$);
65 AND(16+$$,16+$$,25); 100 AND(16+$$,16+$$,25);
66 SHLBYTE(8+$$,8+$$); 101 SHLBYTE(8+$$,8+$$);
67 XOR(8+$$,8+$$,16+$$); 102 XOR(8+$$,8+$$,16+$$);
68 LOAD_DATA(16,&dptr[z][ !! 103 LOAD_DATA(16,$#,&dptr[z][d]);
69 XOR(0+$$,0+$$,16+$$); 104 XOR(0+$$,0+$$,16+$$);
70 XOR(8+$$,8+$$,16+$$); 105 XOR(8+$$,8+$$,16+$$);
71 } 106 }
72 STORE_DATA(0,&p[d]); !! 107 STORE_DATA(0,$#,&p[d]);
73 STORE_DATA(8,&q[d]); !! 108 STORE_DATA(8,$#,&q[d]);
74 } 109 }
75 kernel_fpu_end(&vxstate, KERNEL_VXR); 110 kernel_fpu_end(&vxstate, KERNEL_VXR);
76 } 111 }
77 112
78 static void raid6_s390vx$#_xor_syndrome(int di 113 static void raid6_s390vx$#_xor_syndrome(int disks, int start, int stop,
79 size_t 114 size_t bytes, void **ptrs)
80 { 115 {
81 DECLARE_KERNEL_FPU_ONSTACK32(vxstate); !! 116 struct kernel_fpu vxstate;
82 u8 **dptr, *p, *q; 117 u8 **dptr, *p, *q;
83 int d, z, z0; 118 int d, z, z0;
84 119
85 dptr = (u8 **) ptrs; 120 dptr = (u8 **) ptrs;
86 z0 = stop; /* P/Q right s 121 z0 = stop; /* P/Q right side optimization */
87 p = dptr[disks - 2]; /* XOR parity 122 p = dptr[disks - 2]; /* XOR parity */
88 q = dptr[disks - 1]; /* RS syndrome 123 q = dptr[disks - 1]; /* RS syndrome */
89 124
90 kernel_fpu_begin(&vxstate, KERNEL_VXR) 125 kernel_fpu_begin(&vxstate, KERNEL_VXR);
91 LOAD_CONST(); 126 LOAD_CONST();
92 127
93 for (d = 0; d < bytes; d += $#*NSIZE) 128 for (d = 0; d < bytes; d += $#*NSIZE) {
94 /* P/Q data pages */ 129 /* P/Q data pages */
95 LOAD_DATA(0,&dptr[z0][d]); !! 130 LOAD_DATA(0,$#,&dptr[z0][d]);
96 COPY_VEC(8+$$,0+$$); 131 COPY_VEC(8+$$,0+$$);
97 for (z = z0 - 1; z >= start; z 132 for (z = z0 - 1; z >= start; z--) {
98 MASK(16+$$,8+$$); 133 MASK(16+$$,8+$$);
99 AND(16+$$,16+$$,25); 134 AND(16+$$,16+$$,25);
100 SHLBYTE(8+$$,8+$$); 135 SHLBYTE(8+$$,8+$$);
101 XOR(8+$$,8+$$,16+$$); 136 XOR(8+$$,8+$$,16+$$);
102 LOAD_DATA(16,&dptr[z][ !! 137 LOAD_DATA(16,$#,&dptr[z][d]);
103 XOR(0+$$,0+$$,16+$$); 138 XOR(0+$$,0+$$,16+$$);
104 XOR(8+$$,8+$$,16+$$); 139 XOR(8+$$,8+$$,16+$$);
105 } 140 }
106 /* P/Q left side optimization 141 /* P/Q left side optimization */
107 for (z = start - 1; z >= 0; z- 142 for (z = start - 1; z >= 0; z--) {
108 MASK(16+$$,8+$$); 143 MASK(16+$$,8+$$);
109 AND(16+$$,16+$$,25); 144 AND(16+$$,16+$$,25);
110 SHLBYTE(8+$$,8+$$); 145 SHLBYTE(8+$$,8+$$);
111 XOR(8+$$,8+$$,16+$$); 146 XOR(8+$$,8+$$,16+$$);
112 } 147 }
113 LOAD_DATA(16,&p[d]); !! 148 LOAD_DATA(16,$#,&p[d]);
114 XOR(16+$$,16+$$,0+$$); 149 XOR(16+$$,16+$$,0+$$);
115 STORE_DATA(16,&p[d]); !! 150 STORE_DATA(16,$#,&p[d]);
116 LOAD_DATA(16,&q[d]); !! 151 LOAD_DATA(16,$#,&q[d]);
117 XOR(16+$$,16+$$,8+$$); 152 XOR(16+$$,16+$$,8+$$);
118 STORE_DATA(16,&q[d]); !! 153 STORE_DATA(16,$#,&q[d]);
119 } 154 }
120 kernel_fpu_end(&vxstate, KERNEL_VXR); 155 kernel_fpu_end(&vxstate, KERNEL_VXR);
121 } 156 }
122 157
123 static int raid6_s390vx$#_valid(void) 158 static int raid6_s390vx$#_valid(void)
124 { 159 {
125 return cpu_has_vx(); !! 160 return MACHINE_HAS_VX;
126 } 161 }
127 162
128 const struct raid6_calls raid6_s390vx$# = { 163 const struct raid6_calls raid6_s390vx$# = {
129 raid6_s390vx$#_gen_syndrome, 164 raid6_s390vx$#_gen_syndrome,
130 raid6_s390vx$#_xor_syndrome, 165 raid6_s390vx$#_xor_syndrome,
131 raid6_s390vx$#_valid, 166 raid6_s390vx$#_valid,
132 "vx128x$#", 167 "vx128x$#",
133 1 168 1
134 }; 169 };
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