1 // SPDX-License-Identifier: GPL-2.0 <<
2 /* 1 /*
3 * raid6_vx$#.c 2 * raid6_vx$#.c
4 * 3 *
5 * $#-way unrolled RAID6 gen/xor functions for 4 * $#-way unrolled RAID6 gen/xor functions for s390
6 * based on the vector facility 5 * based on the vector facility
7 * 6 *
8 * Copyright IBM Corp. 2016 7 * Copyright IBM Corp. 2016
9 * Author(s): Martin Schwidefsky <schwidefsky@d 8 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
10 * 9 *
11 * This file is postprocessed using unroll.awk 10 * This file is postprocessed using unroll.awk.
12 */ 11 */
13 12
14 #include <linux/raid/pq.h> 13 #include <linux/raid/pq.h>
15 #include <asm/fpu.h> !! 14 #include <asm/fpu/api.h>
>> 15
>> 16 asm(".include \"asm/vx-insn.h\"\n");
16 17
17 #define NSIZE 16 18 #define NSIZE 16
18 19
19 static __always_inline void LOAD_CONST(void) !! 20 static inline void LOAD_CONST(void)
20 { 21 {
21 fpu_vrepib(24, 0x07); !! 22 asm volatile("VREPIB %v24,7");
22 fpu_vrepib(25, 0x1d); !! 23 asm volatile("VREPIB %v25,0x1d");
23 } 24 }
24 25
25 /* 26 /*
26 * The SHLBYTE() operation shifts each of the 27 * The SHLBYTE() operation shifts each of the 16 bytes in
27 * vector register y left by 1 bit and stores 28 * vector register y left by 1 bit and stores the result in
28 * vector register x. 29 * vector register x.
29 */ 30 */
30 #define SHLBYTE(x, y) fpu_vab(x, y, !! 31 static inline void SHLBYTE(int x, int y)
>> 32 {
>> 33 asm volatile ("VAB %0,%1,%1" : : "i" (x), "i" (y));
>> 34 }
31 35
32 /* 36 /*
33 * For each of the 16 bytes in the vector regi 37 * For each of the 16 bytes in the vector register y the MASK()
34 * operation returns 0xFF if the high bit of t 38 * operation returns 0xFF if the high bit of the byte is 1,
35 * or 0x00 if the high bit is 0. The result is 39 * or 0x00 if the high bit is 0. The result is stored in vector
36 * register x. 40 * register x.
37 */ 41 */
38 #define MASK(x, y) fpu_vesravb(x, !! 42 static inline void MASK(int x, int y)
>> 43 {
>> 44 asm volatile ("VESRAVB %0,%1,24" : : "i" (x), "i" (y));
>> 45 }
>> 46
>> 47 static inline void AND(int x, int y, int z)
>> 48 {
>> 49 asm volatile ("VN %0,%1,%2" : : "i" (x), "i" (y), "i" (z));
>> 50 }
>> 51
>> 52 static inline void XOR(int x, int y, int z)
>> 53 {
>> 54 asm volatile ("VX %0,%1,%2" : : "i" (x), "i" (y), "i" (z));
>> 55 }
39 56
40 #define AND(x, y, z) fpu_vn(x, y, z !! 57 static inline void LOAD_DATA(int x, int n, u8 *ptr)
41 #define XOR(x, y, z) fpu_vx(x, y, z !! 58 {
42 #define LOAD_DATA(x, ptr) fpu_vlm(x, x + !! 59 typedef struct { u8 _[16*n]; } addrtype;
43 #define STORE_DATA(x, ptr) fpu_vstm(x, x !! 60 register addrtype *__ptr asm("1") = (addrtype *) ptr;
44 #define COPY_VEC(x, y) fpu_vlr(x, y) !! 61
>> 62 asm volatile ("VLM %2,%3,0,%r1"
>> 63 : : "m" (*__ptr), "a" (__ptr), "i" (x), "i" (x + n - 1));
>> 64 }
>> 65
>> 66 static inline void STORE_DATA(int x, int n, u8 *ptr)
>> 67 {
>> 68 typedef struct { u8 _[16*n]; } addrtype;
>> 69 register addrtype *__ptr asm("1") = (addrtype *) ptr;
>> 70
>> 71 asm volatile ("VSTM %2,%3,0,1"
>> 72 : "=m" (*__ptr) : "a" (__ptr), "i" (x), "i" (x + n - 1));
>> 73 }
>> 74
>> 75 static inline void COPY_VEC(int x, int y)
>> 76 {
>> 77 asm volatile ("VLR %0,%1" : : "i" (x), "i" (y));
>> 78 }
45 79
46 static void raid6_s390vx$#_gen_syndrome(int di 80 static void raid6_s390vx$#_gen_syndrome(int disks, size_t bytes, void **ptrs)
47 { 81 {
48 DECLARE_KERNEL_FPU_ONSTACK32(vxstate); !! 82 struct kernel_fpu vxstate;
49 u8 **dptr, *p, *q; 83 u8 **dptr, *p, *q;
50 int d, z, z0; 84 int d, z, z0;
51 85
52 kernel_fpu_begin(&vxstate, KERNEL_VXR) 86 kernel_fpu_begin(&vxstate, KERNEL_VXR);
53 LOAD_CONST(); 87 LOAD_CONST();
54 88
55 dptr = (u8 **) ptrs; 89 dptr = (u8 **) ptrs;
56 z0 = disks - 3; /* Highest dat 90 z0 = disks - 3; /* Highest data disk */
57 p = dptr[z0 + 1]; /* XOR parity 91 p = dptr[z0 + 1]; /* XOR parity */
58 q = dptr[z0 + 2]; /* RS syndrome 92 q = dptr[z0 + 2]; /* RS syndrome */
59 93
60 for (d = 0; d < bytes; d += $#*NSIZE) 94 for (d = 0; d < bytes; d += $#*NSIZE) {
61 LOAD_DATA(0,&dptr[z0][d]); !! 95 LOAD_DATA(0,$#,&dptr[z0][d]);
62 COPY_VEC(8+$$,0+$$); 96 COPY_VEC(8+$$,0+$$);
63 for (z = z0 - 1; z >= 0; z--) 97 for (z = z0 - 1; z >= 0; z--) {
64 MASK(16+$$,8+$$); 98 MASK(16+$$,8+$$);
65 AND(16+$$,16+$$,25); 99 AND(16+$$,16+$$,25);
66 SHLBYTE(8+$$,8+$$); 100 SHLBYTE(8+$$,8+$$);
67 XOR(8+$$,8+$$,16+$$); 101 XOR(8+$$,8+$$,16+$$);
68 LOAD_DATA(16,&dptr[z][ !! 102 LOAD_DATA(16,$#,&dptr[z][d]);
69 XOR(0+$$,0+$$,16+$$); 103 XOR(0+$$,0+$$,16+$$);
70 XOR(8+$$,8+$$,16+$$); 104 XOR(8+$$,8+$$,16+$$);
71 } 105 }
72 STORE_DATA(0,&p[d]); !! 106 STORE_DATA(0,$#,&p[d]);
73 STORE_DATA(8,&q[d]); !! 107 STORE_DATA(8,$#,&q[d]);
74 } 108 }
75 kernel_fpu_end(&vxstate, KERNEL_VXR); 109 kernel_fpu_end(&vxstate, KERNEL_VXR);
76 } 110 }
77 111
78 static void raid6_s390vx$#_xor_syndrome(int di 112 static void raid6_s390vx$#_xor_syndrome(int disks, int start, int stop,
79 size_t 113 size_t bytes, void **ptrs)
80 { 114 {
81 DECLARE_KERNEL_FPU_ONSTACK32(vxstate); !! 115 struct kernel_fpu vxstate;
82 u8 **dptr, *p, *q; 116 u8 **dptr, *p, *q;
83 int d, z, z0; 117 int d, z, z0;
84 118
85 dptr = (u8 **) ptrs; 119 dptr = (u8 **) ptrs;
86 z0 = stop; /* P/Q right s 120 z0 = stop; /* P/Q right side optimization */
87 p = dptr[disks - 2]; /* XOR parity 121 p = dptr[disks - 2]; /* XOR parity */
88 q = dptr[disks - 1]; /* RS syndrome 122 q = dptr[disks - 1]; /* RS syndrome */
89 123
90 kernel_fpu_begin(&vxstate, KERNEL_VXR) 124 kernel_fpu_begin(&vxstate, KERNEL_VXR);
91 LOAD_CONST(); 125 LOAD_CONST();
92 126
93 for (d = 0; d < bytes; d += $#*NSIZE) 127 for (d = 0; d < bytes; d += $#*NSIZE) {
94 /* P/Q data pages */ 128 /* P/Q data pages */
95 LOAD_DATA(0,&dptr[z0][d]); !! 129 LOAD_DATA(0,$#,&dptr[z0][d]);
96 COPY_VEC(8+$$,0+$$); 130 COPY_VEC(8+$$,0+$$);
97 for (z = z0 - 1; z >= start; z 131 for (z = z0 - 1; z >= start; z--) {
98 MASK(16+$$,8+$$); 132 MASK(16+$$,8+$$);
99 AND(16+$$,16+$$,25); 133 AND(16+$$,16+$$,25);
100 SHLBYTE(8+$$,8+$$); 134 SHLBYTE(8+$$,8+$$);
101 XOR(8+$$,8+$$,16+$$); 135 XOR(8+$$,8+$$,16+$$);
102 LOAD_DATA(16,&dptr[z][ !! 136 LOAD_DATA(16,$#,&dptr[z][d]);
103 XOR(0+$$,0+$$,16+$$); 137 XOR(0+$$,0+$$,16+$$);
104 XOR(8+$$,8+$$,16+$$); 138 XOR(8+$$,8+$$,16+$$);
105 } 139 }
106 /* P/Q left side optimization 140 /* P/Q left side optimization */
107 for (z = start - 1; z >= 0; z- 141 for (z = start - 1; z >= 0; z--) {
108 MASK(16+$$,8+$$); 142 MASK(16+$$,8+$$);
109 AND(16+$$,16+$$,25); 143 AND(16+$$,16+$$,25);
110 SHLBYTE(8+$$,8+$$); 144 SHLBYTE(8+$$,8+$$);
111 XOR(8+$$,8+$$,16+$$); 145 XOR(8+$$,8+$$,16+$$);
112 } 146 }
113 LOAD_DATA(16,&p[d]); !! 147 LOAD_DATA(16,$#,&p[d]);
114 XOR(16+$$,16+$$,0+$$); 148 XOR(16+$$,16+$$,0+$$);
115 STORE_DATA(16,&p[d]); !! 149 STORE_DATA(16,$#,&p[d]);
116 LOAD_DATA(16,&q[d]); !! 150 LOAD_DATA(16,$#,&q[d]);
117 XOR(16+$$,16+$$,8+$$); 151 XOR(16+$$,16+$$,8+$$);
118 STORE_DATA(16,&q[d]); !! 152 STORE_DATA(16,$#,&q[d]);
119 } 153 }
120 kernel_fpu_end(&vxstate, KERNEL_VXR); 154 kernel_fpu_end(&vxstate, KERNEL_VXR);
121 } 155 }
122 156
123 static int raid6_s390vx$#_valid(void) 157 static int raid6_s390vx$#_valid(void)
124 { 158 {
125 return cpu_has_vx(); !! 159 return MACHINE_HAS_VX;
126 } 160 }
127 161
128 const struct raid6_calls raid6_s390vx$# = { 162 const struct raid6_calls raid6_s390vx$# = {
129 raid6_s390vx$#_gen_syndrome, 163 raid6_s390vx$#_gen_syndrome,
130 raid6_s390vx$#_xor_syndrome, 164 raid6_s390vx$#_xor_syndrome,
131 raid6_s390vx$#_valid, 165 raid6_s390vx$#_valid,
132 "vx128x$#", 166 "vx128x$#",
133 1 167 1
134 }; 168 };
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