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Linux/scripts/dtc/include-prefixes/arc/nsimosci.dts

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Diff markup

Differences between /scripts/dtc/include-prefixes/arc/nsimosci.dts (Architecture m68k) and /scripts/dtc/include-prefixes/arc/nsimosci.dts (Architecture sparc)


  1 // SPDX-License-Identifier: GPL-2.0-only            1 // SPDX-License-Identifier: GPL-2.0-only
  2 /*                                                  2 /*
  3  * Copyright (C) 2013 Synopsys, Inc. (www.syno      3  * Copyright (C) 2013 Synopsys, Inc. (www.synopsys.com)
  4  */                                                 4  */
  5 /dts-v1/;                                           5 /dts-v1/;
  6                                                     6 
  7 /include/ "skeleton.dtsi"                           7 /include/ "skeleton.dtsi"
  8                                                     8 
  9 / {                                                 9 / {
 10         model = "snps,nsimosci";                   10         model = "snps,nsimosci";
 11         compatible = "snps,nsimosci";              11         compatible = "snps,nsimosci";
 12         #address-cells = <1>;                      12         #address-cells = <1>;
 13         #size-cells = <1>;                         13         #size-cells = <1>;
 14         interrupt-parent = <&core_intc>;           14         interrupt-parent = <&core_intc>;
 15                                                    15 
 16         chosen {                                   16         chosen {
 17                 /* this is for console on PGU      17                 /* this is for console on PGU */
 18                 /* bootargs = "console=tty0 co     18                 /* bootargs = "console=tty0 consoleblank=0"; */
 19                 /* this is for console on seri     19                 /* this is for console on serial */
 20                 bootargs = "earlycon=uart8250,     20                 bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=tty0 console=ttyS0,115200n8 consoleblank=0 debug video=640x480-24 print-fatal-signals=1";
 21         };                                         21         };
 22                                                    22 
 23         aliases {                                  23         aliases {
 24                 serial0 = &uart0;                  24                 serial0 = &uart0;
 25         };                                         25         };
 26                                                    26 
 27         fpga {                                     27         fpga {
 28                 compatible = "simple-bus";         28                 compatible = "simple-bus";
 29                 #address-cells = <1>;              29                 #address-cells = <1>;
 30                 #size-cells = <1>;                 30                 #size-cells = <1>;
 31                                                    31 
 32                 /* child and parent address sp     32                 /* child and parent address space 1:1 mapped */
 33                 ranges;                            33                 ranges;
 34                                                    34 
 35                 core_clk: core_clk {               35                 core_clk: core_clk {
 36                         #clock-cells = <0>;        36                         #clock-cells = <0>;
 37                         compatible = "fixed-cl     37                         compatible = "fixed-clock";
 38                         clock-frequency = <200     38                         clock-frequency = <20000000>;
 39                 };                                 39                 };
 40                                                    40 
 41                 core_intc: interrupt-controlle     41                 core_intc: interrupt-controller {
 42                         compatible = "snps,arc     42                         compatible = "snps,arc700-intc";
 43                         interrupt-controller;      43                         interrupt-controller;
 44                         #interrupt-cells = <1>     44                         #interrupt-cells = <1>;
 45                 };                                 45                 };
 46                                                    46 
 47                 uart0: serial@f0000000 {           47                 uart0: serial@f0000000 {
 48                         compatible = "ns8250";     48                         compatible = "ns8250";
 49                         reg = <0xf0000000 0x20     49                         reg = <0xf0000000 0x2000>;
 50                         interrupts = <11>;         50                         interrupts = <11>;
 51                         clock-frequency = <368     51                         clock-frequency = <3686400>;
 52                         baud = <115200>;           52                         baud = <115200>;
 53                         reg-shift = <2>;           53                         reg-shift = <2>;
 54                         reg-io-width = <4>;        54                         reg-io-width = <4>;
 55                         no-loopback-test = <1>     55                         no-loopback-test = <1>;
 56                 };                                 56                 };
 57                                                    57 
 58                 pguclk: pguclk {                   58                 pguclk: pguclk {
 59                         #clock-cells = <0>;        59                         #clock-cells = <0>;
 60                         compatible = "fixed-cl     60                         compatible = "fixed-clock";
 61                         clock-frequency = <251     61                         clock-frequency = <25175000>;
 62                 };                                 62                 };
 63                                                    63 
 64                 pgu@f9000000 {                     64                 pgu@f9000000 {
 65                         compatible = "snps,arc     65                         compatible = "snps,arcpgu";
 66                         reg = <0xf9000000 0x40     66                         reg = <0xf9000000 0x400>;
 67                         clocks = <&pguclk>;        67                         clocks = <&pguclk>;
 68                         clock-names = "pxlclk"     68                         clock-names = "pxlclk";
 69                 };                                 69                 };
 70                                                    70 
 71                 ps2: ps2@f9001000 {                71                 ps2: ps2@f9001000 {
 72                         compatible = "snps,arc     72                         compatible = "snps,arc_ps2";
 73                         reg = <0xf9000400 0x14     73                         reg = <0xf9000400 0x14>;
 74                         interrupts = <13>;         74                         interrupts = <13>;
 75                         interrupt-names = "arc     75                         interrupt-names = "arc_ps2_irq";
 76                 };                                 76                 };
 77                                                    77 
 78                 eth0: ethernet@f0003000 {          78                 eth0: ethernet@f0003000 {
 79                         compatible = "ezchip,n     79                         compatible = "ezchip,nps-mgt-enet";
 80                         reg = <0xf0003000 0x44     80                         reg = <0xf0003000 0x44>;
 81                         interrupts = <7>;          81                         interrupts = <7>;
 82                 };                                 82                 };
 83                                                    83 
 84                 arcpct0: pct {                     84                 arcpct0: pct {
 85                         compatible = "snps,arc     85                         compatible = "snps,arc700-pct";
 86                 };                                 86                 };
 87         };                                         87         };
 88 };                                                 88 };
                                                      

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