1 // SPDX-License-Identifier: GPL-2.0-only <<
2 /* 1 /*
3 * Copyright (C) 2012 Synopsys, Inc. (www.syno 2 * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
>> 3 *
>> 4 * This program is free software; you can redistribute it and/or modify
>> 5 * it under the terms of the GNU General Public License version 2 as
>> 6 * published by the Free Software Foundation.
4 */ 7 */
5 8
6 /* 9 /*
7 * Skeleton device tree; the bare minimum need 10 * Skeleton device tree; the bare minimum needed to boot; just include and
8 * add a compatible value. 11 * add a compatible value.
9 */ 12 */
10 13
11 / { 14 / {
12 compatible = "snps,arc"; 15 compatible = "snps,arc";
13 #address-cells = <1>; 16 #address-cells = <1>;
14 #size-cells = <1>; 17 #size-cells = <1>;
15 chosen { }; 18 chosen { };
16 aliases { }; 19 aliases { };
17 20
18 cpus { 21 cpus {
19 #address-cells = <1>; 22 #address-cells = <1>;
20 #size-cells = <0>; 23 #size-cells = <0>;
21 24
22 cpu@0 { 25 cpu@0 {
23 device_type = "cpu"; 26 device_type = "cpu";
24 compatible = "snps,arc 27 compatible = "snps,arc770d";
25 reg = <0>; 28 reg = <0>;
26 clocks = <&core_clk>; 29 clocks = <&core_clk>;
27 }; 30 };
28 }; 31 };
29 32
30 /* TIMER0 with interrupt for clockeven 33 /* TIMER0 with interrupt for clockevent */
31 timer0 { 34 timer0 {
32 compatible = "snps,arc-timer"; 35 compatible = "snps,arc-timer";
33 interrupts = <3>; 36 interrupts = <3>;
34 interrupt-parent = <&core_intc 37 interrupt-parent = <&core_intc>;
35 clocks = <&core_clk>; 38 clocks = <&core_clk>;
36 }; 39 };
37 40
38 /* TIMER1 for free running clocksource 41 /* TIMER1 for free running clocksource */
39 timer1 { 42 timer1 {
40 compatible = "snps,arc-timer"; 43 compatible = "snps,arc-timer";
41 clocks = <&core_clk>; 44 clocks = <&core_clk>;
42 }; 45 };
43 46
44 memory { 47 memory {
45 device_type = "memory"; 48 device_type = "memory";
46 reg = <0x80000000 0x10000000>; 49 reg = <0x80000000 0x10000000>; /* 256M */
47 }; 50 };
48 }; 51 };
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