1 // SPDX-License-Identifier: GPL-2.0-only 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* 2 /*
3 * Copyright (C) 2016 Synopsys, Inc. (www.syno 3 * Copyright (C) 2016 Synopsys, Inc. (www.synopsys.com)
4 */ 4 */
5 5
6 / { 6 / {
7 compatible = "snps,arc"; 7 compatible = "snps,arc";
8 #address-cells = <1>; 8 #address-cells = <1>;
9 #size-cells = <1>; 9 #size-cells = <1>;
10 chosen { }; 10 chosen { };
11 aliases { }; 11 aliases { };
12 12
13 cpus { 13 cpus {
14 #address-cells = <1>; 14 #address-cells = <1>;
15 #size-cells = <0>; 15 #size-cells = <0>;
16 16
17 cpu@0 { 17 cpu@0 {
18 device_type = "cpu"; 18 device_type = "cpu";
19 compatible = "snps,arc 19 compatible = "snps,archs38";
20 reg = <0>; 20 reg = <0>;
21 clocks = <&core_clk>; 21 clocks = <&core_clk>;
22 }; 22 };
23 cpu@1 { 23 cpu@1 {
24 device_type = "cpu"; 24 device_type = "cpu";
25 compatible = "snps,arc 25 compatible = "snps,archs38";
26 reg = <1>; 26 reg = <1>;
27 clocks = <&core_clk>; 27 clocks = <&core_clk>;
28 }; 28 };
29 cpu@2 { 29 cpu@2 {
30 device_type = "cpu"; 30 device_type = "cpu";
31 compatible = "snps,arc 31 compatible = "snps,archs38";
32 reg = <2>; 32 reg = <2>;
33 clocks = <&core_clk>; 33 clocks = <&core_clk>;
34 }; 34 };
35 cpu@3 { 35 cpu@3 {
36 device_type = "cpu"; 36 device_type = "cpu";
37 compatible = "snps,arc 37 compatible = "snps,archs38";
38 reg = <3>; 38 reg = <3>;
39 clocks = <&core_clk>; 39 clocks = <&core_clk>;
40 }; 40 };
41 }; 41 };
42 42
43 /* TIMER0 with interrupt for clockeven 43 /* TIMER0 with interrupt for clockevent */
44 timer0 { 44 timer0 {
45 compatible = "snps,arc-timer"; 45 compatible = "snps,arc-timer";
46 interrupts = <16>; 46 interrupts = <16>;
47 interrupt-parent = <&core_intc 47 interrupt-parent = <&core_intc>;
48 clocks = <&core_clk>; 48 clocks = <&core_clk>;
49 }; 49 };
50 50
51 /* 64-bit Global Free Running Counter 51 /* 64-bit Global Free Running Counter */
52 gfrc { 52 gfrc {
53 compatible = "snps,archs-timer 53 compatible = "snps,archs-timer-gfrc";
54 clocks = <&core_clk>; 54 clocks = <&core_clk>;
55 }; 55 };
56 56
57 memory { 57 memory {
58 device_type = "memory"; 58 device_type = "memory";
59 reg = <0x80000000 0x10000000>; 59 reg = <0x80000000 0x10000000>; /* 256M */
60 }; 60 };
61 }; 61 };
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