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Linux/scripts/dtc/include-prefixes/arm/amlogic/meson8m2.dtsi

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm/amlogic/meson8m2.dtsi (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm/amlogic/meson8m2.dtsi (Version linux-4.18.20)


  1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)     
  2 /*                                                
  3  * Copyright (c) 2017 Martin Blumenstingl <mart    
  4  */                                               
  5                                                   
  6 #include "meson8.dtsi"                            
  7                                                   
  8 / {                                               
  9         model = "Amlogic Meson8m2 SoC";           
 10         compatible = "amlogic,meson8m2";          
 11 }; /* end of / */                                 
 12                                                   
 13 &clkc {                                           
 14         compatible = "amlogic,meson8m2-clkc",     
 15 };                                                
 16                                                   
 17 &dmcbus {                                         
 18         /* the offset of the canvas registers     
 19         /delete-node/ video-lut@20;               
 20                                                   
 21         canvas: video-lut@48 {                    
 22                 compatible = "amlogic,meson8m2    
 23                 reg = <0x48 0x14>;                
 24         };                                        
 25 };                                                
 26                                                   
 27 &ethmac {                                         
 28         compatible = "amlogic,meson8m2-dwmac",    
 29         reg = <0xc9410000 0x10000                 
 30                 0xc1108140 0x8>;                  
 31         clocks = <&clkc CLKID_ETH>,               
 32                  <&clkc CLKID_MPLL2>,             
 33                  <&clkc CLKID_MPLL2>,             
 34                  <&clkc CLKID_FCLK_DIV2>;         
 35         clock-names = "stmmaceth", "clkin0", "    
 36         resets = <&reset RESET_ETHERNET>;         
 37         reset-names = "stmmaceth";                
 38 };                                                
 39                                                   
 40 &pinctrl_aobus {                                  
 41         compatible = "amlogic,meson8m2-aobus-p    
 42                      "amlogic,meson8-aobus-pin    
 43 };                                                
 44                                                   
 45 &pinctrl_cbus {                                   
 46         compatible = "amlogic,meson8m2-cbus-pi    
 47                      "amlogic,meson8-cbus-pinc    
 48                                                   
 49         eth_rgmii_pins: ethernet {                
 50                 mux {                             
 51                         groups = "eth_tx_clk_5    
 52                                  "eth_txd3", "    
 53                                  "eth_txd1", "    
 54                                  "eth_rx_clk_i    
 55                                  "eth_rxd3", "    
 56                                  "eth_rxd1", "    
 57                                  "eth_mdio", "    
 58                         function = "ethernet";    
 59                         bias-disable;             
 60                 };                                
 61         };                                        
 62 };                                                
 63                                                   
 64 &pwrc {                                           
 65         compatible = "amlogic,meson8m2-pwrc";     
 66         resets = <&reset RESET_DBLK>,             
 67                  <&reset RESET_PIC_DC>,           
 68                  <&reset RESET_HDMI_APB>,         
 69                  <&reset RESET_HDMI_SYSTEM_RES    
 70                  <&reset RESET_VENCI>,            
 71                  <&reset RESET_VENCP>,            
 72                  <&reset RESET_VDAC_4>,           
 73                  <&reset RESET_VENCL>,            
 74                  <&reset RESET_VIU>,              
 75                  <&reset RESET_VENC>,             
 76                  <&reset RESET_RDMA>;             
 77         reset-names = "dblk", "pic_dc", "hdmi_    
 78                       "vencp", "vdac", "vencl"    
 79         assigned-clocks = <&clkc CLKID_VPU>;      
 80         assigned-clock-rates = <364000000>;       
 81 };                                                
 82                                                   
 83 &saradc {                                         
 84         compatible = "amlogic,meson8m2-saradc"    
 85 };                                                
 86                                                   
 87 &sdhc {                                           
 88         compatible = "amlogic,meson8m2-sdhc",     
 89 };                                                
 90                                                   
 91 &usb0_phy {                                       
 92         compatible = "amlogic,meson8m2-usb2-ph    
 93 };                                                
 94                                                   
 95 &usb1_phy {                                       
 96         compatible = "amlogic,meson8m2-usb2-ph    
 97 };                                                
 98                                                   
 99 &wdt {                                            
100         compatible = "amlogic,meson8m2-wdt", "    
101 };                                                
                                                      

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