1 // SPDX-License-Identifier: GPL-2.0+ 1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/; 2 /dts-v1/;
3 3
4 #include "aspeed-g5.dtsi" 4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h> 5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h> 6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/interrupt-controller/irq 7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/leds/common.h> 8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/watchdog/aspeed-wdt.h> 9 #include <dt-bindings/watchdog/aspeed-wdt.h>
10 10
11 /{ 11 /{
12 model = "ASRock E3C256D4I BMC"; 12 model = "ASRock E3C256D4I BMC";
13 compatible = "asrock,e3c256d4i-bmc", " 13 compatible = "asrock,e3c256d4i-bmc", "aspeed,ast2500";
14 14
15 aliases { 15 aliases {
16 serial4 = &uart5; 16 serial4 = &uart5;
17 17
18 i2c20 = &i2c2mux0ch0; 18 i2c20 = &i2c2mux0ch0;
19 i2c21 = &i2c2mux0ch1; 19 i2c21 = &i2c2mux0ch1;
20 i2c22 = &i2c2mux0ch2; 20 i2c22 = &i2c2mux0ch2;
21 i2c23 = &i2c2mux0ch3; 21 i2c23 = &i2c2mux0ch3;
22 }; 22 };
23 23
24 chosen { 24 chosen {
25 stdout-path = &uart5; 25 stdout-path = &uart5;
26 }; 26 };
27 27
28 memory@80000000 { 28 memory@80000000 {
29 reg = <0x80000000 0x20000000>; 29 reg = <0x80000000 0x20000000>;
30 }; 30 };
31 31
32 leds { 32 leds {
33 compatible = "gpio-leds"; 33 compatible = "gpio-leds";
34 34
35 /* BMC heartbeat */ 35 /* BMC heartbeat */
36 led-0 { 36 led-0 {
37 gpios = <&gpio ASPEED_ 37 gpios = <&gpio ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>;
38 function = LED_FUNCTIO 38 function = LED_FUNCTION_HEARTBEAT;
39 color = <LED_COLOR_ID_ 39 color = <LED_COLOR_ID_GREEN>;
40 linux,default-trigger 40 linux,default-trigger = "timer";
41 }; 41 };
42 42
43 /* system fault */ 43 /* system fault */
44 led-1 { 44 led-1 {
45 gpios = <&gpio ASPEED_ 45 gpios = <&gpio ASPEED_GPIO(Z, 2) GPIO_ACTIVE_LOW>;
46 function = LED_FUNCTIO 46 function = LED_FUNCTION_FAULT;
47 color = <LED_COLOR_ID_ 47 color = <LED_COLOR_ID_RED>;
48 panic-indicator; 48 panic-indicator;
49 }; 49 };
50 }; 50 };
51 51
52 iio-hwmon { 52 iio-hwmon {
53 compatible = "iio-hwmon"; 53 compatible = "iio-hwmon";
54 io-channels = <&adc 0>, <&adc 54 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
55 <&adc 4>, <&adc 5>, <& 55 <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
56 <&adc 8>, <&adc 9>, <& 56 <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
57 <&adc 12>, <&adc 13>, 57 <&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;
58 }; 58 };
59 }; 59 };
60 60
61 &fmc { 61 &fmc {
62 status = "okay"; 62 status = "okay";
63 flash@0 { 63 flash@0 {
64 status = "okay"; 64 status = "okay";
65 m25p,fast-read; 65 m25p,fast-read;
66 label = "bmc"; 66 label = "bmc";
67 spi-max-frequency = <100000000 67 spi-max-frequency = <100000000>; /* 100 MHz */
68 #include "openbmc-flash-layout-64.dtsi" 68 #include "openbmc-flash-layout-64.dtsi"
69 }; 69 };
70 }; 70 };
71 71
72 &uart1 { 72 &uart1 {
73 status = "okay"; 73 status = "okay";
74 }; 74 };
75 75
76 &uart2 { 76 &uart2 {
77 status = "okay"; 77 status = "okay";
78 }; 78 };
79 79
80 &uart3 { 80 &uart3 {
81 status = "okay"; 81 status = "okay";
82 }; 82 };
83 83
84 &uart4 { 84 &uart4 {
85 status = "okay"; 85 status = "okay";
86 }; 86 };
87 87
88 &uart5 { 88 &uart5 {
89 status = "okay"; 89 status = "okay";
90 }; 90 };
91 91
92 &uart_routing { 92 &uart_routing {
93 status = "okay"; 93 status = "okay";
94 }; 94 };
95 95
96 &mac0 { 96 &mac0 {
97 status = "okay"; 97 status = "okay";
98 98
99 pinctrl-names = "default"; 99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_rgmii1_default & 100 pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
101 101
102 nvmem-cells = <ð0_macaddress>; 102 nvmem-cells = <ð0_macaddress>;
103 nvmem-cell-names = "mac-address"; 103 nvmem-cell-names = "mac-address";
104 }; 104 };
105 105
106 &i2c0 { 106 &i2c0 {
107 status = "okay"; 107 status = "okay";
108 }; 108 };
109 109
110 &i2c1 { 110 &i2c1 {
111 status = "okay"; 111 status = "okay";
112 }; 112 };
113 113
114 &i2c2 { 114 &i2c2 {
115 status = "okay"; 115 status = "okay";
116 116
117 i2c-mux@70 { 117 i2c-mux@70 {
118 compatible = "nxp,pca9545"; 118 compatible = "nxp,pca9545";
119 reg = <0x70>; 119 reg = <0x70>;
120 #address-cells = <1>; 120 #address-cells = <1>;
121 #size-cells = <0>; 121 #size-cells = <0>;
122 122
123 i2c2mux0ch0: i2c@0 { 123 i2c2mux0ch0: i2c@0 {
124 #address-cells = <1>; 124 #address-cells = <1>;
125 #size-cells = <0>; 125 #size-cells = <0>;
126 reg = <0>; 126 reg = <0>;
127 }; 127 };
128 128
129 i2c2mux0ch1: i2c@1 { 129 i2c2mux0ch1: i2c@1 {
130 #address-cells = <1>; 130 #address-cells = <1>;
131 #size-cells = <0>; 131 #size-cells = <0>;
132 reg = <1>; 132 reg = <1>;
133 }; 133 };
134 134
135 i2c2mux0ch2: i2c@2 { 135 i2c2mux0ch2: i2c@2 {
136 #address-cells = <1>; 136 #address-cells = <1>;
137 #size-cells = <0>; 137 #size-cells = <0>;
138 reg = <2>; 138 reg = <2>;
139 }; 139 };
140 140
141 i2c2mux0ch3: i2c@3 { 141 i2c2mux0ch3: i2c@3 {
142 #address-cells = <1>; 142 #address-cells = <1>;
143 #size-cells = <0>; 143 #size-cells = <0>;
144 reg = <3>; 144 reg = <3>;
145 }; 145 };
146 }; 146 };
147 }; 147 };
148 148
149 &i2c3 { 149 &i2c3 {
150 status = "okay"; 150 status = "okay";
151 }; 151 };
152 152
153 &i2c4 { 153 &i2c4 {
154 status = "okay"; 154 status = "okay";
155 }; 155 };
156 156
157 &i2c5 { 157 &i2c5 {
158 status = "okay"; 158 status = "okay";
159 }; 159 };
160 160
161 &i2c6 { 161 &i2c6 {
162 status = "okay"; 162 status = "okay";
163 }; 163 };
164 164
165 &i2c7 { 165 &i2c7 {
166 status = "okay"; 166 status = "okay";
167 }; 167 };
168 168
169 &i2c9 { 169 &i2c9 {
170 status = "okay"; 170 status = "okay";
171 }; 171 };
172 172
173 &i2c10 { 173 &i2c10 {
174 status = "okay"; 174 status = "okay";
175 }; 175 };
176 176
177 &i2c11 { 177 &i2c11 {
178 status = "okay"; 178 status = "okay";
179 179
180 vrm@60 { 180 vrm@60 {
181 compatible = "isil,isl69269"; 181 compatible = "isil,isl69269";
182 reg = <0x60>; 182 reg = <0x60>;
183 }; 183 };
184 }; 184 };
185 185
186 &i2c12 { 186 &i2c12 {
187 status = "okay"; 187 status = "okay";
188 188
189 /* FRU eeprom */ 189 /* FRU eeprom */
190 eeprom@57 { 190 eeprom@57 {
191 compatible = "st,24c128", "atm 191 compatible = "st,24c128", "atmel,24c128";
192 reg = <0x57>; 192 reg = <0x57>;
193 pagesize = <16>; 193 pagesize = <16>;
194 #address-cells = <1>; 194 #address-cells = <1>;
195 #size-cells = <1>; 195 #size-cells = <1>;
196 196
197 eth0_macaddress: macaddress@3f 197 eth0_macaddress: macaddress@3f80 {
198 reg = <0x3f80 6>; 198 reg = <0x3f80 6>;
199 }; 199 };
200 }; 200 };
201 }; 201 };
202 202
203 &video { 203 &video {
204 status = "okay"; 204 status = "okay";
205 }; 205 };
206 206
207 &vhub { 207 &vhub {
208 status = "okay"; 208 status = "okay";
209 }; 209 };
210 210
211 &lpc_ctrl { 211 &lpc_ctrl {
212 status = "okay"; 212 status = "okay";
213 }; 213 };
214 214
215 &lpc_snoop { 215 &lpc_snoop {
216 status = "okay"; 216 status = "okay";
217 snoop-ports = <0x80>; 217 snoop-ports = <0x80>;
218 }; 218 };
219 219
220 &kcs3 { 220 &kcs3 {
221 status = "okay"; 221 status = "okay";
222 aspeed,lpc-io-reg = <0xca2>; 222 aspeed,lpc-io-reg = <0xca2>;
223 }; 223 };
224 224
225 &peci0 { 225 &peci0 {
226 status = "okay"; 226 status = "okay";
227 }; 227 };
228 228
229 &wdt1 { 229 &wdt1 {
230 aspeed,reset-mask = <(AST2500_WDT_RESE 230 aspeed,reset-mask = <(AST2500_WDT_RESET_DEFAULT & ~AST2500_WDT_RESET_LPC)>;
231 }; 231 };
232 232
233 &wdt2 { 233 &wdt2 {
234 aspeed,reset-mask = <(AST2500_WDT_RESE 234 aspeed,reset-mask = <(AST2500_WDT_RESET_DEFAULT & ~AST2500_WDT_RESET_LPC)>;
235 }; 235 };
236 236
237 &pwm_tacho { 237 &pwm_tacho {
238 status = "okay"; 238 status = "okay";
239 pinctrl-names = "default"; 239 pinctrl-names = "default";
240 pinctrl-0 = <&pinctrl_pwm0_default /* 240 pinctrl-0 = <&pinctrl_pwm0_default /* CPU */
241 &pinctrl_pwm2_default /* 241 &pinctrl_pwm2_default /* rear */
242 &pinctrl_pwm4_default>; /* 242 &pinctrl_pwm4_default>; /* front */
243 243
244 /* CPU */ 244 /* CPU */
245 fan@0 { 245 fan@0 {
246 reg = <0x00>; 246 reg = <0x00>;
247 aspeed,fan-tach-ch = /bits/ 8 247 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
248 }; 248 };
249 249
250 /* rear */ 250 /* rear */
251 fan@2 { 251 fan@2 {
252 reg = <0x02>; 252 reg = <0x02>;
253 aspeed,fan-tach-ch = /bits/ 8 253 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
254 }; 254 };
255 255
256 /* front */ 256 /* front */
257 fan@4 { 257 fan@4 {
258 reg = <0x04>; 258 reg = <0x04>;
259 aspeed,fan-tach-ch = /bits/ 8 259 aspeed,fan-tach-ch = /bits/ 8 <0x04>;
260 }; 260 };
261 }; 261 };
262 262
263 &gpio { 263 &gpio {
264 status = "okay"; 264 status = "okay";
265 gpio-line-names = 265 gpio-line-names =
266 /* A */ "", "", "NMI_BTN_N", 266 /* A */ "", "", "NMI_BTN_N", "BMC_NMI", "", "", "", "",
267 /* B */ "", "", "", "", "", " 267 /* B */ "", "", "", "", "", "", "", "",
268 /* C */ "", "", "", "", "", " 268 /* C */ "", "", "", "", "", "", "", "",
269 /* D */ "BMC_PSIN", "BMC_PSOU 269 /* D */ "BMC_PSIN", "BMC_PSOUT", "BMC_RESETCON", "RESETCON",
270 "", "", "", "", 270 "", "", "", "",
271 /* E */ "", "", "", "", "", " 271 /* E */ "", "", "", "", "", "", "", "",
272 /* F */ "LOCATORLED_STATUS_N" 272 /* F */ "LOCATORLED_STATUS_N", "LOCATORBTN", "", "",
273 "", "", "BMC_PCH_SCI_L 273 "", "", "BMC_PCH_SCI_LPC", "BMC_NCSI_MUX_CTL",
274 /* G */ "HWM_BAT_EN", "CHASSI 274 /* G */ "HWM_BAT_EN", "CHASSIS_ID0", "CHASSIS_ID1", "CHASSIS_ID2",
275 "", "", "", "", 275 "", "", "", "",
276 /* H */ "FM_ME_RCVR_N", "O_PW 276 /* H */ "FM_ME_RCVR_N", "O_PWROK", "", "D4_DIMM_EVENT_3V_N",
277 "MFG_MODE_N", "BMC_RTC 277 "MFG_MODE_N", "BMC_RTCRST", "BMC_HB_LED_N", "BMC_CASEOPEN",
278 /* I */ "", "", "", "", "", " 278 /* I */ "", "", "", "", "", "", "", "",
279 /* J */ "BMC_READY", "BMC_PCH 279 /* J */ "BMC_READY", "BMC_PCH_BIOS_CS_N", "BMC_SMI", "", "", "", "", "",
280 /* K */ "", "", "", "", "", " 280 /* K */ "", "", "", "", "", "", "", "",
281 /* L */ "", "", "", "", "", " 281 /* L */ "", "", "", "", "", "", "", "",
282 /* M */ "", "", "", "", "", " 282 /* M */ "", "", "", "", "", "", "", "",
283 /* N */ "", "", "", "", "", " 283 /* N */ "", "", "", "", "", "", "", "",
284 /* O */ "", "", "", "", "", " 284 /* O */ "", "", "", "", "", "", "", "",
285 /* P */ "", "", "", "", "", " 285 /* P */ "", "", "", "", "", "", "", "",
286 /* Q */ "", "", "", "", "", " 286 /* Q */ "", "", "", "", "", "", "", "",
287 /* R */ "", "", "", "", "", " 287 /* R */ "", "", "", "", "", "", "", "",
288 /* S */ "PCHHOT_BMC_N", "", " 288 /* S */ "PCHHOT_BMC_N", "", "RSMRST", "", "", "", "", "",
289 /* T */ "", "", "", "", "", " 289 /* T */ "", "", "", "", "", "", "", "",
290 /* U */ "", "", "", "", "", " 290 /* U */ "", "", "", "", "", "", "", "",
291 /* V */ "", "", "", "", "", " 291 /* V */ "", "", "", "", "", "", "", "",
292 /* W */ "", "", "", "", "", " 292 /* W */ "", "", "", "", "", "", "", "",
293 /* X */ "", "", "", "", "", " 293 /* X */ "", "", "", "", "", "", "", "",
294 /* Y */ "SLP_S3", "SLP_S5", " 294 /* Y */ "SLP_S3", "SLP_S5", "", "", "", "", "", "",
295 /* Z */ "CPU_CATERR_BMC_N", " 295 /* Z */ "CPU_CATERR_BMC_N", "", "SYSTEM_FAULT_LED_N", "BMC_THROTTLE_N",
296 "", "", "", "", 296 "", "", "", "",
297 /* AA */ "CPU1_THERMTRIP_LATCH 297 /* AA */ "CPU1_THERMTRIP_LATCH_N", "", "CPU1_PROCHOT_N", "",
298 "", "", "IRQ_SMI_ACTIV 298 "", "", "IRQ_SMI_ACTIVE_N", "FM_BIOS_POST_CMPLT_N",
299 /* AB */ "", "", "ME_OVERRIDE" 299 /* AB */ "", "", "ME_OVERRIDE", "BMC_DMI_MODIFY", "", "", "", "",
300 /* AC */ "", "", "", "", "", " 300 /* AC */ "", "", "", "", "", "", "", "";
301 }; 301 };
302 302
303 &adc { 303 &adc {
304 status = "okay"; 304 status = "okay";
305 pinctrl-names = "default"; 305 pinctrl-names = "default";
306 pinctrl-0 = <&pinctrl_adc0_default /* 306 pinctrl-0 = <&pinctrl_adc0_default /* 3VSB */
307 &pinctrl_adc1_default /* 307 &pinctrl_adc1_default /* 5VSB */
308 &pinctrl_adc2_default /* 308 &pinctrl_adc2_default /* CPU1 */
309 &pinctrl_adc3_default /* 309 &pinctrl_adc3_default /* VCCSA */
310 &pinctrl_adc4_default /* 310 &pinctrl_adc4_default /* VCCM */
311 &pinctrl_adc5_default /* 311 &pinctrl_adc5_default /* V10M */
312 &pinctrl_adc6_default /* 312 &pinctrl_adc6_default /* VCCIO */
313 &pinctrl_adc7_default /* 313 &pinctrl_adc7_default /* VCCGT */
314 &pinctrl_adc8_default /* 314 &pinctrl_adc8_default /* VPPM */
315 &pinctrl_adc9_default /* 315 &pinctrl_adc9_default /* BAT */
316 &pinctrl_adc10_default /* 316 &pinctrl_adc10_default /* 3V */
317 &pinctrl_adc11_default /* 317 &pinctrl_adc11_default /* 5V */
318 &pinctrl_adc12_default /* 318 &pinctrl_adc12_default /* 12V */
319 &pinctrl_adc13_default /* 319 &pinctrl_adc13_default /* GND */
320 &pinctrl_adc14_default /* 320 &pinctrl_adc14_default /* GND */
321 &pinctrl_adc15_default>; /* 321 &pinctrl_adc15_default>; /* GND */
322 }; 322 };
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