1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (c) 2021 Inspur Corporation 2 // Copyright (c) 2021 Inspur Corporation 3 /dts-v1/; 3 /dts-v1/; 4 4 5 #include "aspeed-g5.dtsi" 5 #include "aspeed-g5.dtsi" 6 #include <dt-bindings/gpio/aspeed-gpio.h> 6 #include <dt-bindings/gpio/aspeed-gpio.h> 7 #include <dt-bindings/i2c/i2c.h> 7 #include <dt-bindings/i2c/i2c.h> 8 #include <dt-bindings/leds/leds-pca955x.h> 8 #include <dt-bindings/leds/leds-pca955x.h> 9 9 10 / { 10 / { 11 model = "NF5280M6 BMC"; 11 model = "NF5280M6 BMC"; 12 compatible = "inspur,nf5280m6-bmc", "a 12 compatible = "inspur,nf5280m6-bmc", "aspeed,ast2500"; 13 13 14 chosen { 14 chosen { 15 stdout-path = &uart5; 15 stdout-path = &uart5; 16 bootargs = "console=ttyS4,1152 16 bootargs = "console=ttyS4,115200 earlycon"; 17 }; 17 }; 18 18 19 memory@80000000 { 19 memory@80000000 { 20 reg = <0x80000000 0x40000000>; 20 reg = <0x80000000 0x40000000>; 21 }; 21 }; 22 22 23 reserved-memory { 23 reserved-memory { 24 #address-cells = <1>; 24 #address-cells = <1>; 25 #size-cells = <1>; 25 #size-cells = <1>; 26 ranges; 26 ranges; 27 27 28 vga_memory: framebuffer@9f0000 28 vga_memory: framebuffer@9f000000 { 29 no-map; 29 no-map; 30 reg = <0x9f000000 0x01 30 reg = <0x9f000000 0x01000000>; /* 16M */ 31 }; 31 }; 32 32 33 video_engine_memory: jpegbuffe 33 video_engine_memory: jpegbuffer { 34 size = <0x02000000>; 34 size = <0x02000000>; /* 32M */ 35 alignment = <0x0100000 35 alignment = <0x01000000>; 36 compatible = "shared-d 36 compatible = "shared-dma-pool"; 37 reusable; 37 reusable; 38 }; 38 }; 39 }; 39 }; 40 40 41 leds { 41 leds { 42 compatible = "gpio-leds"; 42 compatible = "gpio-leds"; 43 43 44 bmc_alive { 44 bmc_alive { 45 label = "bmc_alive"; 45 label = "bmc_alive"; 46 gpios = <&gpio ASPEED_ 46 gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>; 47 linux,default-trigger 47 linux,default-trigger = "timer"; 48 led-pattern = <1000 10 48 led-pattern = <1000 1000>; 49 }; 49 }; 50 50 51 front-fan { 51 front-fan { 52 label = "front-fan"; 52 label = "front-fan"; 53 gpios = <&gpio ASPEED_ 53 gpios = <&gpio ASPEED_GPIO(F,2) GPIO_ACTIVE_LOW>; 54 }; 54 }; 55 55 56 front-psu { 56 front-psu { 57 label = "front-psu"; 57 label = "front-psu"; 58 gpios = <&gpio ASPEED_ 58 gpios = <&gpio ASPEED_GPIO(F,3) GPIO_ACTIVE_LOW>; 59 }; 59 }; 60 60 61 front-syshot { 61 front-syshot { 62 label = "front-syshot" 62 label = "front-syshot"; 63 gpios = <&gpio ASPEED_ 63 gpios = <&gpio ASPEED_GPIO(J, 3) GPIO_ACTIVE_LOW>; 64 }; 64 }; 65 65 66 front-memory { 66 front-memory { 67 label = "front-memory" 67 label = "front-memory"; 68 gpios = <&gpio ASPEED_ 68 gpios = <&gpio ASPEED_GPIO(S, 7) GPIO_ACTIVE_LOW>; 69 }; 69 }; 70 70 71 identify { 71 identify { 72 label = "identify"; 72 label = "identify"; 73 gpios = <&gpio ASPEED_ 73 gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_LOW>; 74 }; 74 }; 75 }; 75 }; 76 76 77 iio-hwmon { 77 iio-hwmon { 78 compatible = "iio-hwmon"; 78 compatible = "iio-hwmon"; 79 io-channels = <&adc 0>, <&adc 79 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, 80 <&adc 4>, <&adc 5>, <& 80 <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>, 81 <&adc 8>, <&adc 9>, <& 81 <&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>, 82 <&adc 12>, <&adc 13>, 82 <&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>; 83 }; 83 }; 84 }; 84 }; 85 85 86 &fmc { 86 &fmc { 87 status = "okay"; 87 status = "okay"; 88 flash@0 { 88 flash@0 { 89 status = "okay"; 89 status = "okay"; 90 m25p,fast-read; 90 m25p,fast-read; 91 label = "bmc"; 91 label = "bmc"; 92 spi-max-frequency = <50000000> 92 spi-max-frequency = <50000000>; 93 #include "openbmc-flash-layout.dtsi" 93 #include "openbmc-flash-layout.dtsi" 94 }; 94 }; 95 }; 95 }; 96 96 97 &spi1 { 97 &spi1 { 98 status = "okay"; 98 status = "okay"; 99 pinctrl-names = "default"; 99 pinctrl-names = "default"; 100 pinctrl-0 = <&pinctrl_spi1_default>; 100 pinctrl-0 = <&pinctrl_spi1_default>; 101 flash@0 { 101 flash@0 { 102 status = "okay"; 102 status = "okay"; 103 m25p,fast-read; 103 m25p,fast-read; 104 label = "bios"; 104 label = "bios"; 105 spi-max-frequency = <100000000 105 spi-max-frequency = <100000000>; 106 }; 106 }; 107 }; 107 }; 108 108 109 &uart1 { 109 &uart1 { 110 status = "okay"; 110 status = "okay"; 111 }; 111 }; 112 112 113 &uart5 { 113 &uart5 { 114 status = "okay"; 114 status = "okay"; 115 }; 115 }; 116 116 117 &mac0 { 117 &mac0 { 118 status = "okay"; 118 status = "okay"; 119 119 120 pinctrl-names = "default"; 120 pinctrl-names = "default"; 121 pinctrl-0 = <&pinctrl_rmii1_default>; 121 pinctrl-0 = <&pinctrl_rmii1_default>; 122 clocks = <&syscon ASPEED_CLK_GATE_MAC1 122 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>, 123 <&syscon ASPEED_CLK_MAC1RCLK>; 123 <&syscon ASPEED_CLK_MAC1RCLK>; 124 clock-names = "MACCLK", "RCLK"; 124 clock-names = "MACCLK", "RCLK"; 125 use-ncsi; 125 use-ncsi; 126 }; 126 }; 127 127 128 &mac1 { 128 &mac1 { 129 status = "okay"; 129 status = "okay"; 130 130 131 pinctrl-names = "default"; 131 pinctrl-names = "default"; 132 pinctrl-0 = <&pinctrl_rgmii2_default & 132 pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>; 133 }; 133 }; 134 134 135 &gpio { 135 &gpio { 136 status = "okay"; 136 status = "okay"; 137 /* Enable GPIOE0 and GPIOE2 pass-throu 137 /* Enable GPIOE0 and GPIOE2 pass-through by default */ 138 pinctrl-names = "pass-through"; 138 pinctrl-names = "pass-through"; 139 pinctrl-0 = <&pinctrl_gpie0_default 139 pinctrl-0 = <&pinctrl_gpie0_default 140 &pinctrl_gpie2_default 140 &pinctrl_gpie2_default>; 141 gpio-line-names = 141 gpio-line-names = 142 /*A0-A7*/ "","MAC2LINK","BMC_RES 142 /*A0-A7*/ "","MAC2LINK","BMC_RESET_CPLD","","BMC_SCL9","","MAC2MDC_R","", 143 /*B0-B7*/ "BMC_INIT_OK","FM_SKU_ 143 /*B0-B7*/ "BMC_INIT_OK","FM_SKU_ID2","FM_SPD_DDRCPU_LVLSHFT_DIS_R_N", 144 "FM_CPU_MSMI_C 144 "FM_CPU_MSMI_CATERR_LVT3_BMC_N","","FM_CPU0_PROCHOT_LVT3_N", 145 "FM_CPU_MEM_TH 145 "FM_CPU_MEM_THERMTRIP_LVT3_N","BIOS_LOAD_DEFAULT_R_N", 146 /*C0-C7*/ "","","","","","",""," 146 /*C0-C7*/ "","","","","","","","", 147 /*D0-D7*/ "","BMC_SD2CMD","BMC_S 147 /*D0-D7*/ "","BMC_SD2CMD","BMC_SD2DAT0","BMC_SD2DAT1","BMC_SD2DAT2", 148 "BMC_SD2DAT3", 148 "BMC_SD2DAT3","BMC_SD2DET","BMC_SD2WPT", 149 /*E0-E7*/ "FM_BOARD_ID0","FM_BOA 149 /*E0-E7*/ "FM_BOARD_ID0","FM_BOARD_ID1","FM_BOARD_ID2","FM_BOARD_ID3", 150 "FM_BOARD_ID4" 150 "FM_BOARD_ID4","FM_BOARD_ID5","","", 151 /*F0-F7*/ "PSU1_PRESENT_N","PSU2 151 /*F0-F7*/ "PSU1_PRESENT_N","PSU2_PRESENT_N","FAN_FAULT_LED_N","PSU_FAULT_LED_N", 152 "BIOS_DEBUG_MO 152 "BIOS_DEBUG_MODE_N","FP_LCD_RESET","FAN_TYPE_SEL", 153 "RST_GLB_RST_W 153 "RST_GLB_RST_WARN_N", 154 /*G0-G7*/ "IRQ_LPTM21L_ALERT_N", 154 /*G0-G7*/ "IRQ_LPTM21L_ALERT_N","IRQ_PLD_ALERT_N","AC_FAIL_N","FP_LCD_PRESENT_BMC", 155 "BMC_JTAG_TCK_ 155 "BMC_JTAG_TCK_MUX_SEL","BMC_BIOS_RESERVED","SYS_NMI_N","BMC_NMI_N", 156 /*H0-H7*/ "JTAG_BMC_TDI","JTAG_B 156 /*H0-H7*/ "JTAG_BMC_TDI","JTAG_BMC_TDO","JTAG_BMC_TCK","JTAG_BMC_TMS","FM_BOARD_ID6", 157 "FM_SKU_ID0"," 157 "FM_SKU_ID0","IRQ_SML1_PMBUS_ALERT_N","IRQ_SML0_ALERT_MUX_N", 158 /*I0-I7*/ "FM_CPU_ERR0_LVT3_BMC_ 158 /*I0-I7*/ "FM_CPU_ERR0_LVT3_BMC_N","FM_CPU_ERR1_LVT3_BMC_N","FM_BMC_PCH_SCI_LPC_N", 159 "FM_SYS_THROTT 159 "FM_SYS_THROTTLE_LVC3","SPI2_PCH_CS0_N","","","", 160 /*J0-J7*/ "FM_CPU0_SKTOCC_LVT3_N 160 /*J0-J7*/ "FM_CPU0_SKTOCC_LVT3_N","FM_CPU1_SKTOCC_LVT3_N","","SYSHOT_FAULT_LED_N", 161 "VGA_HSYNC","V 161 "VGA_HSYNC","VGA_VSYNC","","", 162 /*K0-K7*/ "","","","","","",""," 162 /*K0-K7*/ "","","","","","","","", 163 /*L0-L7*/ "","","","","","","SYS 163 /*L0-L7*/ "","","","","","","SYS_UART_TXD1","SYS_UART_RXD1", 164 /*M0-M7*/ "","","","","","",""," 164 /*M0-M7*/ "","","","","","","","", 165 /*N0-N7*/ "","","","","","",""," 165 /*N0-N7*/ "","","","","","","","", 166 /*O0-O7*/ "","","","","","",""," 166 /*O0-O7*/ "","","","","","","","", 167 /*P0-P7*/ "","","","","","",""," 167 /*P0-P7*/ "","","","","","","","", 168 /*Q0-Q7*/ "","","","","","","FM_ 168 /*Q0-Q7*/ "","","","","","","FM_PCH_BMC_THERMTRIP_N","INTRUDER_N", 169 /*R0-R7*/ "SPI_BMC_BOOT_CS1_R_N" 169 /*R0-R7*/ "SPI_BMC_BOOT_CS1_R_N","FM_CPU_MEMHOT_LVC3_N", 170 "DBP_CPU_PREQ_ 170 "DBP_CPU_PREQ_N","FM_CPU_ERR2_LVT3_BMC_N", 171 "RISER_NCSI_EN 171 "RISER_NCSI_EN_N","","LOM_NCSI_EN_N","OCP_NCSI_EN_N", 172 /*S0-S7*/ "BMC_XDP_PRDY_N","SIO_ 172 /*S0-S7*/ "BMC_XDP_PRDY_N","SIO_POWER_GOOD","BMC_PWR_DEBUG_R_N","BMC_DEBUG_EN_R_N","", 173 "GPIOS5_BMC"," 173 "GPIOS5_BMC","","GPIOS7_BMC", 174 /*T0-T7*/ "","","","","","",""," 174 /*T0-T7*/ "","","","","","","","", 175 /*U0-U7*/ "","","","","","",""," 175 /*U0-U7*/ "","","","","","","","", 176 /*V0-V7*/ "","","","","","",""," 176 /*V0-V7*/ "","","","","","","","", 177 /*W0-W7*/ "","","","","","",""," 177 /*W0-W7*/ "","","","","","","","", 178 /*X0-X7*/ "","","","","","",""," 178 /*X0-X7*/ "","","","","","","","", 179 /*Y0-Y7*/ "","BMC_DET_UID_N","BM 179 /*Y0-Y7*/ "","BMC_DET_UID_N","BMC_JTAG_SEL","SIO_ONCONTROL","","","","", 180 /*Z0-Z7*/ "XDP_PRESENT_N","DBP_S 180 /*Z0-Z7*/ "XDP_PRESENT_N","DBP_SYSPWROK","BMC_JTAG_SEL","FM_SMI_ACTIVE_N","", 181 "GPIOZ5","","" 181 "GPIOZ5","","", 182 /*AA0-AA7*/ "FP_BMC_SYSLED_N","PS_ 182 /*AA0-AA7*/ "FP_BMC_SYSLED_N","PS_PWROK","RST_PLTRST_BMC_N","HDA_SDO_BMC", 183 "FM_SLPS4_R_N" 183 "FM_SLPS4_R_N","","POWER_BUTTON","POWER_OUT", 184 /*AB0-AB7*/ "RESET_OUT","RESET_BUT 184 /*AB0-AB7*/ "RESET_OUT","RESET_BUTTON","BIOS_REFLASH","POST_COMPLETE","","","","", 185 /*AC0-AC7*/ "","","","","","",""," 185 /*AC0-AC7*/ "","","","","","","",""; 186 }; 186 }; 187 187 188 &i2c0 { 188 &i2c0 { 189 /* FP_LCD */ 189 /* FP_LCD */ 190 status = "okay"; 190 status = "okay"; 191 }; 191 }; 192 192 193 &i2c1 { 193 &i2c1 { 194 status = "okay"; 194 status = "okay"; 195 195 196 eeprom@50 { 196 eeprom@50 { 197 compatible = "atmel,24c256"; 197 compatible = "atmel,24c256"; 198 reg = <0x50>; 198 reg = <0x50>; 199 label = "fru"; 199 label = "fru"; 200 }; 200 }; 201 }; 201 }; 202 202 203 &i2c2 { 203 &i2c2 { 204 status = "okay"; 204 status = "okay"; 205 205 206 tmp112@48 { 206 tmp112@48 { 207 compatible = "ti,tmp112"; 207 compatible = "ti,tmp112"; 208 reg = <0x48>; 208 reg = <0x48>; 209 label = "inlet"; 209 label = "inlet"; 210 }; 210 }; 211 211 212 tmp112@49 { 212 tmp112@49 { 213 compatible = "ti,tmp112"; 213 compatible = "ti,tmp112"; 214 reg = <0x49>; 214 reg = <0x49>; 215 label = "outlet"; 215 label = "outlet"; 216 }; 216 }; 217 217 218 i2c-mux@70 { 218 i2c-mux@70 { 219 compatible = "nxp,pca9548"; 219 compatible = "nxp,pca9548"; 220 reg = <0x70>; 220 reg = <0x70>; 221 }; 221 }; 222 }; 222 }; 223 223 224 &i2c3 { 224 &i2c3 { 225 status = "okay"; 225 status = "okay"; 226 226 227 i2c-mux@70 { 227 i2c-mux@70 { 228 compatible = "nxp,pca9548"; 228 compatible = "nxp,pca9548"; 229 reg = <0x70>; 229 reg = <0x70>; 230 }; 230 }; 231 231 232 i2c-mux@71 { 232 i2c-mux@71 { 233 compatible = "nxp,pca9548"; 233 compatible = "nxp,pca9548"; 234 reg = <0x71>; 234 reg = <0x71>; 235 }; 235 }; 236 236 237 i2c-mux@72 { 237 i2c-mux@72 { 238 compatible = "nxp,pca9548"; 238 compatible = "nxp,pca9548"; 239 reg = <0x72>; 239 reg = <0x72>; 240 }; 240 }; 241 }; 241 }; 242 242 243 &i2c4 { 243 &i2c4 { 244 /* IPMB */ 244 /* IPMB */ 245 status = "okay"; 245 status = "okay"; 246 }; 246 }; 247 247 248 &i2c5 { 248 &i2c5 { 249 status = "okay"; 249 status = "okay"; 250 250 251 i2c-mux@70 { 251 i2c-mux@70 { 252 compatible = "nxp,pca9548"; 252 compatible = "nxp,pca9548"; 253 reg = <0x70>; 253 reg = <0x70>; 254 }; 254 }; 255 }; 255 }; 256 256 257 &i2c6 { 257 &i2c6 { 258 status = "okay"; 258 status = "okay"; 259 259 260 i2c-mux@70 { 260 i2c-mux@70 { 261 compatible = "nxp,pca9548"; 261 compatible = "nxp,pca9548"; 262 reg = <0x70>; 262 reg = <0x70>; 263 }; 263 }; 264 }; 264 }; 265 265 266 &i2c7 { 266 &i2c7 { 267 status = "okay"; 267 status = "okay"; 268 268 269 adm1278@33 { 269 adm1278@33 { 270 compatible = "adi,adm1293"; 270 compatible = "adi,adm1293"; 271 reg = <0x33>; 271 reg = <0x33>; 272 }; 272 }; 273 273 274 adm1278@32 { 274 adm1278@32 { 275 compatible = "adi,adm1293"; 275 compatible = "adi,adm1293"; 276 reg = <0x32>; 276 reg = <0x32>; 277 }; 277 }; 278 278 279 adm1278@20 { 279 adm1278@20 { 280 compatible = "adi,adm1293"; 280 compatible = "adi,adm1293"; 281 reg = <0x20>; 281 reg = <0x20>; 282 }; 282 }; 283 }; 283 }; 284 284 285 &i2c8 { 285 &i2c8 { 286 status = "okay"; 286 status = "okay"; 287 287 288 pca0: pca9555@23 { 288 pca0: pca9555@23 { 289 compatible = "nxp,pca9555"; 289 compatible = "nxp,pca9555"; 290 reg = <0x23>; 290 reg = <0x23>; 291 #address-cells = <1>; 291 #address-cells = <1>; 292 #size-cells = <0>; 292 #size-cells = <0>; 293 293 294 gpio-controller; 294 gpio-controller; 295 #gpio-cells = <2>; 295 #gpio-cells = <2>; 296 296 297 gpio@0 { 297 gpio@0 { 298 reg = <0>; 298 reg = <0>; 299 type = <PCA955X_TYPE_G 299 type = <PCA955X_TYPE_GPIO>; 300 }; 300 }; 301 301 302 gpio@1 { 302 gpio@1 { 303 reg = <1>; 303 reg = <1>; 304 type = <PCA955X_TYPE_G 304 type = <PCA955X_TYPE_GPIO>; 305 }; 305 }; 306 306 307 gpio@2 { 307 gpio@2 { 308 reg = <2>; 308 reg = <2>; 309 type = <PCA955X_TYPE_G 309 type = <PCA955X_TYPE_GPIO>; 310 }; 310 }; 311 311 312 gpio@3 { 312 gpio@3 { 313 reg = <3>; 313 reg = <3>; 314 type = <PCA955X_TYPE_G 314 type = <PCA955X_TYPE_GPIO>; 315 }; 315 }; 316 316 317 gpio@4 { 317 gpio@4 { 318 reg = <4>; 318 reg = <4>; 319 type = <PCA955X_TYPE_G 319 type = <PCA955X_TYPE_GPIO>; 320 }; 320 }; 321 321 322 gpio@5 { 322 gpio@5 { 323 reg = <5>; 323 reg = <5>; 324 type = <PCA955X_TYPE_G 324 type = <PCA955X_TYPE_GPIO>; 325 }; 325 }; 326 326 327 gpio@6 { 327 gpio@6 { 328 reg = <6>; 328 reg = <6>; 329 type = <PCA955X_TYPE_G 329 type = <PCA955X_TYPE_GPIO>; 330 }; 330 }; 331 }; 331 }; 332 332 333 pca1: pca9555@22 { 333 pca1: pca9555@22 { 334 compatible = "nxp,pca9555"; 334 compatible = "nxp,pca9555"; 335 reg = <0x22>; 335 reg = <0x22>; 336 #address-cells = <1>; 336 #address-cells = <1>; 337 #size-cells = <0>; 337 #size-cells = <0>; 338 338 339 gpio-controller; 339 gpio-controller; 340 #gpio-cells = <2>; 340 #gpio-cells = <2>; 341 341 342 gpio@0 { 342 gpio@0 { 343 reg = <0>; 343 reg = <0>; 344 type = <PCA955X_TYPE_G 344 type = <PCA955X_TYPE_GPIO>; 345 }; 345 }; 346 346 347 gpio@1 { 347 gpio@1 { 348 reg = <1>; 348 reg = <1>; 349 type = <PCA955X_TYPE_G 349 type = <PCA955X_TYPE_GPIO>; 350 }; 350 }; 351 351 352 gpio@2 { 352 gpio@2 { 353 reg = <2>; 353 reg = <2>; 354 type = <PCA955X_TYPE_G 354 type = <PCA955X_TYPE_GPIO>; 355 }; 355 }; 356 356 357 gpio@3 { 357 gpio@3 { 358 reg = <3>; 358 reg = <3>; 359 type = <PCA955X_TYPE_G 359 type = <PCA955X_TYPE_GPIO>; 360 }; 360 }; 361 361 362 gpio@4 { 362 gpio@4 { 363 reg = <4>; 363 reg = <4>; 364 type = <PCA955X_TYPE_G 364 type = <PCA955X_TYPE_GPIO>; 365 }; 365 }; 366 366 367 gpio@5 { 367 gpio@5 { 368 reg = <5>; 368 reg = <5>; 369 type = <PCA955X_TYPE_G 369 type = <PCA955X_TYPE_GPIO>; 370 }; 370 }; 371 371 372 gpio@6 { 372 gpio@6 { 373 reg = <6>; 373 reg = <6>; 374 type = <PCA955X_TYPE_G 374 type = <PCA955X_TYPE_GPIO>; 375 }; 375 }; 376 376 377 gpio@7 { 377 gpio@7 { 378 reg = <7>; 378 reg = <7>; 379 type = <PCA955X_TYPE_G 379 type = <PCA955X_TYPE_GPIO>; 380 }; 380 }; 381 }; 381 }; 382 382 383 pca2: pca9555@20 { 383 pca2: pca9555@20 { 384 compatible = "nxp,pca9555"; 384 compatible = "nxp,pca9555"; 385 reg = <0x20>; 385 reg = <0x20>; 386 #address-cells = <1>; 386 #address-cells = <1>; 387 #size-cells = <0>; 387 #size-cells = <0>; 388 388 389 gpio-controller; 389 gpio-controller; 390 #gpio-cells = <2>; 390 #gpio-cells = <2>; 391 391 392 gpio@0 { 392 gpio@0 { 393 reg = <0>; 393 reg = <0>; 394 type = <PCA955X_TYPE_G 394 type = <PCA955X_TYPE_GPIO>; 395 }; 395 }; 396 396 397 gpio@1 { 397 gpio@1 { 398 reg = <1>; 398 reg = <1>; 399 type = <PCA955X_TYPE_G 399 type = <PCA955X_TYPE_GPIO>; 400 }; 400 }; 401 401 402 gpio@2 { 402 gpio@2 { 403 reg = <2>; 403 reg = <2>; 404 type = <PCA955X_TYPE_G 404 type = <PCA955X_TYPE_GPIO>; 405 }; 405 }; 406 406 407 gpio@3 { 407 gpio@3 { 408 reg = <3>; 408 reg = <3>; 409 type = <PCA955X_TYPE_G 409 type = <PCA955X_TYPE_GPIO>; 410 }; 410 }; 411 411 412 gpio@4 { 412 gpio@4 { 413 reg = <4>; 413 reg = <4>; 414 type = <PCA955X_TYPE_G 414 type = <PCA955X_TYPE_GPIO>; 415 }; 415 }; 416 416 417 gpio@5 { 417 gpio@5 { 418 reg = <5>; 418 reg = <5>; 419 type = <PCA955X_TYPE_G 419 type = <PCA955X_TYPE_GPIO>; 420 }; 420 }; 421 421 422 gpio@6 { 422 gpio@6 { 423 reg = <6>; 423 reg = <6>; 424 type = <PCA955X_TYPE_G 424 type = <PCA955X_TYPE_GPIO>; 425 }; 425 }; 426 426 427 gpio@7 { 427 gpio@7 { 428 reg = <7>; 428 reg = <7>; 429 type = <PCA955X_TYPE_G 429 type = <PCA955X_TYPE_GPIO>; 430 }; 430 }; 431 }; 431 }; 432 432 433 pca3: pca9555@21 { 433 pca3: pca9555@21 { 434 compatible = "nxp,pca9555"; 434 compatible = "nxp,pca9555"; 435 reg = <0x21>; 435 reg = <0x21>; 436 #address-cells = <1>; 436 #address-cells = <1>; 437 #size-cells = <0>; 437 #size-cells = <0>; 438 438 439 gpio-controller; 439 gpio-controller; 440 #gpio-cells = <2>; 440 #gpio-cells = <2>; 441 441 442 gpio@0 { 442 gpio@0 { 443 reg = <0>; 443 reg = <0>; 444 type = <PCA955X_TYPE_G 444 type = <PCA955X_TYPE_GPIO>; 445 }; 445 }; 446 446 447 gpio@1 { 447 gpio@1 { 448 reg = <1>; 448 reg = <1>; 449 type = <PCA955X_TYPE_G 449 type = <PCA955X_TYPE_GPIO>; 450 }; 450 }; 451 451 452 gpio@2 { 452 gpio@2 { 453 reg = <2>; 453 reg = <2>; 454 type = <PCA955X_TYPE_G 454 type = <PCA955X_TYPE_GPIO>; 455 }; 455 }; 456 456 457 gpio@3 { 457 gpio@3 { 458 reg = <3>; 458 reg = <3>; 459 type = <PCA955X_TYPE_G 459 type = <PCA955X_TYPE_GPIO>; 460 }; 460 }; 461 461 462 gpio@4 { 462 gpio@4 { 463 reg = <4>; 463 reg = <4>; 464 type = <PCA955X_TYPE_G 464 type = <PCA955X_TYPE_GPIO>; 465 }; 465 }; 466 466 467 gpio@5 { 467 gpio@5 { 468 reg = <5>; 468 reg = <5>; 469 type = <PCA955X_TYPE_G 469 type = <PCA955X_TYPE_GPIO>; 470 }; 470 }; 471 471 472 gpio@6 { 472 gpio@6 { 473 reg = <6>; 473 reg = <6>; 474 type = <PCA955X_TYPE_G 474 type = <PCA955X_TYPE_GPIO>; 475 }; 475 }; 476 476 477 gpio@7 { 477 gpio@7 { 478 reg = <7>; 478 reg = <7>; 479 type = <PCA955X_TYPE_G 479 type = <PCA955X_TYPE_GPIO>; 480 }; 480 }; 481 }; 481 }; 482 }; 482 }; 483 483 484 &i2c9 { 484 &i2c9 { 485 /* cpld */ 485 /* cpld */ 486 status = "okay"; 486 status = "okay"; 487 }; 487 }; 488 488 489 &i2c10 { 489 &i2c10 { 490 status = "okay"; 490 status = "okay"; 491 491 492 pca4: pca9555@24 { 492 pca4: pca9555@24 { 493 compatible = "nxp,pca9555"; 493 compatible = "nxp,pca9555"; 494 reg = <0x24>; 494 reg = <0x24>; 495 #address-cells = <1>; 495 #address-cells = <1>; 496 #size-cells = <0>; 496 #size-cells = <0>; 497 497 498 gpio-controller; 498 gpio-controller; 499 #gpio-cells = <2>; 499 #gpio-cells = <2>; 500 500 501 gpio@0 { 501 gpio@0 { 502 reg = <0>; 502 reg = <0>; 503 type = <PCA955X_TYPE_G 503 type = <PCA955X_TYPE_GPIO>; 504 }; 504 }; 505 505 506 gpio@1 { 506 gpio@1 { 507 reg = <1>; 507 reg = <1>; 508 type = <PCA955X_TYPE_G 508 type = <PCA955X_TYPE_GPIO>; 509 }; 509 }; 510 510 511 gpio@2 { 511 gpio@2 { 512 reg = <2>; 512 reg = <2>; 513 type = <PCA955X_TYPE_G 513 type = <PCA955X_TYPE_GPIO>; 514 }; 514 }; 515 515 516 gpio@3 { 516 gpio@3 { 517 reg = <3>; 517 reg = <3>; 518 type = <PCA955X_TYPE_G 518 type = <PCA955X_TYPE_GPIO>; 519 }; 519 }; 520 520 521 gpio@4 { 521 gpio@4 { 522 reg = <4>; 522 reg = <4>; 523 type = <PCA955X_TYPE_G 523 type = <PCA955X_TYPE_GPIO>; 524 }; 524 }; 525 525 526 gpio@5 { 526 gpio@5 { 527 reg = <5>; 527 reg = <5>; 528 type = <PCA955X_TYPE_G 528 type = <PCA955X_TYPE_GPIO>; 529 }; 529 }; 530 530 531 gpio@6 { 531 gpio@6 { 532 reg = <6>; 532 reg = <6>; 533 type = <PCA955X_TYPE_G 533 type = <PCA955X_TYPE_GPIO>; 534 }; 534 }; 535 535 536 gpio@7 { 536 gpio@7 { 537 reg = <7>; 537 reg = <7>; 538 type = <PCA955X_TYPE_G 538 type = <PCA955X_TYPE_GPIO>; 539 }; 539 }; 540 }; 540 }; 541 541 542 pca5: pca9555@25 { 542 pca5: pca9555@25 { 543 compatible = "nxp,pca9555"; 543 compatible = "nxp,pca9555"; 544 reg = <0x25>; 544 reg = <0x25>; 545 #address-cells = <1>; 545 #address-cells = <1>; 546 #size-cells = <0>; 546 #size-cells = <0>; 547 547 548 gpio-controller; 548 gpio-controller; 549 #gpio-cells = <2>; 549 #gpio-cells = <2>; 550 550 551 gpio@0 { 551 gpio@0 { 552 reg = <0>; 552 reg = <0>; 553 type = <PCA955X_TYPE_G 553 type = <PCA955X_TYPE_GPIO>; 554 }; 554 }; 555 555 556 gpio@1 { 556 gpio@1 { 557 reg = <1>; 557 reg = <1>; 558 type = <PCA955X_TYPE_G 558 type = <PCA955X_TYPE_GPIO>; 559 }; 559 }; 560 560 561 gpio@2 { 561 gpio@2 { 562 reg = <2>; 562 reg = <2>; 563 type = <PCA955X_TYPE_G 563 type = <PCA955X_TYPE_GPIO>; 564 }; 564 }; 565 565 566 gpio@3 { 566 gpio@3 { 567 reg = <3>; 567 reg = <3>; 568 type = <PCA955X_TYPE_G 568 type = <PCA955X_TYPE_GPIO>; 569 }; 569 }; 570 570 571 gpio@4 { 571 gpio@4 { 572 reg = <4>; 572 reg = <4>; 573 type = <PCA955X_TYPE_G 573 type = <PCA955X_TYPE_GPIO>; 574 }; 574 }; 575 575 576 gpio@5 { 576 gpio@5 { 577 reg = <5>; 577 reg = <5>; 578 type = <PCA955X_TYPE_G 578 type = <PCA955X_TYPE_GPIO>; 579 }; 579 }; 580 580 581 gpio@6 { 581 gpio@6 { 582 reg = <6>; 582 reg = <6>; 583 type = <PCA955X_TYPE_G 583 type = <PCA955X_TYPE_GPIO>; 584 }; 584 }; 585 }; 585 }; 586 }; 586 }; 587 587 588 &i2c11 { 588 &i2c11 { 589 status = "okay"; 589 status = "okay"; 590 590 591 power-supply@58 { 591 power-supply@58 { 592 compatible = "inspur,ipsps1"; 592 compatible = "inspur,ipsps1"; 593 reg = <0x58>; 593 reg = <0x58>; 594 }; 594 }; 595 595 596 power-supply@59 { 596 power-supply@59 { 597 compatible = "inspur,ipsps1"; 597 compatible = "inspur,ipsps1"; 598 reg = <0x59>; 598 reg = <0x59>; 599 }; 599 }; 600 }; 600 }; 601 601 602 &i2c12 { 602 &i2c12 { 603 status = "okay"; 603 status = "okay"; 604 }; 604 }; 605 605 606 &i2c13 { 606 &i2c13 { 607 status = "okay"; 607 status = "okay"; 608 }; 608 }; 609 609 610 &pwm_tacho { 610 &pwm_tacho { 611 status = "okay"; 611 status = "okay"; 612 pinctrl-names = "default"; 612 pinctrl-names = "default"; 613 pinctrl-0 = <&pinctrl_pwm0_default &pi 613 pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default 614 &pinctrl_pwm2_default &pinctrl 614 &pinctrl_pwm2_default &pinctrl_pwm3_default 615 &pinctrl_pwm4_default &pinctrl 615 &pinctrl_pwm4_default &pinctrl_pwm5_default 616 &pinctrl_pwm6_default &pinctrl 616 &pinctrl_pwm6_default &pinctrl_pwm7_default>; 617 617 618 fan@0 { 618 fan@0 { 619 reg = <0x00>; 619 reg = <0x00>; 620 aspeed,fan-tach-ch = /bits/ 8 620 aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>; 621 }; 621 }; 622 622 623 fan@1 { 623 fan@1 { 624 reg = <0x01>; 624 reg = <0x01>; 625 aspeed,fan-tach-ch = /bits/ 8 625 aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>; 626 }; 626 }; 627 627 628 fan@2 { 628 fan@2 { 629 reg = <0x02>; 629 reg = <0x02>; 630 aspeed,fan-tach-ch = /bits/ 8 630 aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>; 631 }; 631 }; 632 632 633 fan@3 { 633 fan@3 { 634 reg = <0x03>; 634 reg = <0x03>; 635 aspeed,fan-tach-ch = /bits/ 8 635 aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>; 636 }; 636 }; 637 637 638 fan@4 { 638 fan@4 { 639 reg = <0x04>; 639 reg = <0x04>; 640 aspeed,fan-tach-ch = /bits/ 8 640 aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>; 641 }; 641 }; 642 642 643 fan@5 { 643 fan@5 { 644 reg = <0x05>; 644 reg = <0x05>; 645 aspeed,fan-tach-ch = /bits/ 8 645 aspeed,fan-tach-ch = /bits/ 8 <0x0a 0x0b>; 646 }; 646 }; 647 647 648 fan@6 { 648 fan@6 { 649 reg = <0x06>; 649 reg = <0x06>; 650 aspeed,fan-tach-ch = /bits/ 8 650 aspeed,fan-tach-ch = /bits/ 8 <0x0c 0x0d>; 651 }; 651 }; 652 652 653 fan@7 { 653 fan@7 { 654 reg = <0x07>; 654 reg = <0x07>; 655 aspeed,fan-tach-ch = /bits/ 8 655 aspeed,fan-tach-ch = /bits/ 8 <0x0e 0x0f>; 656 }; 656 }; 657 }; 657 }; 658 658 659 &kcs3 { 659 &kcs3 { 660 status = "okay"; 660 status = "okay"; 661 aspeed,lpc-io-reg = <0xca2>; 661 aspeed,lpc-io-reg = <0xca2>; 662 }; 662 }; 663 663 664 &kcs4 { 664 &kcs4 { 665 status = "okay"; 665 status = "okay"; 666 aspeed,lpc-io-reg = <0xca4>; 666 aspeed,lpc-io-reg = <0xca4>; 667 }; 667 }; 668 668 669 &adc { 669 &adc { 670 status = "okay"; 670 status = "okay"; 671 pinctrl-names = "default"; 671 pinctrl-names = "default"; 672 pinctrl-0 = <&pinctrl_adc0_default &pi 672 pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default 673 &pinctrl_adc2_default &pinctrl_adc3_d 673 &pinctrl_adc2_default &pinctrl_adc3_default &pinctrl_adc4_default 674 &pinctrl_adc5_default &pinctrl_adc6_d 674 &pinctrl_adc5_default &pinctrl_adc6_default &pinctrl_adc7_default 675 &pinctrl_adc8_default &pinctrl_adc9_d 675 &pinctrl_adc8_default &pinctrl_adc9_default &pinctrl_adc10_default 676 &pinctrl_adc11_default &pinctrl_adc12 676 &pinctrl_adc11_default &pinctrl_adc12_default &pinctrl_adc13_default 677 &pinctrl_adc14_default &pinctrl_adc15 677 &pinctrl_adc14_default &pinctrl_adc15_default>; 678 }; 678 }; 679 679 680 &vhub { 680 &vhub { 681 status = "okay"; 681 status = "okay"; 682 }; 682 }; 683 683 684 &video { 684 &video { 685 status = "okay"; 685 status = "okay"; 686 memory-region = <&video_engine_memory> 686 memory-region = <&video_engine_memory>; 687 }; 687 }; 688 688 689 &vuart { 689 &vuart { 690 status = "okay"; 690 status = "okay"; 691 }; 691 };
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