1 // SPDX-License-Identifier: GPL-2.0-or-later
2 // Copyright (c) 2021-2022 Qualcomm Innovation
3
4 /dts-v1/;
5
6 #include "aspeed-g6.dtsi"
7
8 / {
9 model = "Qualcomm DC-SCM V1 BMC";
10 compatible = "qcom,dc-scm-v1-bmc", "as
11
12 aliases {
13 serial4 = &uart5;
14 };
15
16 chosen {
17 stdout-path = &uart5;
18 bootargs = "console=ttyS4,1152
19 };
20
21 memory@80000000 {
22 device_type = "memory";
23 reg = <0x80000000 0x40000000>;
24 };
25 };
26
27 &mdio3 {
28 status = "okay";
29
30 ethphy3: ethernet-phy@1 {
31 compatible = "ethernet-phy-iee
32 reg = <1>;
33 };
34 };
35
36 &mac2 {
37 status = "okay";
38
39 /* Bootloader sets up the MAC to inser
40 phy-mode = "rgmii";
41 phy-handle = <ðphy3>;
42
43 pinctrl-names = "default";
44 pinctrl-0 = <&pinctrl_rgmii3_default>;
45 };
46
47 &mac3 {
48 status = "okay";
49
50 pinctrl-names = "default";
51 pinctrl-0 = <&pinctrl_rmii4_default>;
52
53 use-ncsi;
54 };
55
56 &rtc {
57 status = "okay";
58 };
59
60 &fmc {
61 status = "okay";
62
63 flash@0 {
64 status = "okay";
65 m25p,fast-read;
66 label = "bmc";
67 spi-max-frequency = <133000000
68 #include "openbmc-flash-layout-64.dtsi"
69 };
70
71 flash@1 {
72 status = "okay";
73 m25p,fast-read;
74 label = "alt-bmc";
75 spi-max-frequency = <133000000
76 #include "openbmc-flash-layout-64-alt.dtsi"
77 };
78 };
79
80 &spi1 {
81 status = "okay";
82 pinctrl-names = "default";
83 pinctrl-0 = <&pinctrl_spi1_default>;
84
85 flash@0 {
86 status = "okay";
87 m25p,fast-read;
88 label = "bios";
89 spi-max-frequency = <133000000
90 };
91 };
92
93 &gpio0 {
94 gpio-line-names =
95 /*A0-A7*/ "","","","","","","","
96 /*B0-B7*/ "BMC_FLASH_MUX_SEL",""
97 /*C0-C7*/ "","","","","","","","
98 /*D0-D7*/ "","","","","","","","
99 /*E0-E7*/ "","","","","","","","
100 /*F0-F7*/ "","","","","","","","
101 /*G0-G7*/ "","","","","","","","
102 /*H0-H7*/ "","","","","","","","
103 /*I0-I7*/ "","","","","","","","
104 /*J0-J7*/ "","","","","","","","
105 /*K0-K7*/ "","","","","","","","
106 /*L0-L7*/ "","","","","","","","
107 /*M0-M7*/ "","","","","","","","
108 /*N0-N7*/ "BMC_FWSPI_RST_N","","
109 /*O0-O7*/ "JTAG_MUX_A","JTAG_MUX
110 /*P0-P7*/ "","","","","","","","
111 /*Q0-Q7*/ "","","","","","","","
112 /*R0-R7*/ "","","","","","","","
113 /*S0-S7*/ "","","","","","","","
114 /*T0-T7*/ "","","","","","","","
115 /*U0-U7*/ "","","","","","","","
116 /*V0-V7*/ "","","","SCMFPGA_SPAR
117 "SCMFPGA_SPARE_GPIO2_3
118 "SCMFPGA_SPARE_GPIO4_3
119 /*W0-W7*/ "","","","","","","","
120 /*X0-X7*/ "","","","","","","","
121 /*Y0-Y7*/ "","","","","","","","
122 /*Z0-Z7*/ "","","","","","","","
123 /*AA0-AA7*/ "","","","","","","","
124 /*AB0-AB7*/ "","","","","","","","
125 /*AC0-AC7*/ "","","","","","","","
126 };
127
128 &gpio1 {
129 gpio-line-names =
130 /*A0-A7*/ "GPI_1_BMC_1V8","","",
131 "SCMFPGA_SPARE_GPIO1_1
132 /*B0-B7*/ "SCMFPGA_SPARE_GPIO3_1
133 "SCMFPGA_SPARE_GPIO5_1
134 /*C0-C7*/ "","","","","","","","
135 /*D0-D7*/ "","BMC_SPI1_RST_N","B
136 "","TPM2_PIRQ_N","TPM2
137 /*E0-E7*/ "","","","","","","","
138 };
139
140 &i2c2 {
141 status = "okay";
142 };
143
144 &i2c4 {
145 status = "okay";
146 };
147
148 &i2c5 {
149 status = "okay";
150 };
151
152 &i2c6 {
153 status = "okay";
154 };
155
156 &i2c7 {
157 status = "okay";
158 };
159
160 &i2c8 {
161 status = "okay";
162 };
163
164 &i2c9 {
165 status = "okay";
166 };
167
168 &i2c10 {
169 status = "okay";
170 };
171
172 &i2c12 {
173 status = "okay";
174 };
175
176 &i2c13 {
177 status = "okay";
178 };
179
180 &i2c14 {
181 status = "okay";
182 };
183
184 &i2c15 {
185 status = "okay";
186 };
187
188 &vhub {
189 status = "okay";
190 };
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