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TOMOYO Linux Cross Reference
Linux/scripts/dtc/include-prefixes/arm/aspeed/aspeed-bmc-vegman-rx20.dts

Version: ~ [ linux-6.12-rc7 ] ~ [ linux-6.11.7 ] ~ [ linux-6.10.14 ] ~ [ linux-6.9.12 ] ~ [ linux-6.8.12 ] ~ [ linux-6.7.12 ] ~ [ linux-6.6.60 ] ~ [ linux-6.5.13 ] ~ [ linux-6.4.16 ] ~ [ linux-6.3.13 ] ~ [ linux-6.2.16 ] ~ [ linux-6.1.116 ] ~ [ linux-6.0.19 ] ~ [ linux-5.19.17 ] ~ [ linux-5.18.19 ] ~ [ linux-5.17.15 ] ~ [ linux-5.16.20 ] ~ [ linux-5.15.171 ] ~ [ linux-5.14.21 ] ~ [ linux-5.13.19 ] ~ [ linux-5.12.19 ] ~ [ linux-5.11.22 ] ~ [ linux-5.10.229 ] ~ [ linux-5.9.16 ] ~ [ linux-5.8.18 ] ~ [ linux-5.7.19 ] ~ [ linux-5.6.19 ] ~ [ linux-5.5.19 ] ~ [ linux-5.4.285 ] ~ [ linux-5.3.18 ] ~ [ linux-5.2.21 ] ~ [ linux-5.1.21 ] ~ [ linux-5.0.21 ] ~ [ linux-4.20.17 ] ~ [ linux-4.19.323 ] ~ [ linux-4.18.20 ] ~ [ linux-4.17.19 ] ~ [ linux-4.16.18 ] ~ [ linux-4.15.18 ] ~ [ linux-4.14.336 ] ~ [ linux-4.13.16 ] ~ [ linux-4.12.14 ] ~ [ linux-4.11.12 ] ~ [ linux-4.10.17 ] ~ [ linux-4.9.337 ] ~ [ linux-4.4.302 ] ~ [ linux-3.10.108 ] ~ [ linux-2.6.32.71 ] ~ [ linux-2.6.0 ] ~ [ linux-2.4.37.11 ] ~ [ unix-v6-master ] ~ [ ccs-tools-1.8.12 ] ~ [ policy-sample ] ~
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Diff markup

Differences between /scripts/dtc/include-prefixes/arm/aspeed/aspeed-bmc-vegman-rx20.dts (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm/aspeed/aspeed-bmc-vegman-rx20.dts (Version linux-4.19.323)


  1 // SPDX-License-Identifier: GPL-2.0+              
  2 // Copyright (C) 2021 YADRO                       
  3 /dts-v1/;                                         
  4                                                   
  5 #include "aspeed-bmc-vegman.dtsi"                 
  6                                                   
  7 / {                                               
  8         model = "YADRO VEGMAN Rx20 BMC";          
  9         compatible = "yadro,vegman-rx20-bmc",     
 10                                                   
 11         leds {                                    
 12                 compatible = "gpio-leds";         
 13                                                   
 14                 temp_alarm {                      
 15                         label = "temp:red:stat    
 16                         default-state = "off";    
 17                         gpios = <&gpio ASPEED_    
 18                 };                                
 19                                                   
 20                 temp_ok {                         
 21                         label = "temp:green:st    
 22                         default-state = "off";    
 23                         gpios = <&gpio ASPEED_    
 24                 };                                
 25                                                   
 26                 psu_fault {                       
 27                         label = "psu:red:statu    
 28                         default-state = "off";    
 29                         gpios = <&gpio ASPEED_    
 30                 };                                
 31                                                   
 32                 psu_ok {                          
 33                         label = "psu:green:sta    
 34                         default-state = "off";    
 35                         gpios = <&gpio ASPEED_    
 36                 };                                
 37         };                                        
 38 };                                                
 39                                                   
 40 &gpio {                                           
 41         status = "okay";                          
 42         gpio-line-names =                         
 43         /*A0-A7*/       "CASE_OPEN_DNP","CASE_    
 44         /*B0-B7*/       "","","","","","","","    
 45         /*C0-C7*/       "","","","","","","","    
 46         /*D0-D7*/       "","","","","","","","    
 47         /*E0-E7*/       "RESET_BUTTON","RESET_    
 48         /*F0-F7*/       "NMI_OUT","CPU1_DISABL    
 49         /*G0-G7*/       "CPU_ERR2","CPU_CATERR    
 50         /*H0-H7*/       "PWRGD_P3V3_RISER1","P    
 51         /*I0-I7*/       "","","","","","","","    
 52         /*J0-J7*/       "","","","","","","","    
 53         /*K0-K7*/       "","","","","","","","    
 54         /*L0-L7*/       "","","","","","","","    
 55         /*M0-M7*/       "SEL_FLASH_SOFT","STAT    
 56         /*N0-N7*/       "","","","","","","","    
 57         /*O0-O7*/       "","","","","","","","    
 58         /*P0-P7*/       "","","","","","","SPI    
 59         /*Q0-Q7*/       "","","","","","","","    
 60         /*R0-R7*/       "_SPI_BMC_BOOT_CS1",""    
 61         /*S0-S7*/       "_SPI2_BMC_CS1","RSR_A    
 62         /*T0-T7*/       "","","","","","","","    
 63         /*U0-U7*/       "","","","","","","","    
 64         /*V0-V7*/       "","","","","","","","    
 65         /*W0-W7*/       "","","","","","","","    
 66         /*X0-X7*/       "","","","","","","","    
 67         /*Y0-Y7*/       "SIO_S3","SIO_S5","","    
 68         /*Z0-Z7*/       "FM_BMC_PWR_BTN","SIO_    
 69         /*AA0-AA7*/     "CPU_CLK_MUX_SEL","IRQ    
 70         /*AB0-AB7*/     "FM_CPU_BMCINIT","NMI_    
 71         /*AC0-AC7*/     "","","","","","","","    
 72 };                                                
 73                                                   
 74 &sgpio {                                          
 75         ngpios = <80>;                            
 76         bus-frequency = <2000000>;                
 77         status = "okay";                          
 78         /* SGPIO lines. even: input, odd: outp    
 79         gpio-line-names =                         
 80         /*A0-A7*/       "CPU1_PRESENCE","","CP    
 81         /*B0-B7*/       "CPU1_MISMATCH","","CP    
 82         /*C0-C7*/       "","","","","CPU2_MISM    
 83         /*D0-D7*/       "","","","","","","","    
 84         /*E0-E7*/       "","","","","","","","    
 85         /*F0-F7*/       "SGPIO_PLD_MINOR_REV_B    
 86         /*G0-G7*/       "MAIN_PLD_MINOR_REV_BI    
 87         /*H0-H7*/       "","","","","","","","    
 88         /*I0-I7*/       "","","","","","","","    
 89         /*J0-J7*/       "","","","","","","","    
 90 };                                                
 91                                                   
 92 &i2c11 {                                          
 93         /* SMB_BMC_MGMT_LVC3 */                   
 94         gpio@21 {                                 
 95                 compatible = "nxp,pcal9535";      
 96                 reg = <0x21>;                     
 97                 gpio-controller;                  
 98                 #gpio-cells = <2>;                
 99                 gpio-line-names =                 
100                 /*IO0.0-0.7*/   "ETH3_CLK_REQ"    
101                 /*IO1.0-1.7*/   "RSR_B_PCIE_X8    
102         };                                        
103         gpio@23 {                                 
104                 compatible = "nxp,pcal9535";      
105                 reg = <0x23>;                     
106                 gpio-controller;                  
107                 #gpio-cells = <2>;                
108                 gpio-line-names =                 
109                 /*IO0.0-0.7*/   "FM_LINK_WIDTH    
110                 /*IO1.0-1.7*/   "", "", "", ""    
111         };                                        
112         gpio@27 {                                 
113                 compatible = "nxp,pca9698";       
114                 reg = <0x27>;                     
115                 gpio-controller;                  
116                 #gpio-cells = <2>;                
117                 gpio-line-names =                 
118                 /*IO0.0-0.7*/   "PWRGD_PS_PWRO    
119                 /*IO1.0-1.7*/   "PWRGD_P1V05_P    
120                 /*IO2.0-2.7*/   "PWRGD_PVPP_AB    
121                 /*IO3.0-3.7*/   "PWRGD_PVMCP_C    
122                 /*IO4.0-4.7*/   "PCH_PWR_RESET    
123         };                                        
124         gpio@39 {                                 
125                 compatible = "nxp,pca9554";       
126                 reg = <0x39>;                     
127                 gpio-controller;                  
128                 #gpio-cells = <2>;                
129                 gpio-line-names =                 
130                 /*IO0.0-0.7*/   "FAN_FAULT_0",    
131         };                                        
132 };                                                
133                                                   
134 &i2c13 {                                          
135         /* SMB_PCIE2_STBY_LVC3 */                 
136         i2c-mux@70 {                              
137                 compatible = "nxp,pca9548";       
138                 reg = <0x70>;                     
139                 #address-cells = <1>;             
140                 #size-cells = <0>;                
141                 i2c-mux-idle-disconnect;          
142                                                   
143                 i2c@2 {                           
144                         #address-cells = <1>;     
145                         #size-cells = <0>;        
146                         reg = <2>;                
147                         i2c-mux@72 {              
148                                 compatible = "    
149                                 reg = <0x72>;     
150                                 #address-cells    
151                                 #size-cells =     
152                                                   
153                                 i2c@7 {           
154                                         #addre    
155                                         #size-    
156                                         reg =     
157                                         at24@5    
158                                                   
159                                                   
160                                                   
161                                                   
162                                                   
163                                         };        
164                                 };                
165                         };                        
166                 };                                
167         };                                        
168         i2c-mux@71 {                              
169                 compatible = "nxp,pca9543";       
170                 reg = <0x71>;                     
171                 #address-cells = <1>;             
172                 #size-cells = <0>;                
173                 i2c-mux-idle-disconnect;          
174         };                                        
175 };                                                
176                                                   
177 &i2c2 {                                           
178         /* SMB_PCIE_STBY_LVC3 */                  
179         i2c-mux@71 {                              
180                 compatible = "nxp,pca9548";       
181                 reg = <0x71>;                     
182                 #address-cells = <1>;             
183                 #size-cells = <0>;                
184                 i2c-mux-idle-disconnect;          
185                                                   
186                 i2c@0 {                           
187                         #address-cells = <1>;     
188                         #size-cells = <0>;        
189                         reg = <0>;                
190                         i2c-mux@72 {              
191                                 compatible = "    
192                                 reg = <0x72>;     
193                                 #address-cells    
194                                 #size-cells =     
195                                 i2c@7 {           
196                                         #addre    
197                                         #size-    
198                                         reg =     
199                                         at24@5    
200                                                   
201                                                   
202                                                   
203                                                   
204                                                   
205                                         };        
206                                 };                
207                         };                        
208                         at24@50 {                 
209                                 compatible = "    
210                                 reg = <0x50>;     
211                                 pagesize = <32    
212                                 size = <8192>;    
213                                 address-width     
214                         };                        
215                 };                                
216         };                                        
217 };                                                
218                                                   
219 &pwm_tacho {                                      
220         status = "okay";                          
221         pinctrl-names = "default";                
222         pinctrl-0 = <&pinctrl_pwm0_default &pi    
223                          &pinctrl_pwm2_default    
224                          &pinctrl_pwm4_default    
225                          &pinctrl_pwm6_default    
226                                                   
227         fan@0 {                                   
228                 reg = <0x00>;                     
229                 aspeed,fan-tach-ch = /bits/ 8     
230         };                                        
231         fan@1 {                                   
232                 reg = <0x01>;                     
233                 aspeed,fan-tach-ch = /bits/ 8     
234         };                                        
235         fan@2 {                                   
236                 reg = <0x02>;                     
237                 aspeed,fan-tach-ch = /bits/ 8     
238         };                                        
239         fan@3 {                                   
240                 reg = <0x03>;                     
241                 aspeed,fan-tach-ch = /bits/ 8     
242         };                                        
243         fan@4 {                                   
244                 reg = <0x04>;                     
245                 aspeed,fan-tach-ch = /bits/ 8     
246         };                                        
247         fan@5 {                                   
248                 reg = <0x05>;                     
249                 aspeed,fan-tach-ch = /bits/ 8     
250         };                                        
251         fan@6 {                                   
252                 reg = <0x06>;                     
253                 aspeed,fan-tach-ch = /bits/ 8     
254         };                                        
255 };                                                
                                                      

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