1 // SPDX-License-Identifier: GPL-2.0+ 1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2018 IBM Corp 2 // Copyright 2018 IBM Corp
3 3
4 &fsi { 4 &fsi {
5 cfam@0,0 { 5 cfam@0,0 {
6 reg = <0 0>; 6 reg = <0 0>;
7 #address-cells = <1>; 7 #address-cells = <1>;
8 #size-cells = <1>; 8 #size-cells = <1>;
9 chip-id = <0>; 9 chip-id = <0>;
10 10
11 scom@1000 { 11 scom@1000 {
12 compatible = "ibm,fsi2 12 compatible = "ibm,fsi2pib";
13 reg = <0x1000 0x400>; 13 reg = <0x1000 0x400>;
14 }; 14 };
15 15
16 i2c@1800 { 16 i2c@1800 {
17 compatible = "ibm,fsi- 17 compatible = "ibm,fsi-i2c-master";
18 reg = <0x1800 0x400>; 18 reg = <0x1800 0x400>;
19 #address-cells = <1>; 19 #address-cells = <1>;
20 #size-cells = <0>; 20 #size-cells = <0>;
21 21
22 cfam0_i2c0: i2c-bus@0 22 cfam0_i2c0: i2c-bus@0 {
23 reg = <0>; 23 reg = <0>;
24 }; 24 };
25 25
26 cfam0_i2c1: i2c-bus@1 26 cfam0_i2c1: i2c-bus@1 {
27 reg = <1>; 27 reg = <1>;
28 }; 28 };
29 29
30 cfam0_i2c2: i2c-bus@2 30 cfam0_i2c2: i2c-bus@2 {
31 reg = <2>; 31 reg = <2>;
32 }; 32 };
33 33
34 cfam0_i2c3: i2c-bus@3 34 cfam0_i2c3: i2c-bus@3 {
35 reg = <3>; 35 reg = <3>;
36 }; 36 };
37 37
38 cfam0_i2c4: i2c-bus@4 38 cfam0_i2c4: i2c-bus@4 {
39 reg = <4>; 39 reg = <4>;
40 }; 40 };
41 41
42 cfam0_i2c5: i2c-bus@5 42 cfam0_i2c5: i2c-bus@5 {
43 reg = <5>; 43 reg = <5>;
44 }; 44 };
45 45
46 cfam0_i2c6: i2c-bus@6 46 cfam0_i2c6: i2c-bus@6 {
47 reg = <6>; 47 reg = <6>;
48 }; 48 };
49 49
50 cfam0_i2c7: i2c-bus@7 50 cfam0_i2c7: i2c-bus@7 {
51 reg = <7>; 51 reg = <7>;
52 }; 52 };
53 53
54 cfam0_i2c8: i2c-bus@8 54 cfam0_i2c8: i2c-bus@8 {
55 reg = <8>; 55 reg = <8>;
56 }; 56 };
57 57
58 cfam0_i2c9: i2c-bus@9 58 cfam0_i2c9: i2c-bus@9 {
59 reg = <9>; 59 reg = <9>;
60 }; 60 };
61 61
62 cfam0_i2c10: i2c-bus@a 62 cfam0_i2c10: i2c-bus@a {
63 reg = <10>; 63 reg = <10>;
64 }; 64 };
65 65
66 cfam0_i2c11: i2c-bus@b 66 cfam0_i2c11: i2c-bus@b {
67 reg = <11>; 67 reg = <11>;
68 }; 68 };
69 69
70 cfam0_i2c12: i2c-bus@c 70 cfam0_i2c12: i2c-bus@c {
71 reg = <12>; 71 reg = <12>;
72 }; 72 };
73 73
74 cfam0_i2c13: i2c-bus@d 74 cfam0_i2c13: i2c-bus@d {
75 reg = <13>; 75 reg = <13>;
76 }; 76 };
77 77
78 cfam0_i2c14: i2c-bus@e 78 cfam0_i2c14: i2c-bus@e {
79 reg = <14>; 79 reg = <14>;
80 }; 80 };
81 }; 81 };
82 82
83 sbefifo@2400 { 83 sbefifo@2400 {
84 compatible = "ibm,p9-s 84 compatible = "ibm,p9-sbefifo";
85 reg = <0x2400 0x400>; 85 reg = <0x2400 0x400>;
86 #address-cells = <1>; 86 #address-cells = <1>;
87 #size-cells = <0>; 87 #size-cells = <0>;
88 88
89 fsi_occ0: occ@1 { 89 fsi_occ0: occ@1 {
90 compatible = " 90 compatible = "ibm,p9-occ";
91 }; 91 };
92 }; 92 };
93 93
94 fsi_hub0: hub@3400 { 94 fsi_hub0: hub@3400 {
95 compatible = "fsi-mast 95 compatible = "fsi-master-hub";
96 reg = <0x3400 0x400>; 96 reg = <0x3400 0x400>;
97 #address-cells = <2>; 97 #address-cells = <2>;
98 #size-cells = <0>; 98 #size-cells = <0>;
99 99
100 no-scan-on-init; 100 no-scan-on-init;
101 }; 101 };
102 }; 102 };
103 }; 103 };
104 104
105 &fsi_hub0 { 105 &fsi_hub0 {
106 cfam@1,0 { 106 cfam@1,0 {
107 reg = <1 0>; 107 reg = <1 0>;
108 #address-cells = <1>; 108 #address-cells = <1>;
109 #size-cells = <1>; 109 #size-cells = <1>;
110 chip-id = <1>; 110 chip-id = <1>;
111 111
112 scom@1000 { 112 scom@1000 {
113 compatible = "ibm,fsi2 113 compatible = "ibm,fsi2pib";
114 reg = <0x1000 0x400>; 114 reg = <0x1000 0x400>;
115 }; 115 };
116 116
117 i2c@1800 { 117 i2c@1800 {
118 compatible = "ibm,fsi- 118 compatible = "ibm,fsi-i2c-master";
119 reg = <0x1800 0x400>; 119 reg = <0x1800 0x400>;
120 #address-cells = <1>; 120 #address-cells = <1>;
121 #size-cells = <0>; 121 #size-cells = <0>;
122 122
123 cfam1_i2c0: i2c-bus@0 123 cfam1_i2c0: i2c-bus@0 {
124 reg = <0>; 124 reg = <0>;
125 }; 125 };
126 126
127 cfam1_i2c1: i2c-bus@1 127 cfam1_i2c1: i2c-bus@1 {
128 reg = <1>; 128 reg = <1>;
129 }; 129 };
130 130
131 cfam1_i2c2: i2c-bus@2 131 cfam1_i2c2: i2c-bus@2 {
132 reg = <2>; 132 reg = <2>;
133 }; 133 };
134 134
135 cfam1_i2c3: i2c-bus@3 135 cfam1_i2c3: i2c-bus@3 {
136 reg = <3>; 136 reg = <3>;
137 }; 137 };
138 138
139 cfam1_i2c4: i2c-bus@4 139 cfam1_i2c4: i2c-bus@4 {
140 reg = <4>; 140 reg = <4>;
141 }; 141 };
142 142
143 cfam1_i2c5: i2c-bus@5 143 cfam1_i2c5: i2c-bus@5 {
144 reg = <5>; 144 reg = <5>;
145 }; 145 };
146 146
147 cfam1_i2c6: i2c-bus@6 147 cfam1_i2c6: i2c-bus@6 {
148 reg = <6>; 148 reg = <6>;
149 }; 149 };
150 150
151 cfam1_i2c7: i2c-bus@7 151 cfam1_i2c7: i2c-bus@7 {
152 reg = <7>; 152 reg = <7>;
153 }; 153 };
154 154
155 cfam1_i2c8: i2c-bus@8 155 cfam1_i2c8: i2c-bus@8 {
156 reg = <8>; 156 reg = <8>;
157 }; 157 };
158 158
159 cfam1_i2c9: i2c-bus@9 159 cfam1_i2c9: i2c-bus@9 {
160 reg = <9>; 160 reg = <9>;
161 }; 161 };
162 162
163 cfam1_i2c10: i2c-bus@a 163 cfam1_i2c10: i2c-bus@a {
164 reg = <10>; 164 reg = <10>;
165 }; 165 };
166 166
167 cfam1_i2c11: i2c-bus@b 167 cfam1_i2c11: i2c-bus@b {
168 reg = <11>; 168 reg = <11>;
169 }; 169 };
170 170
171 cfam1_i2c12: i2c-bus@c 171 cfam1_i2c12: i2c-bus@c {
172 reg = <12>; 172 reg = <12>;
173 }; 173 };
174 174
175 cfam1_i2c13: i2c-bus@d 175 cfam1_i2c13: i2c-bus@d {
176 reg = <13>; 176 reg = <13>;
177 }; 177 };
178 178
179 cfam1_i2c14: i2c-bus@e 179 cfam1_i2c14: i2c-bus@e {
180 reg = <14>; 180 reg = <14>;
181 }; 181 };
182 }; 182 };
183 183
184 sbefifo@2400 { 184 sbefifo@2400 {
185 compatible = "ibm,p9-s 185 compatible = "ibm,p9-sbefifo";
186 reg = <0x2400 0x400>; 186 reg = <0x2400 0x400>;
187 #address-cells = <1>; 187 #address-cells = <1>;
188 #size-cells = <0>; 188 #size-cells = <0>;
189 189
190 fsi_occ1: occ@2 { 190 fsi_occ1: occ@2 {
191 compatible = " 191 compatible = "ibm,p9-occ";
192 }; 192 };
193 }; 193 };
194 194
195 fsi_hub1: hub@3400 { 195 fsi_hub1: hub@3400 {
196 compatible = "fsi-mast 196 compatible = "fsi-master-hub";
197 reg = <0x3400 0x400>; 197 reg = <0x3400 0x400>;
198 #address-cells = <2>; 198 #address-cells = <2>;
199 #size-cells = <0>; 199 #size-cells = <0>;
200 200
201 no-scan-on-init; 201 no-scan-on-init;
202 }; 202 };
203 }; 203 };
204 }; 204 };
205 205
206 /* Legacy OCC numbering (to get rid of when us 206 /* Legacy OCC numbering (to get rid of when userspace is fixed) */
207 &fsi_occ0 { 207 &fsi_occ0 {
208 reg = <1>; 208 reg = <1>;
209 }; 209 };
210 210
211 &fsi_occ1 { 211 &fsi_occ1 {
212 reg = <2>; 212 reg = <2>;
213 }; 213 };
214 214
215 / { 215 / {
216 aliases { 216 aliases {
217 i2c100 = &cfam0_i2c0; 217 i2c100 = &cfam0_i2c0;
218 i2c101 = &cfam0_i2c1; 218 i2c101 = &cfam0_i2c1;
219 i2c102 = &cfam0_i2c2; 219 i2c102 = &cfam0_i2c2;
220 i2c103 = &cfam0_i2c3; 220 i2c103 = &cfam0_i2c3;
221 i2c104 = &cfam0_i2c4; 221 i2c104 = &cfam0_i2c4;
222 i2c105 = &cfam0_i2c5; 222 i2c105 = &cfam0_i2c5;
223 i2c106 = &cfam0_i2c6; 223 i2c106 = &cfam0_i2c6;
224 i2c107 = &cfam0_i2c7; 224 i2c107 = &cfam0_i2c7;
225 i2c108 = &cfam0_i2c8; 225 i2c108 = &cfam0_i2c8;
226 i2c109 = &cfam0_i2c9; 226 i2c109 = &cfam0_i2c9;
227 i2c110 = &cfam0_i2c10; 227 i2c110 = &cfam0_i2c10;
228 i2c111 = &cfam0_i2c11; 228 i2c111 = &cfam0_i2c11;
229 i2c112 = &cfam0_i2c12; 229 i2c112 = &cfam0_i2c12;
230 i2c113 = &cfam0_i2c13; 230 i2c113 = &cfam0_i2c13;
231 i2c114 = &cfam0_i2c14; 231 i2c114 = &cfam0_i2c14;
232 i2c200 = &cfam1_i2c0; 232 i2c200 = &cfam1_i2c0;
233 i2c201 = &cfam1_i2c1; 233 i2c201 = &cfam1_i2c1;
234 i2c202 = &cfam1_i2c2; 234 i2c202 = &cfam1_i2c2;
235 i2c203 = &cfam1_i2c3; 235 i2c203 = &cfam1_i2c3;
236 i2c204 = &cfam1_i2c4; 236 i2c204 = &cfam1_i2c4;
237 i2c205 = &cfam1_i2c5; 237 i2c205 = &cfam1_i2c5;
238 i2c206 = &cfam1_i2c6; 238 i2c206 = &cfam1_i2c6;
239 i2c207 = &cfam1_i2c7; 239 i2c207 = &cfam1_i2c7;
240 i2c208 = &cfam1_i2c8; 240 i2c208 = &cfam1_i2c8;
241 i2c209 = &cfam1_i2c9; 241 i2c209 = &cfam1_i2c9;
242 i2c210 = &cfam1_i2c10; 242 i2c210 = &cfam1_i2c10;
243 i2c211 = &cfam1_i2c11; 243 i2c211 = &cfam1_i2c11;
244 i2c212 = &cfam1_i2c12; 244 i2c212 = &cfam1_i2c12;
245 i2c213 = &cfam1_i2c13; 245 i2c213 = &cfam1_i2c13;
246 i2c214 = &cfam1_i2c14; 246 i2c214 = &cfam1_i2c14;
247 }; 247 };
248 }; 248 };
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