1 // SPDX-License-Identifier: GPL-2.0
2
3 /* This include file covers the common periphe
4 * bcm2835, bcm2836 and bcm2837 implementation
5 */
6
7 / {
8 interrupt-parent = <&intc>;
9
10 soc {
11 dma: dma-controller@7e007000 {
12 compatible = "brcm,bcm
13 reg = <0x7e007000 0xf0
14 interrupts = <1 16>,
15 <1 17>,
16 <1 18>,
17 <1 19>,
18 <1 20>,
19 <1 21>,
20 <1 22>,
21 <1 23>,
22 <1 24>,
23 <1 25>,
24 <1 26>,
25 /* dma ch
26 <1 27>,
27 <1 27>,
28 <1 27>,
29 <1 27>,
30 /* unused
31 <1 28>;
32 interrupt-names = "dma
33 "dma
34 "dma
35 "dma
36 "dma
37 "dma
38 "dma
39 "dma
40 "dma
41 "dma
42 "dma
43 "dma
44 "dma
45 "dma
46 "dma
47 "dma
48 #dma-cells = <1>;
49 brcm,dma-channel-mask
50 };
51
52 intc: interrupt-controller@7e0
53 compatible = "brcm,bcm
54 reg = <0x7e00b200 0x20
55 interrupt-controller;
56 #interrupt-cells = <2>
57 };
58
59 pm: watchdog@7e100000 {
60 compatible = "brcm,bcm
61 #power-domain-cells =
62 #reset-cells = <1>;
63 reg = <0x7e100000 0x11
64 <0x7e00a000 0x24
65 reg-names = "pm", "asb
66 clocks = <&clocks BCM2
67 <&clocks BCM2
68 <&clocks BCM2
69 <&clocks BCM2
70 clock-names = "v3d", "
71 system-power-controlle
72 };
73
74 rng@7e104000 {
75 compatible = "brcm,bcm
76 reg = <0x7e104000 0x10
77 interrupts = <2 29>;
78 };
79
80 pixelvalve@7e206000 {
81 compatible = "brcm,bcm
82 reg = <0x7e206000 0x10
83 interrupts = <2 13>; /
84 };
85
86 pixelvalve@7e207000 {
87 compatible = "brcm,bcm
88 reg = <0x7e207000 0x10
89 interrupts = <2 14>; /
90 };
91
92 thermal: thermal@7e212000 {
93 compatible = "brcm,bcm
94 reg = <0x7e212000 0x8>
95 clocks = <&clocks BCM2
96 #thermal-sensor-cells
97 status = "disabled";
98 };
99
100 i2c2: i2c@7e805000 {
101 compatible = "brcm,bcm
102 reg = <0x7e805000 0x10
103 interrupts = <2 21>;
104 clocks = <&clocks BCM2
105 #address-cells = <1>;
106 #size-cells = <0>;
107 status = "okay";
108 };
109
110 vec: vec@7e806000 {
111 compatible = "brcm,bcm
112 reg = <0x7e806000 0x10
113 clocks = <&clocks BCM2
114 interrupts = <2 27>;
115 status = "disabled";
116 };
117
118 pixelvalve@7e807000 {
119 compatible = "brcm,bcm
120 reg = <0x7e807000 0x10
121 interrupts = <2 10>; /
122 };
123
124 hdmi: hdmi@7e902000 {
125 compatible = "brcm,bcm
126 reg = <0x7e902000 0x60
127 <0x7e808000 0x10
128 interrupts = <2 8>, <2
129 ddc = <&i2c2>;
130 clocks = <&clocks BCM2
131 <&clocks BCM2
132 clock-names = "pixel",
133 dmas = <&dma 17>;
134 dma-names = "audio-rx"
135 status = "disabled";
136 };
137
138 v3d: v3d@7ec00000 {
139 compatible = "brcm,bcm
140 reg = <0x7ec00000 0x10
141 interrupts = <1 10>;
142 };
143
144 vc4: gpu {
145 compatible = "brcm,bcm
146 };
147 };
148 };
149
150 &cpu_thermal {
151 thermal-sensors = <&thermal>;
152 };
153
154 &gpio {
155 i2c_slave_gpio18: i2c-slave-gpio18 {
156 brcm,pins = <18 19 20 21>;
157 brcm,function = <BCM2835_FSEL_
158 };
159
160 jtag_gpio4: jtag-gpio4 {
161 brcm,pins = <4 5 6 12 13>;
162 brcm,function = <BCM2835_FSEL_
163 };
164
165 pwm0_gpio12: pwm0-gpio12 {
166 brcm,pins = <12>;
167 brcm,function = <BCM2835_FSEL_
168 };
169 pwm0_gpio18: pwm0-gpio18 {
170 brcm,pins = <18>;
171 brcm,function = <BCM2835_FSEL_
172 };
173 pwm0_gpio40: pwm0-gpio40 {
174 brcm,pins = <40>;
175 brcm,function = <BCM2835_FSEL_
176 };
177 pwm1_gpio13: pwm1-gpio13 {
178 brcm,pins = <13>;
179 brcm,function = <BCM2835_FSEL_
180 };
181 pwm1_gpio19: pwm1-gpio19 {
182 brcm,pins = <19>;
183 brcm,function = <BCM2835_FSEL_
184 };
185 pwm1_gpio41: pwm1-gpio41 {
186 brcm,pins = <41>;
187 brcm,function = <BCM2835_FSEL_
188 };
189 pwm1_gpio45: pwm1-gpio45 {
190 brcm,pins = <45>;
191 brcm,function = <BCM2835_FSEL_
192 };
193 };
194
195 &i2s {
196 dmas = <&dma 2>, <&dma 3>;
197 dma-names = "tx", "rx";
198 };
199
200 &sdhost {
201 dmas = <&dma 13>;
202 dma-names = "rx-tx";
203 };
204
205 &spi {
206 dmas = <&dma 6>, <&dma 7>;
207 dma-names = "tx", "rx";
208 };
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