1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 2
3 /* This include file covers the common periphe 3 /* This include file covers the common peripherals and configuration between
4 * bcm2835, bcm2836 and bcm2837 implementation 4 * bcm2835, bcm2836 and bcm2837 implementations.
5 */ 5 */
6 6
7 / { 7 / {
8 interrupt-parent = <&intc>; 8 interrupt-parent = <&intc>;
9 9
10 soc { 10 soc {
11 dma: dma-controller@7e007000 { 11 dma: dma-controller@7e007000 {
12 compatible = "brcm,bcm 12 compatible = "brcm,bcm2835-dma";
13 reg = <0x7e007000 0xf0 13 reg = <0x7e007000 0xf00>;
14 interrupts = <1 16>, 14 interrupts = <1 16>,
15 <1 17>, 15 <1 17>,
16 <1 18>, 16 <1 18>,
17 <1 19>, 17 <1 19>,
18 <1 20>, 18 <1 20>,
19 <1 21>, 19 <1 21>,
20 <1 22>, 20 <1 22>,
21 <1 23>, 21 <1 23>,
22 <1 24>, 22 <1 24>,
23 <1 25>, 23 <1 25>,
24 <1 26>, 24 <1 26>,
25 /* dma ch 25 /* dma channel 11-14 share one irq */
26 <1 27>, 26 <1 27>,
27 <1 27>, 27 <1 27>,
28 <1 27>, 28 <1 27>,
29 <1 27>, 29 <1 27>,
30 /* unused 30 /* unused shared irq for all channels */
31 <1 28>; 31 <1 28>;
32 interrupt-names = "dma 32 interrupt-names = "dma0",
33 "dma 33 "dma1",
34 "dma 34 "dma2",
35 "dma 35 "dma3",
36 "dma 36 "dma4",
37 "dma 37 "dma5",
38 "dma 38 "dma6",
39 "dma 39 "dma7",
40 "dma 40 "dma8",
41 "dma 41 "dma9",
42 "dma 42 "dma10",
43 "dma 43 "dma11",
44 "dma 44 "dma12",
45 "dma 45 "dma13",
46 "dma 46 "dma14",
47 "dma 47 "dma-shared-all";
48 #dma-cells = <1>; 48 #dma-cells = <1>;
49 brcm,dma-channel-mask 49 brcm,dma-channel-mask = <0x7f35>;
50 }; 50 };
51 51
52 intc: interrupt-controller@7e0 52 intc: interrupt-controller@7e00b200 {
53 compatible = "brcm,bcm 53 compatible = "brcm,bcm2835-armctrl-ic";
54 reg = <0x7e00b200 0x20 54 reg = <0x7e00b200 0x200>;
55 interrupt-controller; 55 interrupt-controller;
56 #interrupt-cells = <2> 56 #interrupt-cells = <2>;
57 }; 57 };
58 58
59 pm: watchdog@7e100000 { 59 pm: watchdog@7e100000 {
60 compatible = "brcm,bcm 60 compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
61 #power-domain-cells = 61 #power-domain-cells = <1>;
62 #reset-cells = <1>; 62 #reset-cells = <1>;
63 reg = <0x7e100000 0x11 63 reg = <0x7e100000 0x114>,
64 <0x7e00a000 0x24 64 <0x7e00a000 0x24>;
65 reg-names = "pm", "asb 65 reg-names = "pm", "asb";
66 clocks = <&clocks BCM2 66 clocks = <&clocks BCM2835_CLOCK_V3D>,
67 <&clocks BCM2 67 <&clocks BCM2835_CLOCK_PERI_IMAGE>,
68 <&clocks BCM2 68 <&clocks BCM2835_CLOCK_H264>,
69 <&clocks BCM2 69 <&clocks BCM2835_CLOCK_ISP>;
70 clock-names = "v3d", " 70 clock-names = "v3d", "peri_image", "h264", "isp";
71 system-power-controlle 71 system-power-controller;
72 }; 72 };
73 73
74 rng@7e104000 { 74 rng@7e104000 {
75 compatible = "brcm,bcm 75 compatible = "brcm,bcm2835-rng";
76 reg = <0x7e104000 0x10 76 reg = <0x7e104000 0x10>;
77 interrupts = <2 29>; 77 interrupts = <2 29>;
78 }; 78 };
79 79
80 pixelvalve@7e206000 { 80 pixelvalve@7e206000 {
81 compatible = "brcm,bcm 81 compatible = "brcm,bcm2835-pixelvalve0";
82 reg = <0x7e206000 0x10 82 reg = <0x7e206000 0x100>;
83 interrupts = <2 13>; / 83 interrupts = <2 13>; /* pwa0 */
84 }; 84 };
85 85
86 pixelvalve@7e207000 { 86 pixelvalve@7e207000 {
87 compatible = "brcm,bcm 87 compatible = "brcm,bcm2835-pixelvalve1";
88 reg = <0x7e207000 0x10 88 reg = <0x7e207000 0x100>;
89 interrupts = <2 14>; / 89 interrupts = <2 14>; /* pwa1 */
90 }; 90 };
91 91
92 thermal: thermal@7e212000 { 92 thermal: thermal@7e212000 {
93 compatible = "brcm,bcm 93 compatible = "brcm,bcm2835-thermal";
94 reg = <0x7e212000 0x8> 94 reg = <0x7e212000 0x8>;
95 clocks = <&clocks BCM2 95 clocks = <&clocks BCM2835_CLOCK_TSENS>;
96 #thermal-sensor-cells 96 #thermal-sensor-cells = <0>;
97 status = "disabled"; 97 status = "disabled";
98 }; 98 };
99 99
100 i2c2: i2c@7e805000 { 100 i2c2: i2c@7e805000 {
101 compatible = "brcm,bcm 101 compatible = "brcm,bcm2835-i2c";
102 reg = <0x7e805000 0x10 102 reg = <0x7e805000 0x1000>;
103 interrupts = <2 21>; 103 interrupts = <2 21>;
104 clocks = <&clocks BCM2 104 clocks = <&clocks BCM2835_CLOCK_VPU>;
105 #address-cells = <1>; 105 #address-cells = <1>;
106 #size-cells = <0>; 106 #size-cells = <0>;
107 status = "okay"; 107 status = "okay";
108 }; 108 };
109 109
110 vec: vec@7e806000 { 110 vec: vec@7e806000 {
111 compatible = "brcm,bcm 111 compatible = "brcm,bcm2835-vec";
112 reg = <0x7e806000 0x10 112 reg = <0x7e806000 0x1000>;
113 clocks = <&clocks BCM2 113 clocks = <&clocks BCM2835_CLOCK_VEC>;
114 interrupts = <2 27>; 114 interrupts = <2 27>;
115 status = "disabled"; 115 status = "disabled";
116 }; 116 };
117 117
118 pixelvalve@7e807000 { 118 pixelvalve@7e807000 {
119 compatible = "brcm,bcm 119 compatible = "brcm,bcm2835-pixelvalve2";
120 reg = <0x7e807000 0x10 120 reg = <0x7e807000 0x100>;
121 interrupts = <2 10>; / 121 interrupts = <2 10>; /* pixelvalve */
122 }; 122 };
123 123
124 hdmi: hdmi@7e902000 { 124 hdmi: hdmi@7e902000 {
125 compatible = "brcm,bcm 125 compatible = "brcm,bcm2835-hdmi";
126 reg = <0x7e902000 0x60 126 reg = <0x7e902000 0x600>,
127 <0x7e808000 0x10 127 <0x7e808000 0x100>;
128 interrupts = <2 8>, <2 128 interrupts = <2 8>, <2 9>;
129 ddc = <&i2c2>; 129 ddc = <&i2c2>;
130 clocks = <&clocks BCM2 130 clocks = <&clocks BCM2835_PLLH_PIX>,
131 <&clocks BCM2 131 <&clocks BCM2835_CLOCK_HSM>;
132 clock-names = "pixel", 132 clock-names = "pixel", "hdmi";
133 dmas = <&dma 17>; 133 dmas = <&dma 17>;
134 dma-names = "audio-rx" 134 dma-names = "audio-rx";
135 status = "disabled"; 135 status = "disabled";
136 }; 136 };
137 137
138 v3d: v3d@7ec00000 { 138 v3d: v3d@7ec00000 {
139 compatible = "brcm,bcm 139 compatible = "brcm,bcm2835-v3d";
140 reg = <0x7ec00000 0x10 140 reg = <0x7ec00000 0x1000>;
141 interrupts = <1 10>; 141 interrupts = <1 10>;
142 }; 142 };
143 143
144 vc4: gpu { 144 vc4: gpu {
145 compatible = "brcm,bcm 145 compatible = "brcm,bcm2835-vc4";
146 }; 146 };
147 }; 147 };
148 }; 148 };
149 149
150 &cpu_thermal { 150 &cpu_thermal {
151 thermal-sensors = <&thermal>; 151 thermal-sensors = <&thermal>;
152 }; 152 };
153 153
154 &gpio { 154 &gpio {
155 i2c_slave_gpio18: i2c-slave-gpio18 { 155 i2c_slave_gpio18: i2c-slave-gpio18 {
156 brcm,pins = <18 19 20 21>; 156 brcm,pins = <18 19 20 21>;
157 brcm,function = <BCM2835_FSEL_ 157 brcm,function = <BCM2835_FSEL_ALT3>;
158 }; 158 };
159 159
160 jtag_gpio4: jtag-gpio4 { 160 jtag_gpio4: jtag-gpio4 {
161 brcm,pins = <4 5 6 12 13>; 161 brcm,pins = <4 5 6 12 13>;
162 brcm,function = <BCM2835_FSEL_ 162 brcm,function = <BCM2835_FSEL_ALT5>;
163 }; 163 };
164 164
165 pwm0_gpio12: pwm0-gpio12 { 165 pwm0_gpio12: pwm0-gpio12 {
166 brcm,pins = <12>; 166 brcm,pins = <12>;
167 brcm,function = <BCM2835_FSEL_ 167 brcm,function = <BCM2835_FSEL_ALT0>;
168 }; 168 };
169 pwm0_gpio18: pwm0-gpio18 { 169 pwm0_gpio18: pwm0-gpio18 {
170 brcm,pins = <18>; 170 brcm,pins = <18>;
171 brcm,function = <BCM2835_FSEL_ 171 brcm,function = <BCM2835_FSEL_ALT5>;
172 }; 172 };
173 pwm0_gpio40: pwm0-gpio40 { 173 pwm0_gpio40: pwm0-gpio40 {
174 brcm,pins = <40>; 174 brcm,pins = <40>;
175 brcm,function = <BCM2835_FSEL_ 175 brcm,function = <BCM2835_FSEL_ALT0>;
176 }; 176 };
177 pwm1_gpio13: pwm1-gpio13 { 177 pwm1_gpio13: pwm1-gpio13 {
178 brcm,pins = <13>; 178 brcm,pins = <13>;
179 brcm,function = <BCM2835_FSEL_ 179 brcm,function = <BCM2835_FSEL_ALT0>;
180 }; 180 };
181 pwm1_gpio19: pwm1-gpio19 { 181 pwm1_gpio19: pwm1-gpio19 {
182 brcm,pins = <19>; 182 brcm,pins = <19>;
183 brcm,function = <BCM2835_FSEL_ 183 brcm,function = <BCM2835_FSEL_ALT5>;
184 }; 184 };
185 pwm1_gpio41: pwm1-gpio41 { 185 pwm1_gpio41: pwm1-gpio41 {
186 brcm,pins = <41>; 186 brcm,pins = <41>;
187 brcm,function = <BCM2835_FSEL_ 187 brcm,function = <BCM2835_FSEL_ALT0>;
188 }; 188 };
189 pwm1_gpio45: pwm1-gpio45 { 189 pwm1_gpio45: pwm1-gpio45 {
190 brcm,pins = <45>; 190 brcm,pins = <45>;
191 brcm,function = <BCM2835_FSEL_ 191 brcm,function = <BCM2835_FSEL_ALT0>;
192 }; 192 };
193 }; 193 };
194 194
195 &i2s { 195 &i2s {
196 dmas = <&dma 2>, <&dma 3>; 196 dmas = <&dma 2>, <&dma 3>;
197 dma-names = "tx", "rx"; 197 dma-names = "tx", "rx";
198 }; 198 };
199 199
200 &sdhost { 200 &sdhost {
201 dmas = <&dma 13>; 201 dmas = <&dma 13>;
202 dma-names = "rx-tx"; 202 dma-names = "rx-tx";
203 }; 203 };
204 204
205 &spi { 205 &spi {
206 dmas = <&dma 6>, <&dma 7>; 206 dmas = <&dma 6>, <&dma 7>;
207 dma-names = "tx", "rx"; 207 dma-names = "tx", "rx";
208 }; 208 };
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