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Linux/scripts/dtc/include-prefixes/arm/broadcom/bcm2837.dtsi

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm/broadcom/bcm2837.dtsi (Version linux-6.12-rc7) and /scripts/dtc/include-prefixes/arm/broadcom/bcm2837.dtsi (Version linux-2.6.0)


  1 #include "bcm283x.dtsi"                           
  2 #include "bcm2835-common.dtsi"                    
  3                                                   
  4 / {                                               
  5         compatible = "brcm,bcm2837";              
  6                                                   
  7         soc {                                     
  8                 ranges = <0x7e000000 0x3f00000    
  9                          <0x40000000 0x4000000    
 10                 dma-ranges = <0xc0000000 0x000    
 11                                                   
 12                 local_intc: interrupt-controll    
 13                         compatible = "brcm,bcm    
 14                         reg = <0x40000000 0x10    
 15                         interrupt-controller;     
 16                         #interrupt-cells = <2>    
 17                         interrupt-parent = <&l    
 18                 };                                
 19         };                                        
 20                                                   
 21         arm-pmu {                                 
 22                 compatible = "arm,cortex-a53-p    
 23                 interrupt-parent = <&local_int    
 24                 interrupts = <9 IRQ_TYPE_LEVEL    
 25         };                                        
 26                                                   
 27         timer {                                   
 28                 compatible = "arm,armv7-timer"    
 29                 interrupt-parent = <&local_int    
 30                 interrupts = <0 IRQ_TYPE_LEVEL    
 31                              <1 IRQ_TYPE_LEVEL    
 32                              <3 IRQ_TYPE_LEVEL    
 33                              <2 IRQ_TYPE_LEVEL    
 34                 always-on;                        
 35         };                                        
 36                                                   
 37         cpus: cpus {                              
 38                 #address-cells = <1>;             
 39                 #size-cells = <0>;                
 40                 enable-method = "brcm,bcm2836-    
 41                                                   
 42                 /* Source for d/i-cache-line-s    
 43                  * https://developer.arm.com/d    
 44                  * /about-the-l1-memory-system    
 45                  *                                
 46                  * Source for d/i-cache-size      
 47                  * https://magpi.raspberrypi.c    
 48                  */                               
 49                 cpu0: cpu@0 {                     
 50                         device_type = "cpu";      
 51                         compatible = "arm,cort    
 52                         reg = <0>;                
 53                         enable-method = "spin-    
 54                         cpu-release-addr = <0x    
 55                         d-cache-size = <0x8000    
 56                         d-cache-line-size = <6    
 57                         d-cache-sets = <128>;     
 58                         i-cache-size = <0x8000    
 59                         i-cache-line-size = <6    
 60                         i-cache-sets = <256>;     
 61                         next-level-cache = <&l    
 62                 };                                
 63                                                   
 64                 cpu1: cpu@1 {                     
 65                         device_type = "cpu";      
 66                         compatible = "arm,cort    
 67                         reg = <1>;                
 68                         enable-method = "spin-    
 69                         cpu-release-addr = <0x    
 70                         d-cache-size = <0x8000    
 71                         d-cache-line-size = <6    
 72                         d-cache-sets = <128>;     
 73                         i-cache-size = <0x8000    
 74                         i-cache-line-size = <6    
 75                         i-cache-sets = <256>;     
 76                         next-level-cache = <&l    
 77                 };                                
 78                                                   
 79                 cpu2: cpu@2 {                     
 80                         device_type = "cpu";      
 81                         compatible = "arm,cort    
 82                         reg = <2>;                
 83                         enable-method = "spin-    
 84                         cpu-release-addr = <0x    
 85                         d-cache-size = <0x8000    
 86                         d-cache-line-size = <6    
 87                         d-cache-sets = <128>;     
 88                         i-cache-size = <0x8000    
 89                         i-cache-line-size = <6    
 90                         i-cache-sets = <256>;     
 91                         next-level-cache = <&l    
 92                 };                                
 93                                                   
 94                 cpu3: cpu@3 {                     
 95                         device_type = "cpu";      
 96                         compatible = "arm,cort    
 97                         reg = <3>;                
 98                         enable-method = "spin-    
 99                         cpu-release-addr = <0x    
100                         d-cache-size = <0x8000    
101                         d-cache-line-size = <6    
102                         d-cache-sets = <128>;     
103                         i-cache-size = <0x8000    
104                         i-cache-line-size = <6    
105                         i-cache-sets = <256>;     
106                         next-level-cache = <&l    
107                 };                                
108                                                   
109                 /* Source for cache-line-size     
110                  * https://developer.arm.com/d    
111                  * /e/level-2-memory-system/ab    
112                  * Source for cache-size          
113                  * https://datasheets.raspberr    
114                  */                               
115                 l2: l2-cache0 {                   
116                         compatible = "cache";     
117                         cache-unified;            
118                         cache-size = <0x80000>    
119                         cache-line-size = <64>    
120                         cache-sets = <512>; //    
121                         cache-level = <2>;        
122                 };                                
123         };                                        
124 };                                                
125                                                   
126 /* Make the BCM2835-style global interrupt con    
127  * CPU-local interrupt controller.                
128  */                                               
129 &intc {                                           
130         compatible = "brcm,bcm2836-armctrl-ic"    
131         reg = <0x7e00b200 0x200>;                 
132         interrupt-parent = <&local_intc>;         
133         interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;     
134 };                                                
135                                                   
136 &cpu_thermal {                                    
137         coefficients = <(-538)  412000>;          
138 };                                                
139                                                   
140 /* enable thermal sensor with the correct comp    
141 &thermal {                                        
142         compatible = "brcm,bcm2837-thermal";      
143         status = "okay";                          
144 };                                                
                                                      

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