1 // SPDX-License-Identifier: GPL-2.0-only 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* 2 /*
3 * Copyright (C) 2012-2013 Linaro Ltd. 3 * Copyright (C) 2012-2013 Linaro Ltd.
4 * Author: Haojian Zhuang <haojian.zhuang@lina 4 * Author: Haojian Zhuang <haojian.zhuang@linaro.org>
5 */ 5 */
6 6
7 /dts-v1/; 7 /dts-v1/;
8 8
9 #include "hi3620.dtsi" 9 #include "hi3620.dtsi"
10 10
11 / { 11 / {
12 model = "Hisilicon Hi4511 Development 12 model = "Hisilicon Hi4511 Development Board";
13 compatible = "hisilicon,hi3620-hi4511" 13 compatible = "hisilicon,hi3620-hi4511";
14 14
15 chosen { 15 chosen {
16 bootargs = "root=/dev/ram0"; 16 bootargs = "root=/dev/ram0";
17 stdout-path = "serial0:115200n 17 stdout-path = "serial0:115200n8";
18 }; 18 };
19 19
20 memory@40000000 { 20 memory@40000000 {
21 device_type = "memory"; 21 device_type = "memory";
22 reg = <0x40000000 0x20000000>; 22 reg = <0x40000000 0x20000000>;
23 }; 23 };
24 24
25 amba-bus { 25 amba-bus {
26 dual_timer0: dual_timer@800000 26 dual_timer0: dual_timer@800000 {
27 status = "okay"; 27 status = "okay";
28 }; 28 };
29 29
30 uart0: serial@b00000 { /* con 30 uart0: serial@b00000 { /* console */
31 pinctrl-names = "defau 31 pinctrl-names = "default", "sleep";
32 pinctrl-0 = <&uart0_pm 32 pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
33 pinctrl-1 = <&uart0_pm 33 pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>;
34 status = "okay"; 34 status = "okay";
35 }; 35 };
36 36
37 uart1: serial@b01000 { /* mode 37 uart1: serial@b01000 { /* modem */
38 pinctrl-names = "defau 38 pinctrl-names = "default", "sleep";
39 pinctrl-0 = <&uart1_pm 39 pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>;
40 pinctrl-1 = <&uart1_pm 40 pinctrl-1 = <&uart1_pmx_idle &uart1_cfg_idle>;
41 status = "okay"; 41 status = "okay";
42 }; 42 };
43 43
44 uart2: serial@b02000 { /* audi 44 uart2: serial@b02000 { /* audience */
45 pinctrl-names = "defau 45 pinctrl-names = "default", "sleep";
46 pinctrl-0 = <&uart2_pm 46 pinctrl-0 = <&uart2_pmx_func &uart2_cfg_func>;
47 pinctrl-1 = <&uart2_pm 47 pinctrl-1 = <&uart2_pmx_idle &uart2_cfg_idle>;
48 status = "okay"; 48 status = "okay";
49 }; 49 };
50 50
51 uart3: serial@b03000 { 51 uart3: serial@b03000 {
52 pinctrl-names = "defau 52 pinctrl-names = "default", "sleep";
53 pinctrl-0 = <&uart3_pm 53 pinctrl-0 = <&uart3_pmx_func &uart3_cfg_func>;
54 pinctrl-1 = <&uart3_pm 54 pinctrl-1 = <&uart3_pmx_idle &uart3_cfg_idle>;
55 status = "okay"; 55 status = "okay";
56 }; 56 };
57 57
58 uart4: serial@b04000 { 58 uart4: serial@b04000 {
59 pinctrl-names = "defau 59 pinctrl-names = "default", "sleep";
60 pinctrl-0 = <&uart4_pm 60 pinctrl-0 = <&uart4_pmx_func &uart4_cfg_func>;
61 pinctrl-1 = <&uart4_pm 61 pinctrl-1 = <&uart4_pmx_idle &uart4_cfg_func>;
62 status = "okay"; 62 status = "okay";
63 }; 63 };
64 64
65 pmx0: pinmux@803000 { 65 pmx0: pinmux@803000 {
66 pinctrl-names = "defau 66 pinctrl-names = "default";
67 pinctrl-0 = <&board_pm 67 pinctrl-0 = <&board_pmx_pins>;
68 68
69 board_pmx_pins: board- 69 board_pmx_pins: board-pins {
70 pinctrl-single 70 pinctrl-single,pins = <
71 0x008 71 0x008 0x0 /* GPIO -- eFUSE_DOUT */
72 0x100 72 0x100 0x0 /* USIM_CLK & USIM_DATA (IOMG63) */
73 >; 73 >;
74 }; 74 };
75 uart0_pmx_func: uart0- 75 uart0_pmx_func: uart0-pins {
76 pinctrl-single 76 pinctrl-single,pins = <
77 0x0f0 77 0x0f0 0x0
78 0x0f4 78 0x0f4 0x0 /* UART0_RX & UART0_TX */
79 >; 79 >;
80 }; 80 };
81 uart0_pmx_idle: uart0- 81 uart0_pmx_idle: uart0-idle-pins {
82 pinctrl-single 82 pinctrl-single,pins = <
83 /*0x0f 83 /*0x0f0 0x1*/ /* UART0_CTS & UART0_RTS */
84 0x0f4 84 0x0f4 0x1 /* UART0_RX & UART0_TX */
85 >; 85 >;
86 }; 86 };
87 uart1_pmx_func: uart1- 87 uart1_pmx_func: uart1-pins {
88 pinctrl-single 88 pinctrl-single,pins = <
89 0x0f8 89 0x0f8 0x0 /* UART1_CTS & UART1_RTS (IOMG61) */
90 0x0fc 90 0x0fc 0x0 /* UART1_RX & UART1_TX (IOMG62) */
91 >; 91 >;
92 }; 92 };
93 uart1_pmx_idle: uart1- 93 uart1_pmx_idle: uart1-idle-pins {
94 pinctrl-single 94 pinctrl-single,pins = <
95 0x0f8 95 0x0f8 0x1 /* GPIO (IOMG61) */
96 0x0fc 96 0x0fc 0x1 /* GPIO (IOMG62) */
97 >; 97 >;
98 }; 98 };
99 uart2_pmx_func: uart2- 99 uart2_pmx_func: uart2-pins {
100 pinctrl-single 100 pinctrl-single,pins = <
101 0x104 101 0x104 0x2 /* UART2_RXD (IOMG96) */
102 0x108 102 0x108 0x2 /* UART2_TXD (IOMG64) */
103 >; 103 >;
104 }; 104 };
105 uart2_pmx_idle: uart2- 105 uart2_pmx_idle: uart2-idle-pins {
106 pinctrl-single 106 pinctrl-single,pins = <
107 0x104 107 0x104 0x1 /* GPIO (IOMG96) */
108 0x108 108 0x108 0x1 /* GPIO (IOMG64) */
109 >; 109 >;
110 }; 110 };
111 uart3_pmx_func: uart3- 111 uart3_pmx_func: uart3-pins {
112 pinctrl-single 112 pinctrl-single,pins = <
113 0x160 113 0x160 0x2 /* UART3_CTS & UART3_RTS (IOMG85) */
114 0x164 114 0x164 0x2 /* UART3_RXD & UART3_TXD (IOMG86) */
115 >; 115 >;
116 }; 116 };
117 uart3_pmx_idle: uart3- 117 uart3_pmx_idle: uart3-idle-pins {
118 pinctrl-single 118 pinctrl-single,pins = <
119 0x160 119 0x160 0x1 /* GPIO (IOMG85) */
120 0x164 120 0x164 0x1 /* GPIO (IOMG86) */
121 >; 121 >;
122 }; 122 };
123 uart4_pmx_func: uart4- 123 uart4_pmx_func: uart4-pins {
124 pinctrl-single 124 pinctrl-single,pins = <
125 0x168 125 0x168 0x0 /* UART4_CTS & UART4_RTS (IOMG87) */
126 0x16c 126 0x16c 0x0 /* UART4_RXD (IOMG88) */
127 0x170 127 0x170 0x0 /* UART4_TXD (IOMG93) */
128 >; 128 >;
129 }; 129 };
130 uart4_pmx_idle: uart4- 130 uart4_pmx_idle: uart4-idle-pins {
131 pinctrl-single 131 pinctrl-single,pins = <
132 0x168 132 0x168 0x1 /* GPIO (IOMG87) */
133 0x16c 133 0x16c 0x1 /* GPIO (IOMG88) */
134 0x170 134 0x170 0x1 /* GPIO (IOMG93) */
135 >; 135 >;
136 }; 136 };
137 i2c0_pmx_func: i2c0-pi 137 i2c0_pmx_func: i2c0-pins {
138 pinctrl-single 138 pinctrl-single,pins = <
139 0x0b4 139 0x0b4 0x0 /* I2C0_SCL & I2C0_SDA (IOMG45) */
140 >; 140 >;
141 }; 141 };
142 i2c0_pmx_idle: i2c0-id 142 i2c0_pmx_idle: i2c0-idle-pins {
143 pinctrl-single 143 pinctrl-single,pins = <
144 0x0b4 144 0x0b4 0x1 /* GPIO (IOMG45) */
145 >; 145 >;
146 }; 146 };
147 i2c1_pmx_func: i2c1-pi 147 i2c1_pmx_func: i2c1-pins {
148 pinctrl-single 148 pinctrl-single,pins = <
149 0x0b8 149 0x0b8 0x0 /* I2C1_SCL & I2C1_SDA (IOMG46) */
150 >; 150 >;
151 }; 151 };
152 i2c1_pmx_idle: i2c1-id 152 i2c1_pmx_idle: i2c1-idle-pins {
153 pinctrl-single 153 pinctrl-single,pins = <
154 0x0b8 154 0x0b8 0x1 /* GPIO (IOMG46) */
155 >; 155 >;
156 }; 156 };
157 i2c2_pmx_func: i2c2-pi 157 i2c2_pmx_func: i2c2-pins {
158 pinctrl-single 158 pinctrl-single,pins = <
159 0x068 159 0x068 0x0 /* I2C2_SCL (IOMG26) */
160 0x06c 160 0x06c 0x0 /* I2C2_SDA (IOMG27) */
161 >; 161 >;
162 }; 162 };
163 i2c2_pmx_idle: i2c2-id 163 i2c2_pmx_idle: i2c2-idle-pins {
164 pinctrl-single 164 pinctrl-single,pins = <
165 0x068 165 0x068 0x1 /* GPIO (IOMG26) */
166 0x06c 166 0x06c 0x1 /* GPIO (IOMG27) */
167 >; 167 >;
168 }; 168 };
169 i2c3_pmx_func: i2c3-pi 169 i2c3_pmx_func: i2c3-pins {
170 pinctrl-single 170 pinctrl-single,pins = <
171 0x050 171 0x050 0x2 /* I2C3_SCL (IOMG20) */
172 0x054 172 0x054 0x2 /* I2C3_SDA (IOMG21) */
173 >; 173 >;
174 }; 174 };
175 i2c3_pmx_idle: i2c3-id 175 i2c3_pmx_idle: i2c3-idle-pins {
176 pinctrl-single 176 pinctrl-single,pins = <
177 0x050 177 0x050 0x1 /* GPIO (IOMG20) */
178 0x054 178 0x054 0x1 /* GPIO (IOMG21) */
179 >; 179 >;
180 }; 180 };
181 spi0_pmx_func: spi0-pi 181 spi0_pmx_func: spi0-pins {
182 pinctrl-single 182 pinctrl-single,pins = <
183 0x0d4 183 0x0d4 0x0 /* SPI0_CLK/SPI0_DI/SPI0_DO (IOMG53) */
184 0x0d8 184 0x0d8 0x0 /* SPI0_CS0 (IOMG54) */
185 0x0dc 185 0x0dc 0x0 /* SPI0_CS1 (IOMG55) */
186 0x0e0 186 0x0e0 0x0 /* SPI0_CS2 (IOMG56) */
187 0x0e4 187 0x0e4 0x0 /* SPI0_CS3 (IOMG57) */
188 >; 188 >;
189 }; 189 };
190 spi0_pmx_idle: spi0-id 190 spi0_pmx_idle: spi0-idle-pins {
191 pinctrl-single 191 pinctrl-single,pins = <
192 0x0d4 192 0x0d4 0x1 /* GPIO (IOMG53) */
193 0x0d8 193 0x0d8 0x1 /* GPIO (IOMG54) */
194 0x0dc 194 0x0dc 0x1 /* GPIO (IOMG55) */
195 0x0e0 195 0x0e0 0x1 /* GPIO (IOMG56) */
196 0x0e4 196 0x0e4 0x1 /* GPIO (IOMG57) */
197 >; 197 >;
198 }; 198 };
199 spi1_pmx_func: spi1-pi 199 spi1_pmx_func: spi1-pins {
200 pinctrl-single 200 pinctrl-single,pins = <
201 0x184 201 0x184 0x0 /* SPI1_CLK/SPI1_DI (IOMG98) */
202 0x0e8 202 0x0e8 0x0 /* SPI1_DO (IOMG58) */
203 0x0ec 203 0x0ec 0x0 /* SPI1_CS (IOMG95) */
204 >; 204 >;
205 }; 205 };
206 spi1_pmx_idle: spi1-id 206 spi1_pmx_idle: spi1-idle-pins {
207 pinctrl-single 207 pinctrl-single,pins = <
208 0x184 208 0x184 0x1 /* GPIO (IOMG98) */
209 0x0e8 209 0x0e8 0x1 /* GPIO (IOMG58) */
210 0x0ec 210 0x0ec 0x1 /* GPIO (IOMG95) */
211 >; 211 >;
212 }; 212 };
213 kpc_pmx_func: kpc-pins 213 kpc_pmx_func: kpc-pins {
214 pinctrl-single 214 pinctrl-single,pins = <
215 0x12c 215 0x12c 0x0 /* KEY_IN0 (IOMG73) */
216 0x130 216 0x130 0x0 /* KEY_IN1 (IOMG74) */
217 0x134 217 0x134 0x0 /* KEY_IN2 (IOMG75) */
218 0x10c 218 0x10c 0x0 /* KEY_OUT0 (IOMG65) */
219 0x110 219 0x110 0x0 /* KEY_OUT1 (IOMG66) */
220 0x114 220 0x114 0x0 /* KEY_OUT2 (IOMG67) */
221 >; 221 >;
222 }; 222 };
223 kpc_pmx_idle: kpc-idle 223 kpc_pmx_idle: kpc-idle-pins {
224 pinctrl-single 224 pinctrl-single,pins = <
225 0x12c 225 0x12c 0x1 /* GPIO (IOMG73) */
226 0x130 226 0x130 0x1 /* GPIO (IOMG74) */
227 0x134 227 0x134 0x1 /* GPIO (IOMG75) */
228 0x10c 228 0x10c 0x1 /* GPIO (IOMG65) */
229 0x110 229 0x110 0x1 /* GPIO (IOMG66) */
230 0x114 230 0x114 0x1 /* GPIO (IOMG67) */
231 >; 231 >;
232 }; 232 };
233 gpio_key_func: gpio-ke 233 gpio_key_func: gpio-key-pins {
234 pinctrl-single 234 pinctrl-single,pins = <
235 0x10c 235 0x10c 0x1 /* KEY_OUT0/GPIO (IOMG65) */
236 0x130 236 0x130 0x1 /* KEY_IN1/GPIO (IOMG74) */
237 >; 237 >;
238 }; 238 };
239 emmc_pmx_func: emmc-pi 239 emmc_pmx_func: emmc-pins {
240 pinctrl-single 240 pinctrl-single,pins = <
241 0x030 241 0x030 0x2 /* eMMC_CMD/eMMC_CLK (IOMG12) */
242 0x018 242 0x018 0x0 /* NAND_CS3_N (IOMG6) */
243 0x024 243 0x024 0x0 /* NAND_BUSY2_N (IOMG8) */
244 0x028 244 0x028 0x0 /* NAND_BUSY3_N (IOMG9) */
245 0x02c 245 0x02c 0x2 /* eMMC_DATA[0:7] (IOMG10) */
246 >; 246 >;
247 }; 247 };
248 emmc_pmx_idle: emmc-id 248 emmc_pmx_idle: emmc-idle-pins {
249 pinctrl-single 249 pinctrl-single,pins = <
250 0x030 250 0x030 0x0 /* GPIO (IOMG12) */
251 0x018 251 0x018 0x1 /* GPIO (IOMG6) */
252 0x024 252 0x024 0x1 /* GPIO (IOMG8) */
253 0x028 253 0x028 0x1 /* GPIO (IOMG9) */
254 0x02c 254 0x02c 0x1 /* GPIO (IOMG10) */
255 >; 255 >;
256 }; 256 };
257 sd_pmx_func: sd-pins { 257 sd_pmx_func: sd-pins {
258 pinctrl-single 258 pinctrl-single,pins = <
259 0x0bc 259 0x0bc 0x0 /* SD_CLK/SD_CMD/SD_DATA0/SD_DATA1/SD_DATA2 (IOMG47) */
260 0x0c0 260 0x0c0 0x0 /* SD_DATA3 (IOMG48) */
261 >; 261 >;
262 }; 262 };
263 sd_pmx_idle: sd-idle-p 263 sd_pmx_idle: sd-idle-pins {
264 pinctrl-single 264 pinctrl-single,pins = <
265 0x0bc 265 0x0bc 0x1 /* GPIO (IOMG47) */
266 0x0c0 266 0x0c0 0x1 /* GPIO (IOMG48) */
267 >; 267 >;
268 }; 268 };
269 nand_pmx_func: nand-pi 269 nand_pmx_func: nand-pins {
270 pinctrl-single 270 pinctrl-single,pins = <
271 0x00c 271 0x00c 0x0 /* NAND_ALE/NAND_CLE/.../NAND_DATA[0:7] (IOMG3) */
272 0x010 272 0x010 0x0 /* NAND_CS1_N (IOMG4) */
273 0x014 273 0x014 0x0 /* NAND_CS2_N (IOMG5) */
274 0x018 274 0x018 0x0 /* NAND_CS3_N (IOMG6) */
275 0x01c 275 0x01c 0x0 /* NAND_BUSY0_N (IOMG94) */
276 0x020 276 0x020 0x0 /* NAND_BUSY1_N (IOMG7) */
277 0x024 277 0x024 0x0 /* NAND_BUSY2_N (IOMG8) */
278 0x028 278 0x028 0x0 /* NAND_BUSY3_N (IOMG9) */
279 0x02c 279 0x02c 0x0 /* NAND_DATA[8:15] (IOMG10) */
280 >; 280 >;
281 }; 281 };
282 nand_pmx_idle: nand-id 282 nand_pmx_idle: nand-idle-pins {
283 pinctrl-single 283 pinctrl-single,pins = <
284 0x00c 284 0x00c 0x1 /* GPIO (IOMG3) */
285 0x010 285 0x010 0x1 /* GPIO (IOMG4) */
286 0x014 286 0x014 0x1 /* GPIO (IOMG5) */
287 0x018 287 0x018 0x1 /* GPIO (IOMG6) */
288 0x01c 288 0x01c 0x1 /* GPIO (IOMG94) */
289 0x020 289 0x020 0x1 /* GPIO (IOMG7) */
290 0x024 290 0x024 0x1 /* GPIO (IOMG8) */
291 0x028 291 0x028 0x1 /* GPIO (IOMG9) */
292 0x02c 292 0x02c 0x1 /* GPIO (IOMG10) */
293 >; 293 >;
294 }; 294 };
295 sdio_pmx_func: sdio-pi 295 sdio_pmx_func: sdio-pins {
296 pinctrl-single 296 pinctrl-single,pins = <
297 0x0c4 297 0x0c4 0x0 /* SDIO_CLK/SDIO_CMD/SDIO_DATA[0:3] (IOMG49) */
298 >; 298 >;
299 }; 299 };
300 sdio_pmx_idle: sdio-id 300 sdio_pmx_idle: sdio-idle-pins {
301 pinctrl-single 301 pinctrl-single,pins = <
302 0x0c4 302 0x0c4 0x1 /* GPIO (IOMG49) */
303 >; 303 >;
304 }; 304 };
305 audio_out_pmx_func: au 305 audio_out_pmx_func: audio-out-pins {
306 pinctrl-single 306 pinctrl-single,pins = <
307 0x0f0 307 0x0f0 0x1 /* GPIO (IOMG59), audio spk & earphone */
308 >; 308 >;
309 }; 309 };
310 }; 310 };
311 311
312 pmx1: pinmux@803800 { 312 pmx1: pinmux@803800 {
313 pinctrl-names = "defau 313 pinctrl-names = "default";
314 pinctrl-0 = < &board 314 pinctrl-0 = < &board_pu_pins &board_pd_pins &board_pd_ps_pins
315 &board 315 &board_np_pins &board_ps_pins &kpc_cfg_func
316 &audio 316 &audio_out_cfg_func>;
317 board_pu_pins: board-p 317 board_pu_pins: board-pu-pins {
318 pinctrl-single 318 pinctrl-single,pins = <
319 0x014 319 0x014 0 /* GPIO_158 (IOCFG2) */
320 0x018 320 0x018 0 /* GPIO_159 (IOCFG3) */
321 0x01c 321 0x01c 0 /* BOOT_MODE0 (IOCFG4) */
322 0x020 322 0x020 0 /* BOOT_MODE1 (IOCFG5) */
323 >; 323 >;
324 pinctrl-single 324 pinctrl-single,bias-pulldown = <0 2 0 2>;
325 pinctrl-single 325 pinctrl-single,bias-pullup = <1 1 0 1>;
326 }; 326 };
327 board_pd_pins: board-p 327 board_pd_pins: board-pd-pins {
328 pinctrl-single 328 pinctrl-single,pins = <
329 0x038 329 0x038 0 /* eFUSE_DOUT (IOCFG11) */
330 0x150 330 0x150 0 /* ISP_GPIO8 (IOCFG93) */
331 0x154 331 0x154 0 /* ISP_GPIO9 (IOCFG94) */
332 >; 332 >;
333 pinctrl-single 333 pinctrl-single,bias-pulldown = <2 2 0 2>;
334 pinctrl-single 334 pinctrl-single,bias-pullup = <0 1 0 1>;
335 }; 335 };
336 board_pd_ps_pins: boar 336 board_pd_ps_pins: board-pd-ps-pins {
337 pinctrl-single 337 pinctrl-single,pins = <
338 0x2d8 338 0x2d8 0 /* CLK_OUT0 (IOCFG190) */
339 0x004 339 0x004 0 /* PMU_SPI_DATA (IOCFG192) */
340 >; 340 >;
341 pinctrl-single 341 pinctrl-single,bias-pulldown = <2 2 0 2>;
342 pinctrl-single 342 pinctrl-single,bias-pullup = <0 1 0 1>;
343 pinctrl-single 343 pinctrl-single,drive-strength = <0x30 0xf0>;
344 }; 344 };
345 board_np_pins: board-n 345 board_np_pins: board-np-pins {
346 pinctrl-single 346 pinctrl-single,pins = <
347 0x24c 347 0x24c 0 /* KEYPAD_OUT7 (IOCFG155) */
348 >; 348 >;
349 pinctrl-single 349 pinctrl-single,bias-pulldown = <0 2 0 2>;
350 pinctrl-single 350 pinctrl-single,bias-pullup = <0 1 0 1>;
351 }; 351 };
352 board_ps_pins: board-p 352 board_ps_pins: board-ps-pins {
353 pinctrl-single 353 pinctrl-single,pins = <
354 0x000 354 0x000 0 /* PMU_SPI_CLK (IOCFG191) */
355 0x008 355 0x008 0 /* PMU_SPI_CS_N (IOCFG193) */
356 >; 356 >;
357 pinctrl-single 357 pinctrl-single,drive-strength = <0x30 0xf0>;
358 }; 358 };
359 uart0_cfg_func: uart0- 359 uart0_cfg_func: uart0-cfg-pins {
360 pinctrl-single 360 pinctrl-single,pins = <
361 0x208 361 0x208 0 /* UART0_RXD (IOCFG138) */
362 0x20c 362 0x20c 0 /* UART0_TXD (IOCFG139) */
363 >; 363 >;
364 pinctrl-single 364 pinctrl-single,bias-pulldown = <0 2 0 2>;
365 pinctrl-single 365 pinctrl-single,bias-pullup = <0 1 0 1>;
366 }; 366 };
367 uart0_cfg_idle: uart0- 367 uart0_cfg_idle: uart0-cfg-idle-pins {
368 pinctrl-single 368 pinctrl-single,pins = <
369 0x208 369 0x208 0 /* UART0_RXD (IOCFG138) */
370 0x20c 370 0x20c 0 /* UART0_TXD (IOCFG139) */
371 >; 371 >;
372 pinctrl-single 372 pinctrl-single,bias-pulldown = <2 2 0 2>;
373 pinctrl-single 373 pinctrl-single,bias-pullup = <0 1 0 1>;
374 }; 374 };
375 uart1_cfg_func: uart1- 375 uart1_cfg_func: uart1-cfg-pins {
376 pinctrl-single 376 pinctrl-single,pins = <
377 0x210 377 0x210 0 /* UART1_CTS (IOCFG140) */
378 0x214 378 0x214 0 /* UART1_RTS (IOCFG141) */
379 0x218 379 0x218 0 /* UART1_RXD (IOCFG142) */
380 0x21c 380 0x21c 0 /* UART1_TXD (IOCFG143) */
381 >; 381 >;
382 pinctrl-single 382 pinctrl-single,bias-pulldown = <0 2 0 2>;
383 pinctrl-single 383 pinctrl-single,bias-pullup = <0 1 0 1>;
384 }; 384 };
385 uart1_cfg_idle: uart1- 385 uart1_cfg_idle: uart1-cfg-idle-pins {
386 pinctrl-single 386 pinctrl-single,pins = <
387 0x210 387 0x210 0 /* UART1_CTS (IOCFG140) */
388 0x214 388 0x214 0 /* UART1_RTS (IOCFG141) */
389 0x218 389 0x218 0 /* UART1_RXD (IOCFG142) */
390 0x21c 390 0x21c 0 /* UART1_TXD (IOCFG143) */
391 >; 391 >;
392 pinctrl-single 392 pinctrl-single,bias-pulldown = <2 2 0 2>;
393 pinctrl-single 393 pinctrl-single,bias-pullup = <0 1 0 1>;
394 }; 394 };
395 uart2_cfg_func: uart2- 395 uart2_cfg_func: uart2-cfg-pins {
396 pinctrl-single 396 pinctrl-single,pins = <
397 0x220 397 0x220 0 /* UART2_CTS (IOCFG144) */
398 0x224 398 0x224 0 /* UART2_RTS (IOCFG145) */
399 0x228 399 0x228 0 /* UART2_RXD (IOCFG146) */
400 0x22c 400 0x22c 0 /* UART2_TXD (IOCFG147) */
401 >; 401 >;
402 pinctrl-single 402 pinctrl-single,bias-pulldown = <0 2 0 2>;
403 pinctrl-single 403 pinctrl-single,bias-pullup = <0 1 0 1>;
404 }; 404 };
405 uart2_cfg_idle: uart2- 405 uart2_cfg_idle: uart2-cfg-idle-pins {
406 pinctrl-single 406 pinctrl-single,pins = <
407 0x220 407 0x220 0 /* GPIO (IOCFG144) */
408 0x224 408 0x224 0 /* GPIO (IOCFG145) */
409 0x228 409 0x228 0 /* GPIO (IOCFG146) */
410 0x22c 410 0x22c 0 /* GPIO (IOCFG147) */
411 >; 411 >;
412 pinctrl-single 412 pinctrl-single,bias-pulldown = <2 2 0 2>;
413 pinctrl-single 413 pinctrl-single,bias-pullup = <0 1 0 1>;
414 }; 414 };
415 uart3_cfg_func: uart3- 415 uart3_cfg_func: uart3-cfg-pins {
416 pinctrl-single 416 pinctrl-single,pins = <
417 0x294 417 0x294 0 /* UART3_CTS (IOCFG173) */
418 0x298 418 0x298 0 /* UART3_RTS (IOCFG174) */
419 0x29c 419 0x29c 0 /* UART3_RXD (IOCFG175) */
420 0x2a0 420 0x2a0 0 /* UART3_TXD (IOCFG176) */
421 >; 421 >;
422 pinctrl-single 422 pinctrl-single,bias-pulldown = <0 2 0 2>;
423 pinctrl-single 423 pinctrl-single,bias-pullup = <0 1 0 1>;
424 }; 424 };
425 uart3_cfg_idle: uart3- 425 uart3_cfg_idle: uart3-cfg-idle-pins {
426 pinctrl-single 426 pinctrl-single,pins = <
427 0x294 427 0x294 0 /* UART3_CTS (IOCFG173) */
428 0x298 428 0x298 0 /* UART3_RTS (IOCFG174) */
429 0x29c 429 0x29c 0 /* UART3_RXD (IOCFG175) */
430 0x2a0 430 0x2a0 0 /* UART3_TXD (IOCFG176) */
431 >; 431 >;
432 pinctrl-single 432 pinctrl-single,bias-pulldown = <2 2 0 2>;
433 pinctrl-single 433 pinctrl-single,bias-pullup = <0 1 0 1>;
434 }; 434 };
435 uart4_cfg_func: uart4- 435 uart4_cfg_func: uart4-cfg-pins {
436 pinctrl-single 436 pinctrl-single,pins = <
437 0x2a4 437 0x2a4 0 /* UART4_CTS (IOCFG177) */
438 0x2a8 438 0x2a8 0 /* UART4_RTS (IOCFG178) */
439 0x2ac 439 0x2ac 0 /* UART4_RXD (IOCFG179) */
440 0x2b0 440 0x2b0 0 /* UART4_TXD (IOCFG180) */
441 >; 441 >;
442 pinctrl-single 442 pinctrl-single,bias-pulldown = <0 2 0 2>;
443 pinctrl-single 443 pinctrl-single,bias-pullup = <0 1 0 1>;
444 }; 444 };
445 i2c0_cfg_func: i2c0-cf 445 i2c0_cfg_func: i2c0-cfg-pins {
446 pinctrl-single 446 pinctrl-single,pins = <
447 0x17c 447 0x17c 0 /* I2C0_SCL (IOCFG103) */
448 0x180 448 0x180 0 /* I2C0_SDA (IOCFG104) */
449 >; 449 >;
450 pinctrl-single 450 pinctrl-single,bias-pulldown = <0 2 0 2>;
451 pinctrl-single 451 pinctrl-single,bias-pullup = <0 1 0 1>;
452 pinctrl-single 452 pinctrl-single,drive-strength = <0x30 0xf0>;
453 }; 453 };
454 i2c1_cfg_func: i2c1-cf 454 i2c1_cfg_func: i2c1-cfg-pins {
455 pinctrl-single 455 pinctrl-single,pins = <
456 0x184 456 0x184 0 /* I2C1_SCL (IOCFG105) */
457 0x188 457 0x188 0 /* I2C1_SDA (IOCFG106) */
458 >; 458 >;
459 pinctrl-single 459 pinctrl-single,bias-pulldown = <0 2 0 2>;
460 pinctrl-single 460 pinctrl-single,bias-pullup = <0 1 0 1>;
461 pinctrl-single 461 pinctrl-single,drive-strength = <0x30 0xf0>;
462 }; 462 };
463 i2c2_cfg_func: i2c2-cf 463 i2c2_cfg_func: i2c2-cfg-pins {
464 pinctrl-single 464 pinctrl-single,pins = <
465 0x118 465 0x118 0 /* I2C2_SCL (IOCFG79) */
466 0x11c 466 0x11c 0 /* I2C2_SDA (IOCFG80) */
467 >; 467 >;
468 pinctrl-single 468 pinctrl-single,bias-pulldown = <0 2 0 2>;
469 pinctrl-single 469 pinctrl-single,bias-pullup = <0 1 0 1>;
470 pinctrl-single 470 pinctrl-single,drive-strength = <0x30 0xf0>;
471 }; 471 };
472 i2c3_cfg_func: i2c3-cf 472 i2c3_cfg_func: i2c3-cfg-pins {
473 pinctrl-single 473 pinctrl-single,pins = <
474 0x100 474 0x100 0 /* I2C3_SCL (IOCFG73) */
475 0x104 475 0x104 0 /* I2C3_SDA (IOCFG74) */
476 >; 476 >;
477 pinctrl-single 477 pinctrl-single,bias-pulldown = <0 2 0 2>;
478 pinctrl-single 478 pinctrl-single,bias-pullup = <0 1 0 1>;
479 pinctrl-single 479 pinctrl-single,drive-strength = <0x30 0xf0>;
480 }; 480 };
481 spi0_cfg_func1: spi0-c 481 spi0_cfg_func1: spi0-cfg-func1-pins {
482 pinctrl-single 482 pinctrl-single,pins = <
483 0x1d4 483 0x1d4 0 /* SPI0_CLK (IOCFG125) */
484 0x1d8 484 0x1d8 0 /* SPI0_DI (IOCFG126) */
485 0x1dc 485 0x1dc 0 /* SPI0_DO (IOCFG127) */
486 >; 486 >;
487 pinctrl-single 487 pinctrl-single,bias-pulldown = <2 2 0 2>;
488 pinctrl-single 488 pinctrl-single,bias-pullup = <0 1 0 1>;
489 pinctrl-single 489 pinctrl-single,drive-strength = <0x30 0xf0>;
490 }; 490 };
491 spi0_cfg_func2: spi0-c 491 spi0_cfg_func2: spi0-cfg-func2-pins {
492 pinctrl-single 492 pinctrl-single,pins = <
493 0x1e0 493 0x1e0 0 /* SPI0_CS0 (IOCFG128) */
494 0x1e4 494 0x1e4 0 /* SPI0_CS1 (IOCFG129) */
495 0x1e8 495 0x1e8 0 /* SPI0_CS2 (IOCFG130 */
496 0x1ec 496 0x1ec 0 /* SPI0_CS3 (IOCFG131) */
497 >; 497 >;
498 pinctrl-single 498 pinctrl-single,bias-pulldown = <0 2 0 2>;
499 pinctrl-single 499 pinctrl-single,bias-pullup = <1 1 0 1>;
500 pinctrl-single 500 pinctrl-single,drive-strength = <0x30 0xf0>;
501 }; 501 };
502 spi1_cfg_func1: spi1-c 502 spi1_cfg_func1: spi1-cfg-func1-pins {
503 pinctrl-single 503 pinctrl-single,pins = <
504 0x1f0 504 0x1f0 0 /* SPI1_CLK (IOCFG132) */
505 0x1f4 505 0x1f4 0 /* SPI1_DI (IOCFG133) */
506 0x1f8 506 0x1f8 0 /* SPI1_DO (IOCFG134) */
507 >; 507 >;
508 pinctrl-single 508 pinctrl-single,bias-pulldown = <2 2 0 2>;
509 pinctrl-single 509 pinctrl-single,bias-pullup = <0 1 0 1>;
510 pinctrl-single 510 pinctrl-single,drive-strength = <0x30 0xf0>;
511 }; 511 };
512 spi1_cfg_func2: spi1-c 512 spi1_cfg_func2: spi1-cfg-func2-pins {
513 pinctrl-single 513 pinctrl-single,pins = <
514 0x1fc 514 0x1fc 0 /* SPI1_CS (IOCFG135) */
515 >; 515 >;
516 pinctrl-single 516 pinctrl-single,bias-pulldown = <0 2 0 2>;
517 pinctrl-single 517 pinctrl-single,bias-pullup = <1 1 0 1>;
518 pinctrl-single 518 pinctrl-single,drive-strength = <0x30 0xf0>;
519 }; 519 };
520 kpc_cfg_func: kpc-cfg- 520 kpc_cfg_func: kpc-cfg-pins {
521 pinctrl-single 521 pinctrl-single,pins = <
522 0x250 522 0x250 0 /* KEY_IN0 (IOCFG156) */
523 0x254 523 0x254 0 /* KEY_IN1 (IOCFG157) */
524 0x258 524 0x258 0 /* KEY_IN2 (IOCFG158) */
525 0x230 525 0x230 0 /* KEY_OUT0 (IOCFG148) */
526 0x234 526 0x234 0 /* KEY_OUT1 (IOCFG149) */
527 0x238 527 0x238 0 /* KEY_OUT2 (IOCFG150) */
528 >; 528 >;
529 pinctrl-single 529 pinctrl-single,bias-pulldown = <2 2 0 2>;
530 pinctrl-single 530 pinctrl-single,bias-pullup = <0 1 0 1>;
531 }; 531 };
532 emmc_cfg_func: emmc-cf 532 emmc_cfg_func: emmc-cfg-pins {
533 pinctrl-single 533 pinctrl-single,pins = <
534 0x0ac 534 0x0ac 0 /* eMMC_CMD (IOCFG40) */
535 0x0b0 535 0x0b0 0 /* eMMC_CLK (IOCFG41) */
536 0x058 536 0x058 0 /* NAND_CS3_N (IOCFG19) */
537 0x064 537 0x064 0 /* NAND_BUSY2_N (IOCFG22) */
538 0x068 538 0x068 0 /* NAND_BUSY3_N (IOCFG23) */
539 0x08c 539 0x08c 0 /* NAND_DATA8 (IOCFG32) */
540 0x090 540 0x090 0 /* NAND_DATA9 (IOCFG33) */
541 0x094 541 0x094 0 /* NAND_DATA10 (IOCFG34) */
542 0x098 542 0x098 0 /* NAND_DATA11 (IOCFG35) */
543 0x09c 543 0x09c 0 /* NAND_DATA12 (IOCFG36) */
544 0x0a0 544 0x0a0 0 /* NAND_DATA13 (IOCFG37) */
545 0x0a4 545 0x0a4 0 /* NAND_DATA14 (IOCFG38) */
546 0x0a8 546 0x0a8 0 /* NAND_DATA15 (IOCFG39) */
547 >; 547 >;
548 pinctrl-single 548 pinctrl-single,bias-pulldown = <0 2 0 2>;
549 pinctrl-single 549 pinctrl-single,bias-pullup = <1 1 0 1>;
550 pinctrl-single 550 pinctrl-single,drive-strength = <0x30 0xf0>;
551 }; 551 };
552 sd_cfg_func1: sd-cfg-f 552 sd_cfg_func1: sd-cfg-func1-pins {
553 pinctrl-single 553 pinctrl-single,pins = <
554 0x18c 554 0x18c 0 /* SD_CLK (IOCFG107) */
555 0x190 555 0x190 0 /* SD_CMD (IOCFG108) */
556 >; 556 >;
557 pinctrl-single 557 pinctrl-single,bias-pulldown = <2 2 0 2>;
558 pinctrl-single 558 pinctrl-single,bias-pullup = <0 1 0 1>;
559 pinctrl-single 559 pinctrl-single,drive-strength = <0x30 0xf0>;
560 }; 560 };
561 sd_cfg_func2: sd-cfg-f 561 sd_cfg_func2: sd-cfg-func2-pins {
562 pinctrl-single 562 pinctrl-single,pins = <
563 0x194 563 0x194 0 /* SD_DATA0 (IOCFG109) */
564 0x198 564 0x198 0 /* SD_DATA1 (IOCFG110) */
565 0x19c 565 0x19c 0 /* SD_DATA2 (IOCFG111) */
566 0x1a0 566 0x1a0 0 /* SD_DATA3 (IOCFG112) */
567 >; 567 >;
568 pinctrl-single 568 pinctrl-single,bias-pulldown = <2 2 0 2>;
569 pinctrl-single 569 pinctrl-single,bias-pullup = <0 1 0 1>;
570 pinctrl-single 570 pinctrl-single,drive-strength = <0x70 0xf0>;
571 }; 571 };
572 nand_cfg_func1: nand-c 572 nand_cfg_func1: nand-cfg-func1-pins {
573 pinctrl-single 573 pinctrl-single,pins = <
574 0x03c 574 0x03c 0 /* NAND_ALE (IOCFG12) */
575 0x040 575 0x040 0 /* NAND_CLE (IOCFG13) */
576 0x06c 576 0x06c 0 /* NAND_DATA0 (IOCFG24) */
577 0x070 577 0x070 0 /* NAND_DATA1 (IOCFG25) */
578 0x074 578 0x074 0 /* NAND_DATA2 (IOCFG26) */
579 0x078 579 0x078 0 /* NAND_DATA3 (IOCFG27) */
580 0x07c 580 0x07c 0 /* NAND_DATA4 (IOCFG28) */
581 0x080 581 0x080 0 /* NAND_DATA5 (IOCFG29) */
582 0x084 582 0x084 0 /* NAND_DATA6 (IOCFG30) */
583 0x088 583 0x088 0 /* NAND_DATA7 (IOCFG31) */
584 0x08c 584 0x08c 0 /* NAND_DATA8 (IOCFG32) */
585 0x090 585 0x090 0 /* NAND_DATA9 (IOCFG33) */
586 0x094 586 0x094 0 /* NAND_DATA10 (IOCFG34) */
587 0x098 587 0x098 0 /* NAND_DATA11 (IOCFG35) */
588 0x09c 588 0x09c 0 /* NAND_DATA12 (IOCFG36) */
589 0x0a0 589 0x0a0 0 /* NAND_DATA13 (IOCFG37) */
590 0x0a4 590 0x0a4 0 /* NAND_DATA14 (IOCFG38) */
591 0x0a8 591 0x0a8 0 /* NAND_DATA15 (IOCFG39) */
592 >; 592 >;
593 pinctrl-single 593 pinctrl-single,bias-pulldown = <2 2 0 2>;
594 pinctrl-single 594 pinctrl-single,bias-pullup = <0 1 0 1>;
595 pinctrl-single 595 pinctrl-single,drive-strength = <0x30 0xf0>;
596 }; 596 };
597 nand_cfg_func2: nand-c 597 nand_cfg_func2: nand-cfg-func2-pins {
598 pinctrl-single 598 pinctrl-single,pins = <
599 0x044 599 0x044 0 /* NAND_RE_N (IOCFG14) */
600 0x048 600 0x048 0 /* NAND_WE_N (IOCFG15) */
601 0x04c 601 0x04c 0 /* NAND_CS0_N (IOCFG16) */
602 0x050 602 0x050 0 /* NAND_CS1_N (IOCFG17) */
603 0x054 603 0x054 0 /* NAND_CS2_N (IOCFG18) */
604 0x058 604 0x058 0 /* NAND_CS3_N (IOCFG19) */
605 0x05c 605 0x05c 0 /* NAND_BUSY0_N (IOCFG20) */
606 0x060 606 0x060 0 /* NAND_BUSY1_N (IOCFG21) */
607 0x064 607 0x064 0 /* NAND_BUSY2_N (IOCFG22) */
608 0x068 608 0x068 0 /* NAND_BUSY3_N (IOCFG23) */
609 >; 609 >;
610 pinctrl-single 610 pinctrl-single,bias-pulldown = <0 2 0 2>;
611 pinctrl-single 611 pinctrl-single,bias-pullup = <1 1 0 1>;
612 pinctrl-single 612 pinctrl-single,drive-strength = <0x30 0xf0>;
613 }; 613 };
614 sdio_cfg_func: sdio-cf 614 sdio_cfg_func: sdio-cfg-pins {
615 pinctrl-single 615 pinctrl-single,pins = <
616 0x1a4 616 0x1a4 0 /* SDIO0_CLK (IOCG113) */
617 0x1a8 617 0x1a8 0 /* SDIO0_CMD (IOCG114) */
618 0x1ac 618 0x1ac 0 /* SDIO0_DATA0 (IOCG115) */
619 0x1b0 619 0x1b0 0 /* SDIO0_DATA1 (IOCG116) */
620 0x1b4 620 0x1b4 0 /* SDIO0_DATA2 (IOCG117) */
621 0x1b8 621 0x1b8 0 /* SDIO0_DATA3 (IOCG118) */
622 >; 622 >;
623 pinctrl-single 623 pinctrl-single,bias-pulldown = <2 2 0 2>;
624 pinctrl-single 624 pinctrl-single,bias-pullup = <0 1 0 1>;
625 pinctrl-single 625 pinctrl-single,drive-strength = <0x30 0xf0>;
626 }; 626 };
627 audio_out_cfg_func: au 627 audio_out_cfg_func: audio-out-cfg-pins {
628 pinctrl-single 628 pinctrl-single,pins = <
629 0x200 629 0x200 0 /* GPIO (IOCFG136) */
630 0x204 630 0x204 0 /* GPIO (IOCFG137) */
631 >; 631 >;
632 pinctrl-single 632 pinctrl-single,bias-pulldown = <2 2 0 2>;
633 pinctrl-single 633 pinctrl-single,bias-pullup = <0 1 0 1>;
634 }; 634 };
635 }; 635 };
636 }; 636 };
637 637
638 gpio-keys { 638 gpio-keys {
639 compatible = "gpio-keys"; 639 compatible = "gpio-keys";
640 640
641 call { 641 call {
642 label = "call"; 642 label = "call";
643 gpios = <&gpio17 2 0>; 643 gpios = <&gpio17 2 0>;
644 linux,code = <169>; 644 linux,code = <169>; /* KEY_PHONE */
645 }; 645 };
646 }; 646 };
647 }; 647 };
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