1 // SPDX-License-Identifier: GPL-2.0-only 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* 2 /*
3 * Copyright (c) 2013-2014 Linaro Ltd. 3 * Copyright (c) 2013-2014 Linaro Ltd.
4 * Copyright (c) 2013-2014 HiSilicon Limited. 4 * Copyright (c) 2013-2014 HiSilicon Limited.
5 */ 5 */
6 6
7 /dts-v1/; 7 /dts-v1/;
8 #include "hisi-x5hd2.dtsi" 8 #include "hisi-x5hd2.dtsi"
9 9
10 / { 10 / {
11 model = "Hisilicon HIX5HD2 Development 11 model = "Hisilicon HIX5HD2 Development Board";
12 compatible = "hisilicon,hix5hd2"; 12 compatible = "hisilicon,hix5hd2";
13 13
14 chosen { 14 chosen {
15 stdout-path = "serial0:115200n 15 stdout-path = "serial0:115200n8";
16 }; 16 };
17 17
18 cpus { 18 cpus {
19 #address-cells = <1>; 19 #address-cells = <1>;
20 #size-cells = <0>; 20 #size-cells = <0>;
21 enable-method = "hisilicon,hix 21 enable-method = "hisilicon,hix5hd2-smp";
22 22
23 cpu@0 { 23 cpu@0 {
24 compatible = "arm,cort 24 compatible = "arm,cortex-a9";
25 device_type = "cpu"; 25 device_type = "cpu";
26 reg = <0>; 26 reg = <0>;
27 next-level-cache = <&l 27 next-level-cache = <&l2>;
28 }; 28 };
29 29
30 cpu@1 { 30 cpu@1 {
31 compatible = "arm,cort 31 compatible = "arm,cortex-a9";
32 device_type = "cpu"; 32 device_type = "cpu";
33 reg = <1>; 33 reg = <1>;
34 next-level-cache = <&l 34 next-level-cache = <&l2>;
35 }; 35 };
36 }; 36 };
37 37
38 memory@0 { 38 memory@0 {
39 device_type = "memory"; 39 device_type = "memory";
40 reg = <0x00000000 0x80000000>; 40 reg = <0x00000000 0x80000000>;
41 }; 41 };
42 }; 42 };
43 43
44 &timer0 { 44 &timer0 {
45 status = "okay"; 45 status = "okay";
46 }; 46 };
47 47
48 &uart0 { 48 &uart0 {
49 status = "okay"; 49 status = "okay";
50 }; 50 };
51 51
52 &gmac0 { 52 &gmac0 {
53 #address-cells = <1>; 53 #address-cells = <1>;
54 #size-cells = <0>; 54 #size-cells = <0>;
55 phy-handle = <&phy2>; 55 phy-handle = <&phy2>;
56 phy-mode = "mii"; 56 phy-mode = "mii";
57 /* Placeholder, overwritten by bootloa 57 /* Placeholder, overwritten by bootloader */
58 mac-address = [00 00 00 00 00 00]; 58 mac-address = [00 00 00 00 00 00];
59 status = "okay"; 59 status = "okay";
60 60
61 phy2: ethernet-phy@2 { 61 phy2: ethernet-phy@2 {
62 reg = <2>; 62 reg = <2>;
63 }; 63 };
64 }; 64 };
65 65
66 &gmac1 { 66 &gmac1 {
67 #address-cells = <1>; 67 #address-cells = <1>;
68 #size-cells = <0>; 68 #size-cells = <0>;
69 phy-handle = <&phy1>; 69 phy-handle = <&phy1>;
70 phy-mode = "rgmii"; 70 phy-mode = "rgmii";
71 /* Placeholder, overwritten by bootloa 71 /* Placeholder, overwritten by bootloader */
72 mac-address = [00 00 00 00 00 00]; 72 mac-address = [00 00 00 00 00 00];
73 status = "okay"; 73 status = "okay";
74 74
75 phy1: ethernet-phy@1 { 75 phy1: ethernet-phy@1 {
76 reg = <1>; 76 reg = <1>;
77 }; 77 };
78 }; 78 };
79 79
80 &ahci { 80 &ahci {
81 phys = <&sata_phy>; 81 phys = <&sata_phy>;
82 phy-names = "sata-phy"; 82 phy-names = "sata-phy";
83 }; 83 };
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