1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /* 2 /*
3 * Device Tree file for Marvell Armada 390 Dev 3 * Device Tree file for Marvell Armada 390 Development Board
4 * (DB-88F6920) 4 * (DB-88F6920)
5 * 5 *
6 * Copyright (C) 2016 Marvell 6 * Copyright (C) 2016 Marvell
7 * 7 *
8 * Grzegorz Jaszczyk <jaz@semihalf.com> 8 * Grzegorz Jaszczyk <jaz@semihalf.com>
9 */ 9 */
10 10
11 /dts-v1/; 11 /dts-v1/;
12 #include "armada-390.dtsi" 12 #include "armada-390.dtsi"
13 13
14 / { 14 / {
15 model = "Marvell Armada 390 Developmen 15 model = "Marvell Armada 390 Development Board";
16 compatible = "marvell,a390-db", "marve 16 compatible = "marvell,a390-db", "marvell,armada390";
17 17
18 chosen { 18 chosen {
19 stdout-path = "serial0:115200n 19 stdout-path = "serial0:115200n8";
20 }; 20 };
21 21
22 memory { 22 memory {
23 device_type = "memory"; 23 device_type = "memory";
24 reg = <0x00000000 0x80000000>; 24 reg = <0x00000000 0x80000000>; /* 2 GB */
25 }; 25 };
26 26
27 soc { 27 soc {
28 ranges = <MBUS_ID(0xf0, 0x01) 28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
29 MBUS_ID(0x01, 0x1d) 29 MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
30 30
31 internal-regs { 31 internal-regs {
32 i2c@11000 { 32 i2c@11000 {
33 status = "okay 33 status = "okay";
34 clock-frequenc 34 clock-frequency = <100000>;
35 35
36 eeprom@50 { 36 eeprom@50 {
37 compat 37 compatible = "atmel,24c64";
38 reg = 38 reg = <0x50>;
39 }; 39 };
40 }; 40 };
41 41
42 /* CON104 */ 42 /* CON104 */
43 serial@12000 { 43 serial@12000 {
44 status = "okay 44 status = "okay";
45 }; 45 };
46 46
47 /* CON97 */ 47 /* CON97 */
48 usb@58000 { 48 usb@58000 {
49 status = "okay 49 status = "okay";
50 }; 50 };
51 51
52 /* CON98 */ 52 /* CON98 */
53 usb3@f8000 { 53 usb3@f8000 {
54 status = "okay 54 status = "okay";
55 }; 55 };
56 }; 56 };
57 57
58 pcie { 58 pcie {
59 status = "okay"; 59 status = "okay";
60 60
61 /* CON30 */ 61 /* CON30 */
62 pcie@1,0 { 62 pcie@1,0 {
63 status = "okay 63 status = "okay";
64 }; 64 };
65 65
66 /* CON44 */ 66 /* CON44 */
67 pcie@2,0 { 67 pcie@2,0 {
68 status = "okay 68 status = "okay";
69 }; 69 };
70 70
71 /* CON61 */ 71 /* CON61 */
72 pcie@3,0 { 72 pcie@3,0 {
73 status = "okay 73 status = "okay";
74 }; 74 };
75 }; 75 };
76 }; 76 };
77 }; 77 };
78 78
79 &spi1 { 79 &spi1 {
80 status = "okay"; 80 status = "okay";
81 pinctrl-0 = <&spi1_pins>; 81 pinctrl-0 = <&spi1_pins>;
82 pinctrl-names = "default"; 82 pinctrl-names = "default";
83 83
84 flash@0 { 84 flash@0 {
85 #address-cells = <1>; 85 #address-cells = <1>;
86 #size-cells = <1>; 86 #size-cells = <1>;
87 compatible = "n25q128a13", 87 compatible = "n25q128a13",
88 "jedec,spi-nor"; 88 "jedec,spi-nor";
89 reg = <0>; /* Chip select 0 */ 89 reg = <0>; /* Chip select 0 */
90 spi-max-frequency = <108000000 90 spi-max-frequency = <108000000>;
91 91
92 partitions { 92 partitions {
93 compatible = "fixed-pa 93 compatible = "fixed-partitions";
94 #address-cells = <1>; 94 #address-cells = <1>;
95 #size-cells = <1>; 95 #size-cells = <1>;
96 96
97 partition@0 { 97 partition@0 {
98 label = "U-Boo 98 label = "U-Boot";
99 reg = <0 0x400 99 reg = <0 0x400000>;
100 }; 100 };
101 partition@400000 { 101 partition@400000 {
102 label = "Files 102 label = "Filesystem";
103 reg = <0x40000 103 reg = <0x400000 0xc00000>;
104 }; 104 };
105 }; 105 };
106 }; 106 };
107 }; 107 };
108 108
109 &nand_controller { 109 &nand_controller {
110 status = "okay"; 110 status = "okay";
111 pinctrl-0 = <&nand_pins>; 111 pinctrl-0 = <&nand_pins>;
112 pinctrl-names = "default"; 112 pinctrl-names = "default";
113 113
114 nand@0 { 114 nand@0 {
115 reg = <0>; 115 reg = <0>;
116 label = "pxa3xx_nand-0"; 116 label = "pxa3xx_nand-0";
117 nand-rb = <0>; 117 nand-rb = <0>;
118 marvell,nand-keep-config; 118 marvell,nand-keep-config;
119 nand-on-flash-bbt; 119 nand-on-flash-bbt;
120 nand-ecc-strength = <8>; 120 nand-ecc-strength = <8>;
121 nand-ecc-step-size = <512>; 121 nand-ecc-step-size = <512>;
122 122
123 partitions { 123 partitions {
124 compatible = "fixed-pa 124 compatible = "fixed-partitions";
125 #address-cells = <1>; 125 #address-cells = <1>;
126 #size-cells = <1>; 126 #size-cells = <1>;
127 127
128 partition@0 { 128 partition@0 {
129 label = "U-Boo 129 label = "U-Boot";
130 reg = <0 0x800 130 reg = <0 0x800000>;
131 }; 131 };
132 partition@800000 { 132 partition@800000 {
133 label = "Linux 133 label = "Linux";
134 reg = <0x80000 134 reg = <0x800000 0x800000>;
135 }; 135 };
136 partition@1000000 { 136 partition@1000000 {
137 label = "Files 137 label = "Filesystem";
138 reg = <0x10000 138 reg = <0x1000000 0x3f000000>;
139 }; 139 };
140 }; 140 };
141 }; 141 };
142 }; 142 };
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