1 // SPDX-License-Identifier: GPL-2.0-only 1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (C) 2016 Jamie Lentin <jm@lentin.c 2 // Copyright (C) 2016 Jamie Lentin <jm@lentin.co.uk>
3 3
4 /dts-v1/; 4 /dts-v1/;
5 5
6 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/input/input.h>
8 #include "orion5x-mv88f5181.dtsi" 8 #include "orion5x-mv88f5181.dtsi"
9 9
10 / { 10 / {
11 model = "Netgear WNR854-t"; 11 model = "Netgear WNR854-t";
12 compatible = "netgear,wnr854t", "marve 12 compatible = "netgear,wnr854t", "marvell,orion5x-88f5181",
13 "marvell,orion5x"; 13 "marvell,orion5x";
14 aliases { 14 aliases {
15 serial0 = &uart0; 15 serial0 = &uart0;
16 }; 16 };
17 17
18 memory { 18 memory {
19 device_type = "memory"; 19 device_type = "memory";
20 reg = <0x00000000 0x2000000>; 20 reg = <0x00000000 0x2000000>; /* 32 MB */
21 }; 21 };
22 22
23 chosen { 23 chosen {
24 stdout-path = "serial0:115200n 24 stdout-path = "serial0:115200n8";
25 }; 25 };
26 26
27 soc { 27 soc {
28 ranges = <MBUS_ID(0xf0, 0x01) 28 ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
29 <MBUS_ID(0x09, 0x00) 29 <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
30 <MBUS_ID(0x01, 0x0f) 30 <MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x800000>;
31 }; 31 };
32 32
33 gpio-keys { 33 gpio-keys {
34 compatible = "gpio-keys"; 34 compatible = "gpio-keys";
35 pinctrl-0 = <&pmx_reset_button 35 pinctrl-0 = <&pmx_reset_button>;
36 pinctrl-names = "default"; 36 pinctrl-names = "default";
37 37
38 key-reset { 38 key-reset {
39 label = "Reset Button" 39 label = "Reset Button";
40 linux,code = <KEY_REST 40 linux,code = <KEY_RESTART>;
41 gpios = <&gpio0 1 GPIO 41 gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
42 }; 42 };
43 }; 43 };
44 44
45 gpio-leds { 45 gpio-leds {
46 compatible = "gpio-leds"; 46 compatible = "gpio-leds";
47 pinctrl-0 = <&pmx_power_led &p 47 pinctrl-0 = <&pmx_power_led &pmx_power_led_blink &pmx_wan_led>;
48 pinctrl-names = "default"; 48 pinctrl-names = "default";
49 49
50 led@0 { 50 led@0 {
51 label = "wnr854t:green 51 label = "wnr854t:green:power";
52 gpios = <&gpio0 0 GPIO 52 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
53 }; 53 };
54 54
55 led@1 { 55 led@1 {
56 label = "wnr854t:blink 56 label = "wnr854t:blink:power";
57 gpios = <&gpio0 2 GPIO 57 gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
58 }; 58 };
59 59
60 led@2 { 60 led@2 {
61 label = "wnr854t:green 61 label = "wnr854t:green:wan";
62 gpios = <&gpio0 3 GPIO 62 gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
63 }; 63 };
64 }; 64 };
65 }; 65 };
66 66
67 &devbus_bootcs { 67 &devbus_bootcs {
68 status = "okay"; 68 status = "okay";
69 69
70 devbus,keep-config; 70 devbus,keep-config;
71 71
72 flash@0 { 72 flash@0 {
73 compatible = "cfi-flash"; 73 compatible = "cfi-flash";
74 reg = <0 0x800000>; 74 reg = <0 0x800000>;
75 bank-width = <2>; 75 bank-width = <2>;
76 76
77 partitions { 77 partitions {
78 compatible = "fixed-pa 78 compatible = "fixed-partitions";
79 #address-cells = <1>; 79 #address-cells = <1>;
80 #size-cells = <1>; 80 #size-cells = <1>;
81 81
82 partition@0 { 82 partition@0 {
83 label = "kerne 83 label = "kernel";
84 reg = <0x0 0x1 84 reg = <0x0 0x100000>;
85 }; 85 };
86 86
87 partition@100000 { 87 partition@100000 {
88 label = "rootf 88 label = "rootfs";
89 reg = <0x10000 89 reg = <0x100000 0x660000>;
90 }; 90 };
91 91
92 partition@760000 { 92 partition@760000 {
93 label = "uboot 93 label = "uboot_env";
94 reg = <0x76000 94 reg = <0x760000 0x20000>;
95 }; 95 };
96 96
97 partition@780000 { 97 partition@780000 {
98 label = "uboot 98 label = "uboot";
99 reg = <0x78000 99 reg = <0x780000 0x80000>;
100 read-only; 100 read-only;
101 }; 101 };
102 }; 102 };
103 }; 103 };
104 }; 104 };
105 105
106 &mdio { 106 &mdio {
107 status = "okay"; 107 status = "okay";
108 108
109 switch: switch@0 { 109 switch: switch@0 {
110 compatible = "marvell,mv88e608 110 compatible = "marvell,mv88e6085";
111 #address-cells = <1>; 111 #address-cells = <1>;
112 #size-cells = <0>; 112 #size-cells = <0>;
113 reg = <0>; 113 reg = <0>;
114 dsa,member = <0 0>; 114 dsa,member = <0 0>;
115 115
116 ports { 116 ports {
117 #address-cells = <1>; 117 #address-cells = <1>;
118 #size-cells = <0>; 118 #size-cells = <0>;
119 119
120 port@0 { 120 port@0 {
121 reg = <0>; 121 reg = <0>;
122 label = "lan3" 122 label = "lan3";
123 phy-handle = < 123 phy-handle = <&lan3phy>;
124 }; 124 };
125 125
126 port@1 { 126 port@1 {
127 reg = <1>; 127 reg = <1>;
128 label = "lan4" 128 label = "lan4";
129 phy-handle = < 129 phy-handle = <&lan4phy>;
130 }; 130 };
131 131
132 port@2 { 132 port@2 {
133 reg = <2>; 133 reg = <2>;
134 label = "wan"; 134 label = "wan";
135 phy-handle = < 135 phy-handle = <&wanphy>;
136 }; 136 };
137 137
138 port@3 { 138 port@3 {
139 reg = <3>; 139 reg = <3>;
140 ethernet = <&e 140 ethernet = <ðport>;
141 phy-mode = "rg 141 phy-mode = "rgmii-id";
142 fixed-link { 142 fixed-link {
143 speed 143 speed = <1000>;
144 full-d 144 full-duplex;
145 }; 145 };
146 }; 146 };
147 147
148 port@5 { 148 port@5 {
149 reg = <5>; 149 reg = <5>;
150 label = "lan1" 150 label = "lan1";
151 phy-handle = < 151 phy-handle = <&lan1phy>;
152 }; 152 };
153 153
154 port@7 { 154 port@7 {
155 reg = <7>; 155 reg = <7>;
156 label = "lan2" 156 label = "lan2";
157 phy-handle = < 157 phy-handle = <&lan2phy>;
158 }; 158 };
159 }; 159 };
160 160
161 mdio { 161 mdio {
162 #address-cells = <1>; 162 #address-cells = <1>;
163 #size-cells = <0>; 163 #size-cells = <0>;
164 164
165 lan3phy: ethernet-phy@ 165 lan3phy: ethernet-phy@0 {
166 /* Marvell 88E 166 /* Marvell 88E1121R (port 1) */
167 compatible = " 167 compatible = "ethernet-phy-id0141.0cb0",
168 " 168 "ethernet-phy-ieee802.3-c22";
169 reg = <0>; 169 reg = <0>;
170 marvell,reg-in 170 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
171 }; 171 };
172 172
173 lan4phy: ethernet-phy@ 173 lan4phy: ethernet-phy@1 {
174 /* Marvell 88E 174 /* Marvell 88E1121R (port 2) */
175 compatible = " 175 compatible = "ethernet-phy-id0141.0cb0",
176 " 176 "ethernet-phy-ieee802.3-c22";
177 reg = <1>; 177 reg = <1>;
178 marvell,reg-in 178 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
179 }; 179 };
180 180
181 wanphy: ethernet-phy@2 181 wanphy: ethernet-phy@2 {
182 /* Marvell 88E 182 /* Marvell 88E1121R (port 1) */
183 compatible = " 183 compatible = "ethernet-phy-id0141.0cb0",
184 " 184 "ethernet-phy-ieee802.3-c22";
185 reg = <2>; 185 reg = <2>;
186 marvell,reg-in 186 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
187 }; 187 };
188 188
189 lan1phy: ethernet-phy@ 189 lan1phy: ethernet-phy@5 {
190 /* Marvell 88E 190 /* Marvell 88E1112 */
191 compatible = " 191 compatible = "ethernet-phy-id0141.0cb0",
192 " 192 "ethernet-phy-ieee802.3-c22";
193 reg = <5>; 193 reg = <5>;
194 marvell,reg-in 194 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
195 }; 195 };
196 196
197 lan2phy: ethernet-phy@ 197 lan2phy: ethernet-phy@7 {
198 /* Marvell 88E 198 /* Marvell 88E1112 */
199 compatible = " 199 compatible = "ethernet-phy-id0141.0cb0",
200 " 200 "ethernet-phy-ieee802.3-c22";
201 reg = <7>; 201 reg = <7>;
202 marvell,reg-in 202 marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>;
203 }; 203 };
204 }; 204 };
205 }; 205 };
206 }; 206 };
207 207
208 ð { 208 ð {
209 status = "okay"; 209 status = "okay";
210 210
211 ethernet-port@0 { 211 ethernet-port@0 {
212 /* Hardwired to DSA switch */ 212 /* Hardwired to DSA switch */
213 speed = <1000>; 213 speed = <1000>;
214 duplex = <1>; 214 duplex = <1>;
215 phy-mode = "rgmii"; 215 phy-mode = "rgmii";
216 }; 216 };
217 }; 217 };
218 218
219 &pinctrl { 219 &pinctrl {
220 pinctrl-0 = <&pmx_pci_gpios>; 220 pinctrl-0 = <&pmx_pci_gpios>;
221 pinctrl-names = "default"; 221 pinctrl-names = "default";
222 222
223 pmx_power_led: pmx-power-led { 223 pmx_power_led: pmx-power-led {
224 marvell,pins = "mpp0"; 224 marvell,pins = "mpp0";
225 marvell,function = "gpio"; 225 marvell,function = "gpio";
226 }; 226 };
227 227
228 pmx_reset_button: pmx-reset-button { 228 pmx_reset_button: pmx-reset-button {
229 marvell,pins = "mpp1"; 229 marvell,pins = "mpp1";
230 marvell,function = "gpio"; 230 marvell,function = "gpio";
231 }; 231 };
232 232
233 pmx_power_led_blink: pmx-power-led-bli 233 pmx_power_led_blink: pmx-power-led-blink {
234 marvell,pins = "mpp2"; 234 marvell,pins = "mpp2";
235 marvell,function = "gpio"; 235 marvell,function = "gpio";
236 }; 236 };
237 237
238 pmx_wan_led: pmx-wan-led { 238 pmx_wan_led: pmx-wan-led {
239 marvell,pins = "mpp3"; 239 marvell,pins = "mpp3";
240 marvell,function = "gpio"; 240 marvell,function = "gpio";
241 }; 241 };
242 242
243 pmx_pci_gpios: pmx-pci-gpios { 243 pmx_pci_gpios: pmx-pci-gpios {
244 marvell,pins = "mpp4"; 244 marvell,pins = "mpp4";
245 marvell,function = "gpio"; 245 marvell,function = "gpio";
246 }; 246 };
247 }; 247 };
248 248
249 &uart0 { 249 &uart0 {
250 /* Pin 1: Tx, Pin 7: Rx, Pin 8: Gnd */ 250 /* Pin 1: Tx, Pin 7: Rx, Pin 8: Gnd */
251 status = "okay"; 251 status = "okay";
252 }; 252 };
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