1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /* 2 /*
3 * Copyright (c) 2017-2018 MediaTek Inc. 3 * Copyright (c) 2017-2018 MediaTek Inc.
4 * Author: Sean Wang <sean.wang@mediatek.com> 4 * Author: Sean Wang <sean.wang@mediatek.com>
5 * 5 *
6 */ 6 */
7 7
8 /dts-v1/; 8 /dts-v1/;
9 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/input/input.h>
10 #include "mt7623n.dtsi" 10 #include "mt7623n.dtsi"
11 #include "mt6323.dtsi" 11 #include "mt6323.dtsi"
12 12
13 / { 13 / {
14 model = "MediaTek MT7623N with eMMC re 14 model = "MediaTek MT7623N with eMMC reference board";
15 compatible = "mediatek,mt7623n-rfb-emm 15 compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
16 16
17 aliases { 17 aliases {
18 serial0 = &uart0; 18 serial0 = &uart0;
19 serial1 = &uart1; 19 serial1 = &uart1;
20 serial2 = &uart2; 20 serial2 = &uart2;
21 }; 21 };
22 22
23 chosen { 23 chosen {
24 stdout-path = "serial2:115200n 24 stdout-path = "serial2:115200n8";
25 }; 25 };
26 26
27 connector { 27 connector {
28 compatible = "hdmi-connector"; 28 compatible = "hdmi-connector";
29 label = "hdmi"; 29 label = "hdmi";
30 type = "d"; 30 type = "d";
31 ddc-i2c-bus = <&hdmiddc0>; 31 ddc-i2c-bus = <&hdmiddc0>;
32 32
33 port { 33 port {
34 hdmi_connector_in: end 34 hdmi_connector_in: endpoint {
35 remote-endpoin 35 remote-endpoint = <&hdmi0_out>;
36 }; 36 };
37 }; 37 };
38 }; 38 };
39 39
40 cpus { 40 cpus {
41 cpu@0 { 41 cpu@0 {
42 proc-supply = <&mt6323 42 proc-supply = <&mt6323_vproc_reg>;
43 }; 43 };
44 44
45 cpu@1 { 45 cpu@1 {
46 proc-supply = <&mt6323 46 proc-supply = <&mt6323_vproc_reg>;
47 }; 47 };
48 48
49 cpu@2 { 49 cpu@2 {
50 proc-supply = <&mt6323 50 proc-supply = <&mt6323_vproc_reg>;
51 }; 51 };
52 52
53 cpu@3 { 53 cpu@3 {
54 proc-supply = <&mt6323 54 proc-supply = <&mt6323_vproc_reg>;
55 }; 55 };
56 }; 56 };
57 57
58 gpio-keys { 58 gpio-keys {
59 compatible = "gpio-keys"; 59 compatible = "gpio-keys";
60 pinctrl-names = "default"; 60 pinctrl-names = "default";
61 pinctrl-0 = <&key_pins_a>; 61 pinctrl-0 = <&key_pins_a>;
62 62
63 button-factory { 63 button-factory {
64 label = "factory"; 64 label = "factory";
65 linux,code = <BTN_0>; 65 linux,code = <BTN_0>;
66 gpios = <&pio 256 GPIO 66 gpios = <&pio 256 GPIO_ACTIVE_LOW>;
67 }; 67 };
68 68
69 button-wps { 69 button-wps {
70 label = "wps"; 70 label = "wps";
71 linux,code = <KEY_WPS_ 71 linux,code = <KEY_WPS_BUTTON>;
72 gpios = <&pio 257 GPIO 72 gpios = <&pio 257 GPIO_ACTIVE_HIGH>;
73 }; 73 };
74 }; 74 };
75 75
76 memory@80000000 { 76 memory@80000000 {
77 device_type = "memory"; 77 device_type = "memory";
78 reg = <0 0x80000000 0 0x400000 78 reg = <0 0x80000000 0 0x40000000>;
79 }; 79 };
80 80
81 reg_1p8v: regulator-1p8v { 81 reg_1p8v: regulator-1p8v {
82 compatible = "regulator-fixed" 82 compatible = "regulator-fixed";
83 regulator-name = "fixed-1.8V"; 83 regulator-name = "fixed-1.8V";
84 regulator-min-microvolt = <180 84 regulator-min-microvolt = <1800000>;
85 regulator-max-microvolt = <180 85 regulator-max-microvolt = <1800000>;
86 regulator-boot-on; 86 regulator-boot-on;
87 regulator-always-on; 87 regulator-always-on;
88 }; 88 };
89 89
90 reg_3p3v: regulator-3p3v { 90 reg_3p3v: regulator-3p3v {
91 compatible = "regulator-fixed" 91 compatible = "regulator-fixed";
92 regulator-name = "fixed-3.3V"; 92 regulator-name = "fixed-3.3V";
93 regulator-min-microvolt = <330 93 regulator-min-microvolt = <3300000>;
94 regulator-max-microvolt = <330 94 regulator-max-microvolt = <3300000>;
95 regulator-boot-on; 95 regulator-boot-on;
96 regulator-always-on; 96 regulator-always-on;
97 }; 97 };
98 98
99 reg_5v: regulator-5v { 99 reg_5v: regulator-5v {
100 compatible = "regulator-fixed" 100 compatible = "regulator-fixed";
101 regulator-name = "fixed-5V"; 101 regulator-name = "fixed-5V";
102 regulator-min-microvolt = <500 102 regulator-min-microvolt = <5000000>;
103 regulator-max-microvolt = <500 103 regulator-max-microvolt = <5000000>;
104 regulator-boot-on; 104 regulator-boot-on;
105 regulator-always-on; 105 regulator-always-on;
106 }; 106 };
107 107
108 sound { 108 sound {
109 compatible = "mediatek,mt2701- 109 compatible = "mediatek,mt2701-wm8960-machine";
110 mediatek,platform = <&afe>; 110 mediatek,platform = <&afe>;
111 audio-routing = 111 audio-routing =
112 "Headphone", "HP_L", 112 "Headphone", "HP_L",
113 "Headphone", "HP_R", 113 "Headphone", "HP_R",
114 "LINPUT1", "AMIC", 114 "LINPUT1", "AMIC",
115 "RINPUT1", "AMIC"; 115 "RINPUT1", "AMIC";
116 mediatek,audio-codec = <&wm896 116 mediatek,audio-codec = <&wm8960>;
117 pinctrl-names = "default"; 117 pinctrl-names = "default";
118 pinctrl-0 = <&i2s0_pins_a>; 118 pinctrl-0 = <&i2s0_pins_a>;
119 }; 119 };
120 }; 120 };
121 121
122 &bls { 122 &bls {
123 status = "okay"; 123 status = "okay";
124 }; 124 };
125 125
126 &btif { 126 &btif {
127 status = "okay"; 127 status = "okay";
128 }; 128 };
129 129
130 &cec { 130 &cec {
131 status = "okay"; 131 status = "okay";
132 }; 132 };
133 133
134 &cir { 134 &cir {
135 pinctrl-names = "default"; 135 pinctrl-names = "default";
136 pinctrl-0 = <&cir_pins_a>; 136 pinctrl-0 = <&cir_pins_a>;
137 status = "okay"; 137 status = "okay";
138 }; 138 };
139 139
140 &crypto { 140 &crypto {
141 status = "okay"; 141 status = "okay";
142 }; 142 };
143 143
144 &dpi0 { 144 &dpi0 {
145 status = "okay"; 145 status = "okay";
146 146
147 ports { 147 ports {
148 #address-cells = <1>; 148 #address-cells = <1>;
149 #size-cells = <0>; 149 #size-cells = <0>;
150 port@0 { 150 port@0 {
151 reg = <0>; 151 reg = <0>;
152 dpi0_out: endpoint { 152 dpi0_out: endpoint {
153 remote-endpoin 153 remote-endpoint = <&hdmi0_in>;
154 }; 154 };
155 }; 155 };
156 }; 156 };
157 }; 157 };
158 158
159 &gmac0 { 159 &gmac0 {
160 status = "okay"; 160 status = "okay";
161 phy-mode = "trgmii"; 161 phy-mode = "trgmii";
162 162
163 fixed-link { 163 fixed-link {
164 speed = <1000>; 164 speed = <1000>;
165 full-duplex; 165 full-duplex;
166 pause; 166 pause;
167 }; 167 };
168 }; 168 };
169 169
170 &gmac1 { 170 &gmac1 {
171 status = "okay"; 171 status = "okay";
172 phy-mode = "rgmii"; 172 phy-mode = "rgmii";
173 phy-handle = <&phy5>; 173 phy-handle = <&phy5>;
174 }; 174 };
175 175
176 ð { 176 ð {
177 status = "okay"; 177 status = "okay";
178 178
179 mdio-bus { 179 mdio-bus {
180 #address-cells = <1>; 180 #address-cells = <1>;
181 #size-cells = <0>; 181 #size-cells = <0>;
182 182
183 phy5: ethernet-phy@5 { 183 phy5: ethernet-phy@5 {
184 reg = <5>; 184 reg = <5>;
185 phy-mode = "rgmii-rxid 185 phy-mode = "rgmii-rxid";
186 }; 186 };
187 187
188 switch@1f { 188 switch@1f {
189 compatible = "mediatek 189 compatible = "mediatek,mt7530";
190 reg = <0x1f>; 190 reg = <0x1f>;
191 reset-gpios = <&pio 33 191 reset-gpios = <&pio 33 0>;
192 core-supply = <&mt6323 192 core-supply = <&mt6323_vpa_reg>;
193 io-supply = <&mt6323_v 193 io-supply = <&mt6323_vemc3v3_reg>;
194 194
195 ports { 195 ports {
196 #address-cells 196 #address-cells = <1>;
197 #size-cells = 197 #size-cells = <0>;
198 198
199 port@0 { 199 port@0 {
200 reg = 200 reg = <0>;
201 label 201 label = "lan0";
202 }; 202 };
203 203
204 port@1 { 204 port@1 {
205 reg = 205 reg = <1>;
206 label 206 label = "lan1";
207 }; 207 };
208 208
209 port@2 { 209 port@2 {
210 reg = 210 reg = <2>;
211 label 211 label = "lan2";
212 }; 212 };
213 213
214 port@3 { 214 port@3 {
215 reg = 215 reg = <3>;
216 label 216 label = "lan3";
217 }; 217 };
218 218
219 port@4 { 219 port@4 {
220 reg = 220 reg = <4>;
221 label 221 label = "wan";
222 }; 222 };
223 223
224 port@6 { 224 port@6 {
225 reg = 225 reg = <6>;
226 label 226 label = "cpu";
227 ethern 227 ethernet = <&gmac0>;
228 phy-mo 228 phy-mode = "trgmii";
229 229
230 fixed- 230 fixed-link {
231 231 speed = <1000>;
232 232 full-duplex;
233 233 pause;
234 }; 234 };
235 }; 235 };
236 }; 236 };
237 }; 237 };
238 }; 238 };
239 }; 239 };
240 240
241 &hdmi0 { 241 &hdmi0 {
242 pinctrl-names = "default"; 242 pinctrl-names = "default";
243 pinctrl-0 = <&hdmi_pins_a>; 243 pinctrl-0 = <&hdmi_pins_a>;
244 status = "okay"; 244 status = "okay";
245 245
246 ports { 246 ports {
247 #address-cells = <1>; 247 #address-cells = <1>;
248 #size-cells = <0>; 248 #size-cells = <0>;
249 port@0 { 249 port@0 {
250 reg = <0>; 250 reg = <0>;
251 hdmi0_in: endpoint { 251 hdmi0_in: endpoint {
252 remote-endpoin 252 remote-endpoint = <&dpi0_out>;
253 }; 253 };
254 }; 254 };
255 255
256 port@1 { 256 port@1 {
257 reg = <1>; 257 reg = <1>;
258 hdmi0_out: endpoint { 258 hdmi0_out: endpoint {
259 remote-endpoin 259 remote-endpoint = <&hdmi_connector_in>;
260 }; 260 };
261 }; 261 };
262 }; 262 };
263 }; 263 };
264 264
265 &hdmiddc0 { 265 &hdmiddc0 {
266 pinctrl-names = "default"; 266 pinctrl-names = "default";
267 pinctrl-0 = <&hdmi_ddc_pins_a>; 267 pinctrl-0 = <&hdmi_ddc_pins_a>;
268 status = "okay"; 268 status = "okay";
269 }; 269 };
270 270
271 &hdmi_phy { 271 &hdmi_phy {
272 mediatek,ibias = <0xa>; 272 mediatek,ibias = <0xa>;
273 mediatek,ibias_up = <0x1c>; 273 mediatek,ibias_up = <0x1c>;
274 status = "okay"; 274 status = "okay";
275 }; 275 };
276 276
277 &i2c0 { 277 &i2c0 {
278 pinctrl-names = "default"; 278 pinctrl-names = "default";
279 pinctrl-0 = <&i2c0_pins_a>; 279 pinctrl-0 = <&i2c0_pins_a>;
280 status = "okay"; 280 status = "okay";
281 }; 281 };
282 282
283 &i2c1 { 283 &i2c1 {
284 pinctrl-names = "default"; 284 pinctrl-names = "default";
285 pinctrl-0 = <&i2c1_pins_b>; 285 pinctrl-0 = <&i2c1_pins_b>;
286 status = "okay"; 286 status = "okay";
287 287
288 wm8960: wm8960@1a { 288 wm8960: wm8960@1a {
289 compatible = "wlf,wm8960"; 289 compatible = "wlf,wm8960";
290 reg = <0x1a>; 290 reg = <0x1a>;
291 }; 291 };
292 }; 292 };
293 293
294 &i2c2 { 294 &i2c2 {
295 pinctrl-names = "default"; 295 pinctrl-names = "default";
296 pinctrl-0 = <&i2c2_pins_a>; 296 pinctrl-0 = <&i2c2_pins_a>;
297 status = "okay"; 297 status = "okay";
298 }; 298 };
299 299
300 &mmc0 { 300 &mmc0 {
301 pinctrl-names = "default", "state_uhs" 301 pinctrl-names = "default", "state_uhs";
302 pinctrl-0 = <&mmc0_pins_default>; 302 pinctrl-0 = <&mmc0_pins_default>;
303 pinctrl-1 = <&mmc0_pins_uhs>; 303 pinctrl-1 = <&mmc0_pins_uhs>;
304 status = "okay"; 304 status = "okay";
305 bus-width = <8>; 305 bus-width = <8>;
306 max-frequency = <50000000>; 306 max-frequency = <50000000>;
307 cap-mmc-highspeed; 307 cap-mmc-highspeed;
308 vmmc-supply = <®_3p3v>; 308 vmmc-supply = <®_3p3v>;
309 vqmmc-supply = <®_1p8v>; 309 vqmmc-supply = <®_1p8v>;
310 non-removable; 310 non-removable;
311 }; 311 };
312 312
313 &mmc1 { 313 &mmc1 {
314 pinctrl-names = "default", "state_uhs" 314 pinctrl-names = "default", "state_uhs";
315 pinctrl-0 = <&mmc1_pins_default>; 315 pinctrl-0 = <&mmc1_pins_default>;
316 pinctrl-1 = <&mmc1_pins_uhs>; 316 pinctrl-1 = <&mmc1_pins_uhs>;
317 status = "okay"; 317 status = "okay";
318 bus-width = <4>; 318 bus-width = <4>;
319 max-frequency = <50000000>; 319 max-frequency = <50000000>;
320 cap-sd-highspeed; 320 cap-sd-highspeed;
321 cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>; 321 cd-gpios = <&pio 261 GPIO_ACTIVE_LOW>;
322 vmmc-supply = <®_3p3v>; 322 vmmc-supply = <®_3p3v>;
323 vqmmc-supply = <®_3p3v>; 323 vqmmc-supply = <®_3p3v>;
324 }; 324 };
325 325
326 &pcie { 326 &pcie {
327 pinctrl-names = "default"; 327 pinctrl-names = "default";
328 pinctrl-0 = <&pcie_default>; 328 pinctrl-0 = <&pcie_default>;
329 status = "okay"; 329 status = "okay";
330 330
331 pcie@0,0 { 331 pcie@0,0 {
332 status = "okay"; 332 status = "okay";
333 }; 333 };
334 334
335 pcie@1,0 { 335 pcie@1,0 {
336 status = "okay"; 336 status = "okay";
337 }; 337 };
338 }; 338 };
339 339
340 &pcie0_phy { 340 &pcie0_phy {
341 status = "okay"; 341 status = "okay";
342 }; 342 };
343 343
344 &pcie1_phy { 344 &pcie1_phy {
345 status = "okay"; 345 status = "okay";
346 }; 346 };
347 347
348 &pwm { 348 &pwm {
349 pinctrl-names = "default"; 349 pinctrl-names = "default";
350 pinctrl-0 = <&pwm_pins_a>; 350 pinctrl-0 = <&pwm_pins_a>;
351 status = "okay"; 351 status = "okay";
352 }; 352 };
353 353
354 &spi0 { 354 &spi0 {
355 pinctrl-names = "default"; 355 pinctrl-names = "default";
356 pinctrl-0 = <&spi0_pins_a>; 356 pinctrl-0 = <&spi0_pins_a>;
357 status = "okay"; 357 status = "okay";
358 }; 358 };
359 359
360 &spi1 { 360 &spi1 {
361 pinctrl-names = "default"; 361 pinctrl-names = "default";
362 pinctrl-0 = <&spi1_pins_a>; 362 pinctrl-0 = <&spi1_pins_a>;
363 status = "okay"; 363 status = "okay";
364 }; 364 };
365 365
366 &spi2 { 366 &spi2 {
367 pinctrl-names = "default"; 367 pinctrl-names = "default";
368 pinctrl-0 = <&spi2_pins_a>; 368 pinctrl-0 = <&spi2_pins_a>;
369 status = "okay"; 369 status = "okay";
370 }; 370 };
371 371
372 &uart0 { 372 &uart0 {
373 pinctrl-names = "default"; 373 pinctrl-names = "default";
374 pinctrl-0 = <&uart0_pins_a>; 374 pinctrl-0 = <&uart0_pins_a>;
375 status = "okay"; 375 status = "okay";
376 }; 376 };
377 377
378 &uart1 { 378 &uart1 {
379 pinctrl-names = "default"; 379 pinctrl-names = "default";
380 pinctrl-0 = <&uart1_pins_a>; 380 pinctrl-0 = <&uart1_pins_a>;
381 status = "okay"; 381 status = "okay";
382 }; 382 };
383 383
384 &uart2 { 384 &uart2 {
385 pinctrl-names = "default"; 385 pinctrl-names = "default";
386 pinctrl-0 = <&uart2_pins_a>; 386 pinctrl-0 = <&uart2_pins_a>;
387 status = "okay"; 387 status = "okay";
388 }; 388 };
389 389
390 &usb1 { 390 &usb1 {
391 vusb33-supply = <®_3p3v>; 391 vusb33-supply = <®_3p3v>;
392 vbus-supply = <®_5v>; 392 vbus-supply = <®_5v>;
393 status = "okay"; 393 status = "okay";
394 }; 394 };
395 395
396 &u3phy1 { 396 &u3phy1 {
397 status = "okay"; 397 status = "okay";
398 }; 398 };
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