1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * at91sam9g45.dtsi - Device Tree Include file
4 * applies to AT91SAM9G45,
5 * AT91SAM9G46, AT91SAM9M11
6 *
7 * Copyright (C) 2011 Atmel,
8 * 2011 Nicolas Ferre <nicolas.f
9 */
10
11 #include <dt-bindings/dma/at91.h>
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/mfd/at91-usart.h>
17
18 / {
19 #address-cells = <1>;
20 #size-cells = <1>;
21 model = "Atmel AT91SAM9G45 family SoC"
22 compatible = "atmel,at91sam9g45";
23 interrupt-parent = <&aic>;
24
25 aliases {
26 serial0 = &dbgu;
27 serial1 = &usart0;
28 serial2 = &usart1;
29 serial3 = &usart2;
30 serial4 = &usart3;
31 gpio0 = &pioA;
32 gpio1 = &pioB;
33 gpio2 = &pioC;
34 gpio3 = &pioD;
35 gpio4 = &pioE;
36 tcb0 = &tcb0;
37 tcb1 = &tcb1;
38 i2c0 = &i2c0;
39 i2c1 = &i2c1;
40 ssc0 = &ssc0;
41 ssc1 = &ssc1;
42 pwm0 = &pwm0;
43 };
44 cpus {
45 #address-cells = <1>;
46 #size-cells = <0>;
47
48 cpu@0 {
49 compatible = "arm,arm9
50 device_type = "cpu";
51 reg = <0>;
52 };
53 };
54
55 memory@70000000 {
56 device_type = "memory";
57 reg = <0x70000000 0x10000000>;
58 };
59
60 clocks {
61 slow_xtal: slow_xtal {
62 compatible = "fixed-cl
63 #clock-cells = <0>;
64 clock-frequency = <0>;
65 };
66
67 main_xtal: main_xtal {
68 compatible = "fixed-cl
69 #clock-cells = <0>;
70 clock-frequency = <0>;
71 };
72
73 adc_op_clk: adc_op_clk {
74 compatible = "fixed-cl
75 #clock-cells = <0>;
76 clock-frequency = <300
77 };
78 };
79
80 sram: sram@300000 {
81 compatible = "mmio-sram";
82 reg = <0x00300000 0x10000>;
83 #address-cells = <1>;
84 #size-cells = <1>;
85 ranges = <0 0x00300000 0x10000
86 };
87
88 ahb {
89 compatible = "simple-bus";
90 #address-cells = <1>;
91 #size-cells = <1>;
92 ranges;
93
94 apb {
95 compatible = "simple-b
96 #address-cells = <1>;
97 #size-cells = <1>;
98 ranges;
99
100 aic: interrupt-control
101 #interrupt-cel
102 compatible = "
103 interrupt-cont
104 reg = <0xfffff
105 atmel,external
106 };
107
108 ramc0: ramc@ffffe400 {
109 compatible = "
110 reg = <0xffffe
111 clocks = <&pmc
112 clock-names =
113 };
114
115 ramc1: ramc@ffffe600 {
116 compatible = "
117 reg = <0xffffe
118 clocks = <&pmc
119 clock-names =
120 };
121
122 smc: smc@ffffe800 {
123 compatible = "
124 reg = <0xffffe
125 };
126
127 matrix: matrix@ffffea0
128 compatible = "
129 reg = <0xffffe
130 };
131
132 pmc: clock-controller@
133 compatible = "
134 reg = <0xfffff
135 interrupts = <
136 #clock-cells =
137 clocks = <&clk
138 clock-names =
139 };
140
141 reset-controller@fffff
142 compatible = "
143 reg = <0xfffff
144 clocks = <&clk
145 };
146
147 pit: timer@fffffd30 {
148 compatible = "
149 reg = <0xfffff
150 interrupts = <
151 clocks = <&pmc
152 };
153
154
155 poweroff@fffffd10 {
156 compatible = "
157 reg = <0xfffff
158 clocks = <&clk
159 };
160
161 tcb0: timer@fff7c000 {
162 compatible = "
163 #address-cells
164 #size-cells =
165 reg = <0xfff7c
166 interrupts = <
167 clocks = <&pmc
168 clock-names =
169 };
170
171 tcb1: timer@fffd4000 {
172 compatible = "
173 #address-cells
174 #size-cells =
175 reg = <0xfffd4
176 interrupts = <
177 clocks = <&pmc
178 clock-names =
179 };
180
181 dma: dma-controller@ff
182 compatible = "
183 reg = <0xffffe
184 interrupts = <
185 #dma-cells = <
186 clocks = <&pmc
187 clock-names =
188 };
189
190 pinctrl@fffff200 {
191 #address-cells
192 #size-cells =
193 compatible = "
194 ranges = <0xff
195
196 atmel,mux-mask
197 /* A
198 0xfffff
199 0xfffff
200 0xfffff
201 0xfffff
202 0xfffff
203 >;
204
205 /* shared pinc
206 ac97 {
207 pinctr
208
209
210
211
212
213 };
214 };
215
216 adc0 {
217 pinctr
218
219 };
220 pinctr
221
222 };
223 pinctr
224
225 };
226 pinctr
227
228 };
229 pinctr
230
231 };
232 pinctr
233
234 };
235 pinctr
236
237 };
238 pinctr
239
240 };
241 pinctr
242
243 };
244 };
245
246 dbgu {
247 pinctr
248
249
250
251 };
252 };
253
254 i2c0 {
255 pinctr
256
257
258
259 };
260 };
261
262 i2c1 {
263 pinctr
264
265
266
267 };
268 };
269
270 isi {
271 pinctr
272
273
274
275
276
277
278
279
280
281
282
283
284 };
285
286 pinctr
287
288
289
290 };
291
292 pinctr
293
294
295
296 };
297 };
298
299 usart0 {
300 pinctr
301
302
303
304 };
305
306 pinctr
307
308
309 };
310
311 pinctr
312
313
314 };
315 };
316
317 usart1 {
318 pinctr
319
320
321
322 };
323
324 pinctr
325
326
327 };
328
329 pinctr
330
331
332 };
333 };
334
335 usart2 {
336 pinctr
337
338
339
340 };
341
342 pinctr
343
344
345 };
346
347 pinctr
348
349
350 };
351 };
352
353 usart3 {
354 pinctr
355
356
357
358 };
359
360 pinctr
361
362
363 };
364
365 pinctr
366
367
368 };
369 };
370
371 nand {
372 pinctr
373
374
375 };
376
377 pinctr
378
379
380 };
381 };
382
383 macb {
384 pinctr
385
386
387
388
389
390
391
392
393
394
395
396 };
397
398 pinctr
399
400
401
402
403
404
405
406
407
408 };
409 };
410
411 mmc0 {
412 pinctr
413
414
415
416
417 };
418
419 pinctr
420
421
422
423
424 };
425
426 pinctr
427
428
429
430
431
432 };
433 };
434
435 mmc1 {
436 pinctr
437
438
439
440
441 };
442
443 pinctr
444
445
446
447
448 };
449
450 pinctr
451
452
453
454
455
456 };
457 };
458
459 ssc0 {
460 pinctr
461
462
463
464
465 };
466
467 pinctr
468
469
470
471
472 };
473 };
474
475 ssc1 {
476 pinctr
477
478
479
480
481 };
482
483 pinctr
484
485
486
487
488 };
489 };
490
491 spi0 {
492 pinctr
493
494
495
496
497 };
498 };
499
500 spi1 {
501 pinctr
502
503
504
505
506 };
507 };
508
509 tcb0 {
510 pinctr
511
512 };
513
514 pinctr
515
516 };
517
518 pinctr
519
520 };
521
522 pinctr
523
524 };
525
526 pinctr
527
528 };
529
530 pinctr
531
532 };
533
534 pinctr
535
536 };
537
538 pinctr
539
540 };
541
542 pinctr
543
544 };
545 };
546
547 tcb1 {
548 pinctr
549
550 };
551
552 pinctr
553
554 };
555
556 pinctr
557
558 };
559
560 pinctr
561
562 };
563
564 pinctr
565
566 };
567
568 pinctr
569
570 };
571
572 pinctr
573
574 };
575
576 pinctr
577
578 };
579
580 pinctr
581
582 };
583 };
584
585 fb {
586 pinctr
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618 };
619 };
620
621 pioA: gpio@fff
622 compat
623 reg =
624 interr
625 #gpio-
626 gpio-c
627 interr
628 #inter
629 clocks
630 };
631
632 pioB: gpio@fff
633 compat
634 reg =
635 interr
636 #gpio-
637 gpio-c
638 interr
639 #inter
640 clocks
641 };
642
643 pioC: gpio@fff
644 compat
645 reg =
646 interr
647 #gpio-
648 gpio-c
649 interr
650 #inter
651 clocks
652 };
653
654 pioD: gpio@fff
655 compat
656 reg =
657 interr
658 #gpio-
659 gpio-c
660 interr
661 #inter
662 clocks
663 };
664
665 pioE: gpio@fff
666 compat
667 reg =
668 interr
669 #gpio-
670 gpio-c
671 interr
672 #inter
673 clocks
674 };
675 };
676
677 dbgu: serial@ffffee00
678 compatible = "
679 atmel,usart-mo
680 reg = <0xffffe
681 interrupts = <
682 pinctrl-names
683 pinctrl-0 = <&
684 clocks = <&pmc
685 clock-names =
686 status = "disa
687 };
688
689 usart0: serial@fff8c00
690 compatible = "
691 reg = <0xfff8c
692 atmel,usart-mo
693 interrupts = <
694 atmel,use-dma-
695 atmel,use-dma-
696 pinctrl-names
697 pinctrl-0 = <&
698 clocks = <&pmc
699 clock-names =
700 status = "disa
701 };
702
703 usart1: serial@fff9000
704 compatible = "
705 reg = <0xfff90
706 atmel,usart-mo
707 interrupts = <
708 atmel,use-dma-
709 atmel,use-dma-
710 pinctrl-names
711 pinctrl-0 = <&
712 clocks = <&pmc
713 clock-names =
714 status = "disa
715 };
716
717 usart2: serial@fff9400
718 compatible = "
719 reg = <0xfff94
720 atmel,usart-mo
721 interrupts = <
722 atmel,use-dma-
723 atmel,use-dma-
724 pinctrl-names
725 pinctrl-0 = <&
726 clocks = <&pmc
727 clock-names =
728 status = "disa
729 };
730
731 usart3: serial@fff9800
732 compatible = "
733 reg = <0xfff98
734 atmel,usart-mo
735 interrupts = <
736 atmel,use-dma-
737 atmel,use-dma-
738 pinctrl-names
739 pinctrl-0 = <&
740 clocks = <&pmc
741 clock-names =
742 status = "disa
743 };
744
745 macb0: ethernet@fffbc0
746 compatible = "
747 reg = <0xfffbc
748 interrupts = <
749 pinctrl-names
750 pinctrl-0 = <&
751 clocks = <&pmc
752 clock-names =
753 status = "disa
754 };
755
756 trng@fffcc000 {
757 compatible = "
758 reg = <0xfffcc
759 interrupts = <
760 clocks = <&pmc
761 };
762
763 i2c0: i2c@fff84000 {
764 compatible = "
765 reg = <0xfff84
766 interrupts = <
767 pinctrl-names
768 pinctrl-0 = <&
769 #address-cells
770 #size-cells =
771 clocks = <&pmc
772 status = "disa
773 };
774
775 i2c1: i2c@fff88000 {
776 compatible = "
777 reg = <0xfff88
778 interrupts = <
779 pinctrl-names
780 pinctrl-0 = <&
781 #address-cells
782 #size-cells =
783 clocks = <&pmc
784 status = "disa
785 };
786
787 ssc0: ssc@fff9c000 {
788 compatible = "
789 reg = <0xfff9c
790 interrupts = <
791 pinctrl-names
792 pinctrl-0 = <&
793 clocks = <&pmc
794 clock-names =
795 status = "disa
796 };
797
798 ssc1: ssc@fffa0000 {
799 compatible = "
800 reg = <0xfffa0
801 interrupts = <
802 pinctrl-names
803 pinctrl-0 = <&
804 clocks = <&pmc
805 clock-names =
806 status = "disa
807 };
808
809 ac97: sound@fffac000 {
810 compatible = "
811 reg = <0xfffac
812 interrupts = <
813 pinctrl-names
814 pinctrl-0 = <&
815 clocks = <&pmc
816 clock-names =
817 status = "disa
818 };
819
820 adc0: adc@fffb0000 {
821 compatible = "
822 reg = <0xfffb0
823 interrupts = <
824 clocks = <&pmc
825 clock-names =
826 atmel,adc-chan
827 atmel,adc-vref
828 atmel,adc-star
829 };
830
831 isi@fffb4000 {
832 compatible = "
833 reg = <0xfffb4
834 interrupts = <
835 clocks = <&pmc
836 clock-names =
837 status = "disa
838 port {
839 #addre
840 #size-
841 };
842 };
843
844 pwm0: pwm@fffb8000 {
845 compatible = "
846 reg = <0xfffb8
847 interrupts = <
848 #pwm-cells = <
849 clocks = <&pmc
850 status = "disa
851 };
852
853 mmc0: mmc@fff80000 {
854 compatible = "
855 reg = <0xfff80
856 interrupts = <
857 dmas = <&dma 1
858 dma-names = "r
859 #address-cells
860 #size-cells =
861 clocks = <&pmc
862 clock-names =
863 status = "disa
864 };
865
866 mmc1: mmc@fffd0000 {
867 compatible = "
868 reg = <0xfffd0
869 interrupts = <
870 dmas = <&dma 1
871 dma-names = "r
872 #address-cells
873 #size-cells =
874 clocks = <&pmc
875 clock-names =
876 status = "disa
877 };
878
879 watchdog@fffffd40 {
880 compatible = "
881 reg = <0xfffff
882 interrupts = <
883 clocks = <&clk
884 atmel,watchdog
885 atmel,reset-ty
886 atmel,dbg-halt
887 status = "disa
888 };
889
890 spi0: spi@fffa4000 {
891 #address-cells
892 #size-cells =
893 compatible = "
894 reg = <0xfffa4
895 interrupts = <
896 pinctrl-names
897 pinctrl-0 = <&
898 clocks = <&pmc
899 clock-names =
900 status = "disa
901 };
902
903 spi1: spi@fffa8000 {
904 #address-cells
905 #size-cells =
906 compatible = "
907 reg = <0xfffa8
908 interrupts = <
909 pinctrl-names
910 pinctrl-0 = <&
911 clocks = <&pmc
912 clock-names =
913 status = "disa
914 };
915
916 usb2: gadget@fff78000
917 compatible = "
918 reg = <0x00600
919 0xfff78
920 interrupts = <
921 clocks = <&pmc
922 clock-names =
923 status = "disa
924 };
925
926 clk32k: clock-controll
927 compatible = "
928 reg = <0xfffff
929 clocks = <&slo
930 #clock-cells =
931 };
932
933 rtc@fffffd20 {
934 compatible = "
935 reg = <0xfffff
936 interrupts = <
937 clocks = <&clk
938 status = "disa
939 };
940
941 rtc@fffffdb0 {
942 compatible = "
943 reg = <0xfffff
944 interrupts = <
945 clocks = <&clk
946 status = "disa
947 };
948
949 gpbr: syscon@fffffd60
950 compatible = "
951 reg = <0xfffff
952 status = "disa
953 };
954 };
955
956 fb0: fb@500000 {
957 compatible = "atmel,at
958 reg = <0x00500000 0x10
959 interrupts = <23 IRQ_T
960 pinctrl-names = "defau
961 pinctrl-0 = <&pinctrl_
962 clocks = <&pmc PMC_TYP
963 clock-names = "hclk",
964 status = "disabled";
965 };
966
967 usb0: ohci@700000 {
968 compatible = "atmel,at
969 reg = <0x00700000 0x10
970 interrupts = <22 IRQ_T
971 clocks = <&pmc PMC_TYP
972 clock-names = "ohci_cl
973 status = "disabled";
974 };
975
976 usb1: ehci@800000 {
977 compatible = "atmel,at
978 reg = <0x00800000 0x10
979 interrupts = <22 IRQ_T
980 clocks = <&pmc PMC_TYP
981 clock-names = "usb_clk
982 status = "disabled";
983 };
984
985 ebi: ebi@10000000 {
986 compatible = "atmel,at
987 #address-cells = <2>;
988 #size-cells = <1>;
989 atmel,smc = <&smc>;
990 atmel,matrix = <&matri
991 reg = <0x10000000 0x80
992 ranges = <0x0 0x0 0x10
993 0x1 0x0 0x20
994 0x2 0x0 0x30
995 0x3 0x0 0x40
996 0x4 0x0 0x50
997 0x5 0x0 0x60
998 clocks = <&pmc PMC_TYP
999 status = "disabled";
1000
1001 nand_controller: nand
1002 compatible =
1003 #address-cell
1004 #size-cells =
1005 ranges;
1006 status = "dis
1007 };
1008 };
1009 };
1010
1011 i2c-gpio-0 {
1012 compatible = "i2c-gpio";
1013 gpios = <&pioA 20 GPIO_ACTIVE
1014 &pioA 21 GPIO_ACTIVE
1015 >;
1016 i2c-gpio,sda-open-drain;
1017 i2c-gpio,scl-open-drain;
1018 i2c-gpio,delay-us = <5>;
1019 #address-cells = <1>;
1020 #size-cells = <0>;
1021 status = "disabled";
1022 };
1023 };
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