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Linux/scripts/dtc/include-prefixes/arm/microchip/sama5d3_can.dtsi

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Diff markup

Differences between /scripts/dtc/include-prefixes/arm/microchip/sama5d3_can.dtsi (Architecture i386) and /scripts/dtc/include-prefixes/arm/microchip/sama5d3_can.dtsi (Architecture m68k)


  1 // SPDX-License-Identifier: GPL-2.0-only            1 // SPDX-License-Identifier: GPL-2.0-only
  2 /*                                                  2 /*
  3  * sama5d3_can.dtsi - Device Tree Include file      3  * sama5d3_can.dtsi - Device Tree Include file for SAMA5D3 SoC with
  4  * CAN support                                      4  * CAN support
  5  *                                                  5  *
  6  * Copyright (C) 2013 Boris BREZILLON <b.brezil      6  * Copyright (C) 2013 Boris BREZILLON <b.brezillon@overkiz.com>
  7  */                                                 7  */
  8                                                     8 
  9 #include <dt-bindings/pinctrl/at91.h>               9 #include <dt-bindings/pinctrl/at91.h>
 10 #include <dt-bindings/interrupt-controller/irq     10 #include <dt-bindings/interrupt-controller/irq.h>
 11                                                    11 
 12 / {                                                12 / {
 13         ahb {                                      13         ahb {
 14                 apb {                              14                 apb {
 15                         pinctrl@fffff200 {         15                         pinctrl@fffff200 {
 16                                 can0 {             16                                 can0 {
 17                                         pinctr     17                                         pinctrl_can0_rx_tx: can0_rx_tx {
 18                                                    18                                                 atmel,pins =
 19                                                    19                                                         <AT91_PIOD 14 AT91_PERIPH_C AT91_PINCTRL_NONE   /* PD14 periph C RX, conflicts with SCK0, SPI0_NPCS1 */
 20                                                    20                                                          AT91_PIOD 15 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* PD15 periph C TX, conflicts with CTS0, SPI0_NPCS2 */
 21                                         };         21                                         };
 22                                 };                 22                                 };
 23                                                    23 
 24                                 can1 {             24                                 can1 {
 25                                         pinctr     25                                         pinctrl_can1_rx_tx: can1_rx_tx {
 26                                                    26                                                 atmel,pins =
 27                                                    27                                                         <AT91_PIOB 14 AT91_PERIPH_B AT91_PINCTRL_NONE   /* PB14 periph B RX, conflicts with GCRS */
 28                                                    28                                                          AT91_PIOB 15 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PB15 periph B TX, conflicts with GCOL */
 29                                         };         29                                         };
 30                                 };                 30                                 };
 31                                                    31 
 32                         };                         32                         };
 33                                                    33 
 34                         can0: can@f000c000 {       34                         can0: can@f000c000 {
 35                                 compatible = "     35                                 compatible = "atmel,at91sam9x5-can";
 36                                 reg = <0xf000c     36                                 reg = <0xf000c000 0x300>;
 37                                 interrupts = <     37                                 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 3>;
 38                                 pinctrl-names      38                                 pinctrl-names = "default";
 39                                 pinctrl-0 = <&     39                                 pinctrl-0 = <&pinctrl_can0_rx_tx>;
 40                                 clocks = <&pmc     40                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 40>;
 41                                 clock-names =      41                                 clock-names = "can_clk";
 42                                 status = "disa     42                                 status = "disabled";
 43                         };                         43                         };
 44                                                    44 
 45                         can1: can@f8010000 {       45                         can1: can@f8010000 {
 46                                 compatible = "     46                                 compatible = "atmel,at91sam9x5-can";
 47                                 reg = <0xf8010     47                                 reg = <0xf8010000 0x300>;
 48                                 interrupts = <     48                                 interrupts = <41 IRQ_TYPE_LEVEL_HIGH 3>;
 49                                 pinctrl-names      49                                 pinctrl-names = "default";
 50                                 pinctrl-0 = <&     50                                 pinctrl-0 = <&pinctrl_can1_rx_tx>;
 51                                 clocks = <&pmc     51                                 clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
 52                                 clock-names =      52                                 clock-names = "can_clk";
 53                                 status = "disa     53                                 status = "disabled";
 54                         };                         54                         };
 55                 };                                 55                 };
 56         };                                         56         };
 57 };                                                 57 };
                                                      

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