1 // SPDX-License-Identifier: GPL-2.0-only 1 // SPDX-License-Identifier: GPL-2.0-only
2 /* 2 /*
3 * Copyright (C) 2013 Daniel Tang <tangrs@tang 3 * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
4 */ 4 */
5 5
6 /include/ "nspire.dtsi" 6 /include/ "nspire.dtsi"
7 7
8 &lcd { 8 &lcd {
9 port { 9 port {
10 clcd_pads: endpoint { 10 clcd_pads: endpoint {
11 remote-endpoint = <&pa 11 remote-endpoint = <&panel_in>;
12 }; 12 };
13 }; 13 };
14 }; 14 };
15 15
16 &fast_timer { 16 &fast_timer {
17 /* compatible = "lsi,zevio-timer"; */ 17 /* compatible = "lsi,zevio-timer"; */
18 reg = <0x90010000 0x1000>, <0x900a0010 18 reg = <0x90010000 0x1000>, <0x900a0010 0x8>;
19 }; 19 };
20 20
21 &uart { 21 &uart {
22 compatible = "ns16550"; 22 compatible = "ns16550";
23 reg-shift = <2>; 23 reg-shift = <2>;
24 reg-io-width = <4>; 24 reg-io-width = <4>;
25 clocks = <&apb_pclk>; 25 clocks = <&apb_pclk>;
26 no-loopback-test; 26 no-loopback-test;
27 }; 27 };
28 28
29 &timer0 { 29 &timer0 {
30 /* compatible = "lsi,zevio-timer"; */ 30 /* compatible = "lsi,zevio-timer"; */
31 reg = <0x900c0000 0x1000>, <0x900a0018 31 reg = <0x900c0000 0x1000>, <0x900a0018 0x8>;
32 }; 32 };
33 33
34 &timer1 { 34 &timer1 {
35 compatible = "lsi,zevio-timer"; 35 compatible = "lsi,zevio-timer";
36 reg = <0x900d0000 0x1000>, <0x900a0020 36 reg = <0x900d0000 0x1000>, <0x900a0020 0x8>;
37 }; 37 };
38 38
39 &keypad { 39 &keypad {
40 active-low; 40 active-low;
41 41
42 }; 42 };
43 43
44 &base_clk { 44 &base_clk {
45 compatible = "lsi,nspire-classic-clock 45 compatible = "lsi,nspire-classic-clock";
46 }; 46 };
47 47
48 &ahb_clk { 48 &ahb_clk {
49 compatible = "lsi,nspire-classic-ahb-d 49 compatible = "lsi,nspire-classic-ahb-divider";
50 }; 50 };
51 51
52 52
53 &vbus_reg { 53 &vbus_reg {
54 gpio = <&gpio 5 0>; 54 gpio = <&gpio 5 0>;
55 }; 55 };
56 56
57 / { 57 / {
58 memory@10000000 { 58 memory@10000000 {
59 device_type = "memory"; 59 device_type = "memory";
60 reg = <0x10000000 0x2000000>; 60 reg = <0x10000000 0x2000000>; /* 32 MB */
61 }; 61 };
62 62
63 ahb { 63 ahb {
64 #address-cells = <1>; 64 #address-cells = <1>;
65 #size-cells = <1>; 65 #size-cells = <1>;
66 66
67 intc: interrupt-controller@dc0 67 intc: interrupt-controller@dc000000 {
68 compatible = "lsi,zevi 68 compatible = "lsi,zevio-intc";
69 interrupt-controller; 69 interrupt-controller;
70 reg = <0xdc000000 0x10 70 reg = <0xdc000000 0x1000>;
71 #interrupt-cells = <1> 71 #interrupt-cells = <1>;
72 }; 72 };
73 }; 73 };
74 74
75 panel { 75 panel {
76 compatible = "ti,nspire-classi 76 compatible = "ti,nspire-classic-lcd-panel";
77 port { 77 port {
78 panel_in: endpoint { 78 panel_in: endpoint {
79 remote-endpoin 79 remote-endpoint = <&clcd_pads>;
80 }; 80 };
81 }; 81 };
82 }; 82 };
83 chosen { 83 chosen {
84 bootargs = "debug earlyprintk 84 bootargs = "debug earlyprintk console=tty0 console=ttyS0,115200n8 root=/dev/ram0";
85 }; 85 };
86 }; 86 };
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