1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/; 2 /dts-v1/;
3 3
4 #include <dt-bindings/input/input.h> 4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h> 5 #include <dt-bindings/leds/common.h>
6 #include "tegra20.dtsi" 6 #include "tegra20.dtsi"
7 #include "tegra20-cpu-opp.dtsi" 7 #include "tegra20-cpu-opp.dtsi"
8 8
9 / { 9 / {
10 model = "Compulab TrimSlice board"; 10 model = "Compulab TrimSlice board";
11 compatible = "compulab,trimslice", "nv 11 compatible = "compulab,trimslice", "nvidia,tegra20";
12 12
13 aliases { 13 aliases {
14 rtc0 = "/i2c@7000c500/rtc@56"; 14 rtc0 = "/i2c@7000c500/rtc@56";
15 rtc1 = "/rtc@7000e000"; 15 rtc1 = "/rtc@7000e000";
16 serial0 = &uarta; 16 serial0 = &uarta;
17 }; 17 };
18 18
19 chosen { 19 chosen {
20 stdout-path = "serial0:115200n 20 stdout-path = "serial0:115200n8";
21 }; 21 };
22 22
23 memory@0 { 23 memory@0 {
24 reg = <0x00000000 0x40000000>; 24 reg = <0x00000000 0x40000000>;
25 }; 25 };
26 26
27 host1x@50000000 { 27 host1x@50000000 {
28 hdmi@54280000 { 28 hdmi@54280000 {
29 status = "okay"; 29 status = "okay";
30 30
31 vdd-supply = <&hdmi_vd 31 vdd-supply = <&hdmi_vdd_reg>;
32 pll-supply = <&hdmi_pl 32 pll-supply = <&hdmi_pll_reg>;
33 33
34 nvidia,ddc-i2c-bus = < 34 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
35 nvidia,hpd-gpio = <&gp 35 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
36 GPIO_ACTIVE_HI 36 GPIO_ACTIVE_HIGH>;
37 }; 37 };
38 }; 38 };
39 39
40 pinmux@70000014 { 40 pinmux@70000014 {
41 pinctrl-names = "default"; 41 pinctrl-names = "default";
42 pinctrl-0 = <&state_default>; 42 pinctrl-0 = <&state_default>;
43 43
44 state_default: pinmux { 44 state_default: pinmux {
45 ata { 45 ata {
46 nvidia,pins = 46 nvidia,pins = "ata";
47 nvidia,functio 47 nvidia,function = "ide";
48 }; 48 };
49 atb { 49 atb {
50 nvidia,pins = 50 nvidia,pins = "atb", "gma";
51 nvidia,functio 51 nvidia,function = "sdio4";
52 }; 52 };
53 atc { 53 atc {
54 nvidia,pins = 54 nvidia,pins = "atc", "gmb";
55 nvidia,functio 55 nvidia,function = "nand";
56 }; 56 };
57 atd { 57 atd {
58 nvidia,pins = 58 nvidia,pins = "atd", "ate", "gme", "pta";
59 nvidia,functio 59 nvidia,function = "gmi";
60 }; 60 };
61 cdev1 { 61 cdev1 {
62 nvidia,pins = 62 nvidia,pins = "cdev1";
63 nvidia,functio 63 nvidia,function = "plla_out";
64 }; 64 };
65 cdev2 { 65 cdev2 {
66 nvidia,pins = 66 nvidia,pins = "cdev2";
67 nvidia,functio 67 nvidia,function = "pllp_out4";
68 }; 68 };
69 crtp { 69 crtp {
70 nvidia,pins = 70 nvidia,pins = "crtp";
71 nvidia,functio 71 nvidia,function = "crt";
72 }; 72 };
73 csus { 73 csus {
74 nvidia,pins = 74 nvidia,pins = "csus";
75 nvidia,functio 75 nvidia,function = "vi_sensor_clk";
76 }; 76 };
77 dap1 { 77 dap1 {
78 nvidia,pins = 78 nvidia,pins = "dap1";
79 nvidia,functio 79 nvidia,function = "dap1";
80 }; 80 };
81 dap2 { 81 dap2 {
82 nvidia,pins = 82 nvidia,pins = "dap2";
83 nvidia,functio 83 nvidia,function = "dap2";
84 }; 84 };
85 dap3 { 85 dap3 {
86 nvidia,pins = 86 nvidia,pins = "dap3";
87 nvidia,functio 87 nvidia,function = "dap3";
88 }; 88 };
89 dap4 { 89 dap4 {
90 nvidia,pins = 90 nvidia,pins = "dap4";
91 nvidia,functio 91 nvidia,function = "dap4";
92 }; 92 };
93 ddc { 93 ddc {
94 nvidia,pins = 94 nvidia,pins = "ddc";
95 nvidia,functio 95 nvidia,function = "i2c2";
96 }; 96 };
97 dta { 97 dta {
98 nvidia,pins = 98 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
99 nvidia,functio 99 nvidia,function = "vi";
100 }; 100 };
101 dtf { 101 dtf {
102 nvidia,pins = 102 nvidia,pins = "dtf";
103 nvidia,functio 103 nvidia,function = "i2c3";
104 }; 104 };
105 gmc { 105 gmc {
106 nvidia,pins = 106 nvidia,pins = "gmc", "gmd";
107 nvidia,functio 107 nvidia,function = "sflash";
108 }; 108 };
109 gpu { 109 gpu {
110 nvidia,pins = 110 nvidia,pins = "gpu";
111 nvidia,functio 111 nvidia,function = "uarta";
112 }; 112 };
113 gpu7 { 113 gpu7 {
114 nvidia,pins = 114 nvidia,pins = "gpu7";
115 nvidia,functio 115 nvidia,function = "rtck";
116 }; 116 };
117 gpv { 117 gpv {
118 nvidia,pins = 118 nvidia,pins = "gpv", "slxa", "slxk";
119 nvidia,functio 119 nvidia,function = "pcie";
120 }; 120 };
121 hdint { 121 hdint {
122 nvidia,pins = 122 nvidia,pins = "hdint";
123 nvidia,functio 123 nvidia,function = "hdmi";
124 }; 124 };
125 i2cp { 125 i2cp {
126 nvidia,pins = 126 nvidia,pins = "i2cp";
127 nvidia,functio 127 nvidia,function = "i2cp";
128 }; 128 };
129 irrx { 129 irrx {
130 nvidia,pins = 130 nvidia,pins = "irrx", "irtx";
131 nvidia,functio 131 nvidia,function = "uartb";
132 }; 132 };
133 kbca { 133 kbca {
134 nvidia,pins = 134 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
135 "kbce" 135 "kbce", "kbcf";
136 nvidia,functio 136 nvidia,function = "kbc";
137 }; 137 };
138 lcsn { 138 lcsn {
139 nvidia,pins = 139 nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
140 "ld3", 140 "ld3", "ld4", "ld5", "ld6", "ld7",
141 "ld8", 141 "ld8", "ld9", "ld10", "ld11", "ld12",
142 "ld13" 142 "ld13", "ld14", "ld15", "ld16", "ld17",
143 "ldc", 143 "ldc", "ldi", "lhp0", "lhp1", "lhp2",
144 "lhs", 144 "lhs", "lm0", "lm1", "lpp", "lpw0",
145 "lpw1" 145 "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
146 "lsda" 146 "lsda", "lsdi", "lspi", "lvp0", "lvp1",
147 "lvs"; 147 "lvs";
148 nvidia,functio 148 nvidia,function = "displaya";
149 }; 149 };
150 owc { 150 owc {
151 nvidia,pins = 151 nvidia,pins = "owc", "uac";
152 nvidia,functio 152 nvidia,function = "rsvd2";
153 }; 153 };
154 pmc { 154 pmc {
155 nvidia,pins = 155 nvidia,pins = "pmc";
156 nvidia,functio 156 nvidia,function = "pwr_on";
157 }; 157 };
158 rm { 158 rm {
159 nvidia,pins = 159 nvidia,pins = "rm";
160 nvidia,functio 160 nvidia,function = "i2c1";
161 }; 161 };
162 sdb { 162 sdb {
163 nvidia,pins = 163 nvidia,pins = "sdb", "sdc", "sdd";
164 nvidia,functio 164 nvidia,function = "pwm";
165 }; 165 };
166 sdio1 { 166 sdio1 {
167 nvidia,pins = 167 nvidia,pins = "sdio1";
168 nvidia,functio 168 nvidia,function = "sdio1";
169 }; 169 };
170 slxc { 170 slxc {
171 nvidia,pins = 171 nvidia,pins = "slxc", "slxd";
172 nvidia,functio 172 nvidia,function = "sdio3";
173 }; 173 };
174 spdi { 174 spdi {
175 nvidia,pins = 175 nvidia,pins = "spdi", "spdo";
176 nvidia,functio 176 nvidia,function = "spdif";
177 }; 177 };
178 spia { 178 spia {
179 nvidia,pins = 179 nvidia,pins = "spia", "spib", "spic";
180 nvidia,functio 180 nvidia,function = "spi2";
181 }; 181 };
182 spid { 182 spid {
183 nvidia,pins = 183 nvidia,pins = "spid", "spie", "spif";
184 nvidia,functio 184 nvidia,function = "spi1";
185 }; 185 };
186 spig { 186 spig {
187 nvidia,pins = 187 nvidia,pins = "spig", "spih";
188 nvidia,functio 188 nvidia,function = "spi2_alt";
189 }; 189 };
190 uaa { 190 uaa {
191 nvidia,pins = 191 nvidia,pins = "uaa", "uab", "uda";
192 nvidia,functio 192 nvidia,function = "ulpi";
193 }; 193 };
194 uad { 194 uad {
195 nvidia,pins = 195 nvidia,pins = "uad";
196 nvidia,functio 196 nvidia,function = "irda";
197 }; 197 };
198 uca { 198 uca {
199 nvidia,pins = 199 nvidia,pins = "uca", "ucb";
200 nvidia,functio 200 nvidia,function = "uartc";
201 }; 201 };
202 conf_ata { 202 conf_ata {
203 nvidia,pins = 203 nvidia,pins = "ata", "atc", "atd", "ate",
204 "crtp" 204 "crtp", "dap2", "dap3", "dap4", "dta",
205 "dtb", 205 "dtb", "dtc", "dtd", "gmb", "gme",
206 "i2cp" 206 "i2cp", "pta", "slxc", "slxd", "spdi",
207 "spdo" 207 "spdo", "uda";
208 nvidia,pull = 208 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
209 nvidia,tristat 209 nvidia,tristate = <TEGRA_PIN_ENABLE>;
210 }; 210 };
211 conf_atb { 211 conf_atb {
212 nvidia,pins = 212 nvidia,pins = "atb", "cdev1", "cdev2", "dap1",
213 "dte", 213 "dte", "gma", "gmc", "gmd", "gpu",
214 "gpu7" 214 "gpu7", "gpv", "sdio1", "slxa", "slxk",
215 "uac"; 215 "uac";
216 nvidia,pull = 216 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
217 nvidia,tristat 217 nvidia,tristate = <TEGRA_PIN_DISABLE>;
218 }; 218 };
219 conf_ck32 { 219 conf_ck32 {
220 nvidia,pins = 220 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
221 "pmcc" 221 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
222 nvidia,pull = 222 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
223 }; 223 };
224 conf_csus { 224 conf_csus {
225 nvidia,pins = 225 nvidia,pins = "csus", "spia", "spib",
226 "spid" 226 "spid", "spif";
227 nvidia,pull = 227 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
228 nvidia,tristat 228 nvidia,tristate = <TEGRA_PIN_ENABLE>;
229 }; 229 };
230 conf_ddc { 230 conf_ddc {
231 nvidia,pins = 231 nvidia,pins = "ddc", "dtf", "rm", "sdc", "sdd";
232 nvidia,pull = 232 nvidia,pull = <TEGRA_PIN_PULL_UP>;
233 nvidia,tristat 233 nvidia,tristate = <TEGRA_PIN_DISABLE>;
234 }; 234 };
235 conf_hdint { 235 conf_hdint {
236 nvidia,pins = 236 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
237 "lpw1" 237 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
238 "lvp0" 238 "lvp0", "pmc";
239 nvidia,tristat 239 nvidia,tristate = <TEGRA_PIN_ENABLE>;
240 }; 240 };
241 conf_irrx { 241 conf_irrx {
242 nvidia,pins = 242 nvidia,pins = "irrx", "irtx", "kbca", "kbcb",
243 "kbcc" 243 "kbcc", "kbcd", "kbce", "kbcf", "owc",
244 "spic" 244 "spic", "spie", "spig", "spih", "uaa",
245 "uab", 245 "uab", "uad", "uca", "ucb";
246 nvidia,pull = 246 nvidia,pull = <TEGRA_PIN_PULL_UP>;
247 nvidia,tristat 247 nvidia,tristate = <TEGRA_PIN_ENABLE>;
248 }; 248 };
249 conf_lc { 249 conf_lc {
250 nvidia,pins = 250 nvidia,pins = "lc", "ls";
251 nvidia,pull = 251 nvidia,pull = <TEGRA_PIN_PULL_UP>;
252 }; 252 };
253 conf_ld0 { 253 conf_ld0 {
254 nvidia,pins = 254 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
255 "ld5", 255 "ld5", "ld6", "ld7", "ld8", "ld9",
256 "ld10" 256 "ld10", "ld11", "ld12", "ld13", "ld14",
257 "ld15" 257 "ld15", "ld16", "ld17", "ldi", "lhp0",
258 "lhp1" 258 "lhp1", "lhp2", "lhs", "lm0", "lpp",
259 "lpw0" 259 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
260 "lvs", 260 "lvs", "sdb";
261 nvidia,tristat 261 nvidia,tristate = <TEGRA_PIN_DISABLE>;
262 }; 262 };
263 conf_ld17_0 { 263 conf_ld17_0 {
264 nvidia,pins = 264 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
265 "ld23_ 265 "ld23_22";
266 nvidia,pull = 266 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
267 }; 267 };
268 conf_spif { 268 conf_spif {
269 nvidia,pins = 269 nvidia,pins = "spif";
270 nvidia,pull = 270 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
271 nvidia,tristat 271 nvidia,tristate = <TEGRA_PIN_DISABLE>;
272 }; 272 };
273 }; 273 };
274 }; 274 };
275 275
276 i2s@70002800 { 276 i2s@70002800 {
277 status = "okay"; 277 status = "okay";
278 }; 278 };
279 279
280 serial@70006000 { 280 serial@70006000 {
281 /delete-property/ dmas; 281 /delete-property/ dmas;
282 /delete-property/ dma-names; 282 /delete-property/ dma-names;
283 status = "okay"; 283 status = "okay";
284 }; 284 };
285 285
286 dvi_ddc: i2c@7000c000 { 286 dvi_ddc: i2c@7000c000 {
287 status = "okay"; 287 status = "okay";
288 clock-frequency = <100000>; 288 clock-frequency = <100000>;
289 }; 289 };
290 290
291 spi@7000c380 { 291 spi@7000c380 {
292 status = "okay"; 292 status = "okay";
293 spi-max-frequency = <48000000> 293 spi-max-frequency = <48000000>;
294 294
295 flash@0 { 295 flash@0 {
296 compatible = "winbond, 296 compatible = "winbond,w25q80bl", "jedec,spi-nor";
297 reg = <0>; 297 reg = <0>;
298 spi-max-frequency = <4 298 spi-max-frequency = <48000000>;
299 }; 299 };
300 }; 300 };
301 301
302 hdmi_ddc: i2c@7000c400 { 302 hdmi_ddc: i2c@7000c400 {
303 status = "okay"; 303 status = "okay";
304 clock-frequency = <100000>; 304 clock-frequency = <100000>;
305 }; 305 };
306 306
307 i2c@7000c500 { 307 i2c@7000c500 {
308 status = "okay"; 308 status = "okay";
309 clock-frequency = <400000>; 309 clock-frequency = <400000>;
310 310
311 codec: codec@1a { 311 codec: codec@1a {
312 compatible = "ti,tlv32 312 compatible = "ti,tlv320aic23";
313 reg = <0x1a>; 313 reg = <0x1a>;
314 }; 314 };
315 315
316 rtc@56 { 316 rtc@56 {
317 compatible = "emmicro, 317 compatible = "emmicro,em3027";
318 reg = <0x56>; 318 reg = <0x56>;
319 }; 319 };
320 }; 320 };
321 321
322 pmc@7000e400 { 322 pmc@7000e400 {
323 nvidia,suspend-mode = <1>; 323 nvidia,suspend-mode = <1>;
324 nvidia,cpu-pwr-good-time = <50 324 nvidia,cpu-pwr-good-time = <5000>;
325 nvidia,cpu-pwr-off-time = <500 325 nvidia,cpu-pwr-off-time = <5000>;
326 nvidia,core-pwr-good-time = <3 326 nvidia,core-pwr-good-time = <3845 3845>;
327 nvidia,core-pwr-off-time = <38 327 nvidia,core-pwr-off-time = <3875>;
328 nvidia,sys-clock-req-active-hi 328 nvidia,sys-clock-req-active-high;
329 core-supply = <&vdd_core>; 329 core-supply = <&vdd_core>;
330 }; 330 };
331 331
332 pcie@80003000 { 332 pcie@80003000 {
333 status = "okay"; 333 status = "okay";
334 334
335 avdd-pex-supply = <&pci_vdd_re 335 avdd-pex-supply = <&pci_vdd_reg>;
336 vdd-pex-supply = <&pci_vdd_reg 336 vdd-pex-supply = <&pci_vdd_reg>;
337 avdd-pex-pll-supply = <&pci_vd 337 avdd-pex-pll-supply = <&pci_vdd_reg>;
338 avdd-plle-supply = <&pci_vdd_r 338 avdd-plle-supply = <&pci_vdd_reg>;
339 vddio-pex-clk-supply = <&pci_c 339 vddio-pex-clk-supply = <&pci_clk_reg>;
340 340
341 pci@1,0 { 341 pci@1,0 {
342 status = "okay"; 342 status = "okay";
343 }; 343 };
344 }; 344 };
345 345
346 usb@c5000000 { 346 usb@c5000000 {
347 status = "okay"; 347 status = "okay";
348 }; 348 };
349 349
350 usb-phy@c5000000 { 350 usb-phy@c5000000 {
351 status = "okay"; 351 status = "okay";
352 vbus-supply = <&vbus_reg>; 352 vbus-supply = <&vbus_reg>;
353 }; 353 };
354 354
355 usb@c5004000 { 355 usb@c5004000 {
356 status = "okay"; 356 status = "okay";
357 }; 357 };
358 358
359 usb-phy@c5004000 { 359 usb-phy@c5004000 {
360 status = "okay"; 360 status = "okay";
361 nvidia,phy-reset-gpio = <&gpio 361 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
362 GPIO_ACTIVE_LOW>; 362 GPIO_ACTIVE_LOW>;
363 }; 363 };
364 364
365 usb@c5008000 { 365 usb@c5008000 {
366 status = "okay"; 366 status = "okay";
367 }; 367 };
368 368
369 usb-phy@c5008000 { 369 usb-phy@c5008000 {
370 status = "okay"; 370 status = "okay";
371 }; 371 };
372 372
373 mmc@c8000000 { 373 mmc@c8000000 {
374 status = "okay"; 374 status = "okay";
375 broken-cd; 375 broken-cd;
376 bus-width = <4>; 376 bus-width = <4>;
377 }; 377 };
378 378
379 mmc@c8000600 { 379 mmc@c8000600 {
380 status = "okay"; 380 status = "okay";
381 cd-gpios = <&gpio TEGRA_GPIO(P 381 cd-gpios = <&gpio TEGRA_GPIO(P, 1) GPIO_ACTIVE_LOW>;
382 wp-gpios = <&gpio TEGRA_GPIO(P 382 wp-gpios = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
383 bus-width = <4>; 383 bus-width = <4>;
384 }; 384 };
385 385
386 clk32k_in: clock-32k { 386 clk32k_in: clock-32k {
387 compatible = "fixed-clock"; 387 compatible = "fixed-clock";
388 clock-frequency = <32768>; 388 clock-frequency = <32768>;
389 #clock-cells = <0>; 389 #clock-cells = <0>;
390 }; 390 };
391 391
392 cpus { 392 cpus {
393 cpu0: cpu@0 { 393 cpu0: cpu@0 {
394 operating-points-v2 = 394 operating-points-v2 = <&cpu0_opp_table>;
395 }; 395 };
396 396
397 cpu@1 { 397 cpu@1 {
398 operating-points-v2 = 398 operating-points-v2 = <&cpu0_opp_table>;
399 }; 399 };
400 }; 400 };
401 401
402 gpio-keys { 402 gpio-keys {
403 compatible = "gpio-keys"; 403 compatible = "gpio-keys";
404 404
405 key-power { 405 key-power {
406 label = "Power"; 406 label = "Power";
407 gpios = <&gpio TEGRA_G 407 gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>;
408 linux,code = <KEY_POWE 408 linux,code = <KEY_POWER>;
409 wakeup-source; 409 wakeup-source;
410 }; 410 };
411 }; 411 };
412 412
413 leds { 413 leds {
414 compatible = "gpio-leds"; 414 compatible = "gpio-leds";
415 415
416 led-ds2 { 416 led-ds2 {
417 color = <LED_COLOR_ID_ 417 color = <LED_COLOR_ID_GREEN>;
418 function = LED_FUNCTIO 418 function = LED_FUNCTION_INDICATOR;
419 function-enumerator = 419 function-enumerator = <2>;
420 gpios = <&gpio TEGRA_G 420 gpios = <&gpio TEGRA_GPIO(D, 2) GPIO_ACTIVE_LOW>;
421 }; 421 };
422 422
423 led-ds3 { 423 led-ds3 {
424 color = <LED_COLOR_ID_ 424 color = <LED_COLOR_ID_GREEN>;
425 function = LED_FUNCTIO 425 function = LED_FUNCTION_INDICATOR;
426 function-enumerator = 426 function-enumerator = <3>;
427 gpios = <&gpio TEGRA_G 427 gpios = <&gpio TEGRA_GPIO(BB, 5) GPIO_ACTIVE_LOW>;
428 }; 428 };
429 }; 429 };
430 430
431 poweroff { 431 poweroff {
432 compatible = "gpio-poweroff"; 432 compatible = "gpio-poweroff";
433 gpios = <&gpio TEGRA_GPIO(X, 7 433 gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>;
434 }; 434 };
435 435
436 hdmi_vdd_reg: regulator-hdmi { 436 hdmi_vdd_reg: regulator-hdmi {
437 compatible = "regulator-fixed" 437 compatible = "regulator-fixed";
438 regulator-name = "avdd_hdmi"; 438 regulator-name = "avdd_hdmi";
439 regulator-min-microvolt = <330 439 regulator-min-microvolt = <3300000>;
440 regulator-max-microvolt = <330 440 regulator-max-microvolt = <3300000>;
441 regulator-always-on; 441 regulator-always-on;
442 }; 442 };
443 443
444 hdmi_pll_reg: regulator-hdmipll { 444 hdmi_pll_reg: regulator-hdmipll {
445 compatible = "regulator-fixed" 445 compatible = "regulator-fixed";
446 regulator-name = "avdd_hdmi_pl 446 regulator-name = "avdd_hdmi_pll";
447 regulator-min-microvolt = <180 447 regulator-min-microvolt = <1800000>;
448 regulator-max-microvolt = <180 448 regulator-max-microvolt = <1800000>;
449 regulator-always-on; 449 regulator-always-on;
450 }; 450 };
451 451
452 vbus_reg: regulator-vbus { 452 vbus_reg: regulator-vbus {
453 compatible = "regulator-fixed" 453 compatible = "regulator-fixed";
454 regulator-name = "usb1_vbus"; 454 regulator-name = "usb1_vbus";
455 regulator-min-microvolt = <500 455 regulator-min-microvolt = <5000000>;
456 regulator-max-microvolt = <500 456 regulator-max-microvolt = <5000000>;
457 enable-active-high; 457 enable-active-high;
458 gpio = <&gpio TEGRA_GPIO(V, 2) 458 gpio = <&gpio TEGRA_GPIO(V, 2) 0>;
459 regulator-always-on; 459 regulator-always-on;
460 regulator-boot-on; 460 regulator-boot-on;
461 }; 461 };
462 462
463 pci_clk_reg: regulator-pciclk { 463 pci_clk_reg: regulator-pciclk {
464 compatible = "regulator-fixed" 464 compatible = "regulator-fixed";
465 regulator-name = "pci_clk"; 465 regulator-name = "pci_clk";
466 regulator-min-microvolt = <330 466 regulator-min-microvolt = <3300000>;
467 regulator-max-microvolt = <330 467 regulator-max-microvolt = <3300000>;
468 regulator-always-on; 468 regulator-always-on;
469 }; 469 };
470 470
471 pci_vdd_reg: regulator-pcivdd { 471 pci_vdd_reg: regulator-pcivdd {
472 compatible = "regulator-fixed" 472 compatible = "regulator-fixed";
473 regulator-name = "pci_vdd"; 473 regulator-name = "pci_vdd";
474 regulator-min-microvolt = <105 474 regulator-min-microvolt = <1050000>;
475 regulator-max-microvolt = <105 475 regulator-max-microvolt = <1050000>;
476 regulator-always-on; 476 regulator-always-on;
477 }; 477 };
478 478
479 vdd_core: regulator-core { 479 vdd_core: regulator-core {
480 compatible = "regulator-fixed" 480 compatible = "regulator-fixed";
481 regulator-name = "vdd_core"; 481 regulator-name = "vdd_core";
482 regulator-min-microvolt = <130 482 regulator-min-microvolt = <1300000>;
483 regulator-max-microvolt = <130 483 regulator-max-microvolt = <1300000>;
484 regulator-always-on; 484 regulator-always-on;
485 }; 485 };
486 486
487 sound { 487 sound {
488 compatible = "nvidia,tegra-aud 488 compatible = "nvidia,tegra-audio-trimslice";
489 nvidia,i2s-controller = <&tegr 489 nvidia,i2s-controller = <&tegra_i2s1>;
490 nvidia,audio-codec = <&codec>; 490 nvidia,audio-codec = <&codec>;
491 491
492 clocks = <&tegra_car TEGRA20_C 492 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
493 <&tegra_car TEGRA20_C 493 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
494 <&tegra_car TEGRA20_C 494 <&tegra_car TEGRA20_CLK_CDEV1>;
495 clock-names = "pll_a", "pll_a_ 495 clock-names = "pll_a", "pll_a_out0", "mclk";
496 }; 496 };
497 }; 497 };
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