1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 2
3 / { 3 / {
4 memory-controller@7000f000 { 4 memory-controller@7000f000 {
5 emc-timings-0 { 5 emc-timings-0 {
6 nvidia,ram-code = <0>; 6 nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */
7 7
8 timing-25500000 { 8 timing-25500000 {
9 clock-frequenc 9 clock-frequency = <25500000>;
10 10
11 nvidia,emem-co 11 nvidia,emem-configuration = <
12 0x0002 12 0x00020001 /* MC_EMEM_ARB_CFG */
13 0xc000 13 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */
14 0x0000 14 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
15 0x0000 15 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
16 0x0000 16 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
17 0x0000 17 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
18 0x0000 18 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
19 0x0000 19 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
20 0x0000 20 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
21 0x0000 21 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
22 0x0000 22 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
23 0x0000 23 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
24 0x0000 24 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
25 0x0000 25 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
26 0x0602 26 0x06020102 /* MC_EMEM_ARB_DA_TURNS */
27 0x000a 27 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
28 0x7483 28 0x74830303 /* MC_EMEM_ARB_MISC0 */
29 0x001f 29 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
30 >; 30 >;
31 }; 31 };
32 32
33 timing-51000000 { 33 timing-51000000 {
34 clock-frequenc 34 clock-frequency = <51000000>;
35 35
36 nvidia,emem-co 36 nvidia,emem-configuration = <
37 0x0001 37 0x00010001 /* MC_EMEM_ARB_CFG */
38 0xc000 38 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */
39 0x0000 39 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
40 0x0000 40 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
41 0x0000 41 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
42 0x0000 42 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
43 0x0000 43 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
44 0x0000 44 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
45 0x0000 45 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
46 0x0000 46 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
47 0x0000 47 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
48 0x0000 48 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
49 0x0000 49 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
50 0x0000 50 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
51 0x0602 51 0x06020102 /* MC_EMEM_ARB_DA_TURNS */
52 0x000a 52 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
53 0x7343 53 0x73430303 /* MC_EMEM_ARB_MISC0 */
54 0x001f 54 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
55 >; 55 >;
56 }; 56 };
57 57
58 timing-102000000 { 58 timing-102000000 {
59 clock-frequenc 59 clock-frequency = <102000000>;
60 60
61 nvidia,emem-co 61 nvidia,emem-configuration = <
62 0x0000 62 0x00000001 /* MC_EMEM_ARB_CFG */
63 0xc000 63 0xc0000030 /* MC_EMEM_ARB_OUTSTANDING_REQ */
64 0x0000 64 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
65 0x0000 65 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
66 0x0000 66 0x00000003 /* MC_EMEM_ARB_TIMING_RC */
67 0x0000 67 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
68 0x0000 68 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
69 0x0000 69 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
70 0x0000 70 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
71 0x0000 71 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
72 0x0000 72 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
73 0x0000 73 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
74 0x0000 74 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
75 0x0000 75 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
76 0x0602 76 0x06020102 /* MC_EMEM_ARB_DA_TURNS */
77 0x000a 77 0x000a0503 /* MC_EMEM_ARB_DA_COVERS */
78 0x7283 78 0x72830504 /* MC_EMEM_ARB_MISC0 */
79 0x001f 79 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
80 >; 80 >;
81 }; 81 };
82 82
83 timing-204000000 { 83 timing-204000000 {
84 clock-frequenc 84 clock-frequency = <204000000>;
85 85
86 nvidia,emem-co 86 nvidia,emem-configuration = <
87 0x0000 87 0x00000003 /* MC_EMEM_ARB_CFG */
88 0xc000 88 0xc0000025 /* MC_EMEM_ARB_OUTSTANDING_REQ */
89 0x0000 89 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
90 0x0000 90 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
91 0x0000 91 0x00000005 /* MC_EMEM_ARB_TIMING_RC */
92 0x0000 92 0x00000002 /* MC_EMEM_ARB_TIMING_RAS */
93 0x0000 93 0x00000003 /* MC_EMEM_ARB_TIMING_FAW */
94 0x0000 94 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
95 0x0000 95 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
96 0x0000 96 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
97 0x0000 97 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
98 0x0000 98 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
99 0x0000 99 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
100 0x0000 100 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
101 0x0602 101 0x06020102 /* MC_EMEM_ARB_DA_TURNS */
102 0x000a 102 0x000a0505 /* MC_EMEM_ARB_DA_COVERS */
103 0x7244 103 0x72440a06 /* MC_EMEM_ARB_MISC0 */
104 0x001f 104 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
105 >; 105 >;
106 }; 106 };
107 107
108 timing-333500000 { 108 timing-333500000 {
109 clock-frequenc 109 clock-frequency = <333500000>;
110 110
111 nvidia,emem-co 111 nvidia,emem-configuration = <
112 0x0000 112 0x00000005 /* MC_EMEM_ARB_CFG */
113 0xc000 113 0xc000003d /* MC_EMEM_ARB_OUTSTANDING_REQ */
114 0x0000 114 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
115 0x0000 115 0x00000002 /* MC_EMEM_ARB_TIMING_RP */
116 0x0000 116 0x00000008 /* MC_EMEM_ARB_TIMING_RC */
117 0x0000 117 0x00000004 /* MC_EMEM_ARB_TIMING_RAS */
118 0x0000 118 0x00000004 /* MC_EMEM_ARB_TIMING_FAW */
119 0x0000 119 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
120 0x0000 120 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
121 0x0000 121 0x00000007 /* MC_EMEM_ARB_TIMING_WAP2PRE */
122 0x0000 122 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
123 0x0000 123 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
124 0x0000 124 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
125 0x0000 125 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
126 0x0603 126 0x06030202 /* MC_EMEM_ARB_DA_TURNS */
127 0x000b 127 0x000b0608 /* MC_EMEM_ARB_DA_COVERS */
128 0x7085 128 0x70850f09 /* MC_EMEM_ARB_MISC0 */
129 0x001f 129 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
130 >; 130 >;
131 }; 131 };
132 132
133 timing-667000000 { 133 timing-667000000 {
134 clock-frequenc 134 clock-frequency = <667000000>;
135 135
136 nvidia,emem-co 136 nvidia,emem-configuration = <
137 0x0000 137 0x0000000a /* MC_EMEM_ARB_CFG */
138 0xc000 138 0xc0000079 /* MC_EMEM_ARB_OUTSTANDING_REQ */
139 0x0000 139 0x00000003 /* MC_EMEM_ARB_TIMING_RCD */
140 0x0000 140 0x00000004 /* MC_EMEM_ARB_TIMING_RP */
141 0x0000 141 0x00000010 /* MC_EMEM_ARB_TIMING_RC */
142 0x0000 142 0x0000000b /* MC_EMEM_ARB_TIMING_RAS */
143 0x0000 143 0x0000000a /* MC_EMEM_ARB_TIMING_FAW */
144 0x0000 144 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
145 0x0000 145 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
146 0x0000 146 0x0000000b /* MC_EMEM_ARB_TIMING_WAP2PRE */
147 0x0000 147 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
148 0x0000 148 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
149 0x0000 149 0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
150 0x0000 150 0x00000008 /* MC_EMEM_ARB_TIMING_W2R */
151 0x0804 151 0x08040202 /* MC_EMEM_ARB_DA_TURNS */
152 0x0013 152 0x00130b10 /* MC_EMEM_ARB_DA_COVERS */
153 0x70ea 153 0x70ea1f11 /* MC_EMEM_ARB_MISC0 */
154 0x001f 154 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
155 >; 155 >;
156 }; 156 };
157 }; 157 };
158 158
159 emc-timings-1 { 159 emc-timings-1 {
160 nvidia,ram-code = <1>; 160 nvidia,ram-code = <1>; /* Hynix H5TC2G83CFR */
161 161
162 timing-25500000 { 162 timing-25500000 {
163 clock-frequenc 163 clock-frequency = <25500000>;
164 164
165 nvidia,emem-co 165 nvidia,emem-configuration = <
166 0x0002 166 0x00020001 /* MC_EMEM_ARB_CFG */
167 0xc000 167 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */
168 0x0000 168 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
169 0x0000 169 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
170 0x0000 170 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
171 0x0000 171 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
172 0x0000 172 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
173 0x0000 173 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
174 0x0000 174 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
175 0x0000 175 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
176 0x0000 176 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
177 0x0000 177 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
178 0x0000 178 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
179 0x0000 179 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
180 0x0602 180 0x06020102 /* MC_EMEM_ARB_DA_TURNS */
181 0x000a 181 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
182 0x7483 182 0x74830303 /* MC_EMEM_ARB_MISC0 */
183 0x001f 183 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
184 >; 184 >;
185 }; 185 };
186 186
187 timing-51000000 { 187 timing-51000000 {
188 clock-frequenc 188 clock-frequency = <51000000>;
189 189
190 nvidia,emem-co 190 nvidia,emem-configuration = <
191 0x0001 191 0x00010001 /* MC_EMEM_ARB_CFG */
192 0xc000 192 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */
193 0x0000 193 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
194 0x0000 194 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
195 0x0000 195 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
196 0x0000 196 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
197 0x0000 197 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
198 0x0000 198 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
199 0x0000 199 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
200 0x0000 200 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
201 0x0000 201 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
202 0x0000 202 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
203 0x0000 203 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
204 0x0000 204 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
205 0x0602 205 0x06020102 /* MC_EMEM_ARB_DA_TURNS */
206 0x000a 206 0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
207 0x7343 207 0x73430303 /* MC_EMEM_ARB_MISC0 */
208 0x001f 208 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
209 >; 209 >;
210 }; 210 };
211 211
212 timing-102000000 { 212 timing-102000000 {
213 clock-frequenc 213 clock-frequency = <102000000>;
214 214
215 nvidia,emem-co 215 nvidia,emem-configuration = <
216 0x0000 216 0x00000001 /* MC_EMEM_ARB_CFG */
217 0xc000 217 0xc0000030 /* MC_EMEM_ARB_OUTSTANDING_REQ */
218 0x0000 218 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
219 0x0000 219 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
220 0x0000 220 0x00000003 /* MC_EMEM_ARB_TIMING_RC */
221 0x0000 221 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
222 0x0000 222 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
223 0x0000 223 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
224 0x0000 224 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
225 0x0000 225 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
226 0x0000 226 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
227 0x0000 227 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
228 0x0000 228 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
229 0x0000 229 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
230 0x0602 230 0x06020102 /* MC_EMEM_ARB_DA_TURNS */
231 0x000a 231 0x000a0503 /* MC_EMEM_ARB_DA_COVERS */
232 0x7283 232 0x72830504 /* MC_EMEM_ARB_MISC0 */
233 0x001f 233 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
234 >; 234 >;
235 }; 235 };
236 236
237 timing-204000000 { 237 timing-204000000 {
238 clock-frequenc 238 clock-frequency = <204000000>;
239 239
240 nvidia,emem-co 240 nvidia,emem-configuration = <
241 0x0000 241 0x00000003 /* MC_EMEM_ARB_CFG */
242 0xc000 242 0xc0000025 /* MC_EMEM_ARB_OUTSTANDING_REQ */
243 0x0000 243 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
244 0x0000 244 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
245 0x0000 245 0x00000005 /* MC_EMEM_ARB_TIMING_RC */
246 0x0000 246 0x00000002 /* MC_EMEM_ARB_TIMING_RAS */
247 0x0000 247 0x00000003 /* MC_EMEM_ARB_TIMING_FAW */
248 0x0000 248 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
249 0x0000 249 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
250 0x0000 250 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
251 0x0000 251 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
252 0x0000 252 0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
253 0x0000 253 0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
254 0x0000 254 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
255 0x0602 255 0x06020102 /* MC_EMEM_ARB_DA_TURNS */
256 0x000a 256 0x000a0505 /* MC_EMEM_ARB_DA_COVERS */
257 0x7244 257 0x72440a06 /* MC_EMEM_ARB_MISC0 */
258 0x001f 258 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
259 >; 259 >;
260 }; 260 };
261 261
262 timing-333500000 { 262 timing-333500000 {
263 clock-frequenc 263 clock-frequency = <333500000>;
264 264
265 nvidia,emem-co 265 nvidia,emem-configuration = <
266 0x0000 266 0x00000005 /* MC_EMEM_ARB_CFG */
267 0xc000 267 0xc000003d /* MC_EMEM_ARB_OUTSTANDING_REQ */
268 0x0000 268 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
269 0x0000 269 0x00000002 /* MC_EMEM_ARB_TIMING_RP */
270 0x0000 270 0x00000008 /* MC_EMEM_ARB_TIMING_RC */
271 0x0000 271 0x00000004 /* MC_EMEM_ARB_TIMING_RAS */
272 0x0000 272 0x00000004 /* MC_EMEM_ARB_TIMING_FAW */
273 0x0000 273 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
274 0x0000 274 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
275 0x0000 275 0x00000007 /* MC_EMEM_ARB_TIMING_WAP2PRE */
276 0x0000 276 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
277 0x0000 277 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
278 0x0000 278 0x00000003 /* MC_EMEM_ARB_TIMING_R2W */
279 0x0000 279 0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
280 0x0603 280 0x06030202 /* MC_EMEM_ARB_DA_TURNS */
281 0x000b 281 0x000b0608 /* MC_EMEM_ARB_DA_COVERS */
282 0x7085 282 0x70850f09 /* MC_EMEM_ARB_MISC0 */
283 0x001f 283 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
284 >; 284 >;
285 }; 285 };
286 286
287 timing-667000000 { 287 timing-667000000 {
288 clock-frequenc 288 clock-frequency = <667000000>;
289 289
290 nvidia,emem-co 290 nvidia,emem-configuration = <
291 0x0000 291 0x0000000a /* MC_EMEM_ARB_CFG */
292 0xc000 292 0xc0000079 /* MC_EMEM_ARB_OUTSTANDING_REQ */
293 0x0000 293 0x00000003 /* MC_EMEM_ARB_TIMING_RCD */
294 0x0000 294 0x00000004 /* MC_EMEM_ARB_TIMING_RP */
295 0x0000 295 0x00000010 /* MC_EMEM_ARB_TIMING_RC */
296 0x0000 296 0x0000000b /* MC_EMEM_ARB_TIMING_RAS */
297 0x0000 297 0x0000000a /* MC_EMEM_ARB_TIMING_FAW */
298 0x0000 298 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
299 0x0000 299 0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
300 0x0000 300 0x0000000b /* MC_EMEM_ARB_TIMING_WAP2PRE */
301 0x0000 301 0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
302 0x0000 302 0x00000002 /* MC_EMEM_ARB_TIMING_W2W */
303 0x0000 303 0x00000004 /* MC_EMEM_ARB_TIMING_R2W */
304 0x0000 304 0x00000008 /* MC_EMEM_ARB_TIMING_W2R */
305 0x0804 305 0x08040202 /* MC_EMEM_ARB_DA_TURNS */
306 0x0013 306 0x00130b10 /* MC_EMEM_ARB_DA_COVERS */
307 0x70ea 307 0x70ea1f11 /* MC_EMEM_ARB_MISC0 */
308 0x001f 308 0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
309 >; 309 >;
310 }; 310 };
311 }; 311 };
312 }; 312 };
313 313
314 memory-controller@7000f400 { 314 memory-controller@7000f400 {
315 emc-timings-0 { 315 emc-timings-0 {
316 nvidia,ram-code = <0>; 316 nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */
317 317
318 timing-25500000 { 318 timing-25500000 {
319 clock-frequenc 319 clock-frequency = <25500000>;
320 320
321 nvidia,emc-aut 321 nvidia,emc-auto-cal-interval = <0x001fffff>;
322 nvidia,emc-mod 322 nvidia,emc-mode-1 = <0x80100003>;
323 nvidia,emc-mod 323 nvidia,emc-mode-2 = <0x80200008>;
324 nvidia,emc-mod 324 nvidia,emc-mode-reset = <0x80001221>;
325 nvidia,emc-zca 325 nvidia,emc-zcal-cnt-long = <0x00000040>;
326 nvidia,emc-cfg 326 nvidia,emc-cfg-dyn-self-ref;
327 nvidia,emc-cfg 327 nvidia,emc-cfg-periodic-qrst;
328 328
329 nvidia,emc-con 329 nvidia,emc-configuration = <
330 0x0000 330 0x00000001 /* EMC_RC */
331 0x0000 331 0x00000004 /* EMC_RFC */
332 0x0000 332 0x00000000 /* EMC_RAS */
333 0x0000 333 0x00000000 /* EMC_RP */
334 0x0000 334 0x00000002 /* EMC_R2W */
335 0x0000 335 0x0000000a /* EMC_W2R */
336 0x0000 336 0x00000005 /* EMC_R2P */
337 0x0000 337 0x0000000b /* EMC_W2P */
338 0x0000 338 0x00000000 /* EMC_RD_RCD */
339 0x0000 339 0x00000000 /* EMC_WR_RCD */
340 0x0000 340 0x00000003 /* EMC_RRD */
341 0x0000 341 0x00000001 /* EMC_REXT */
342 0x0000 342 0x00000000 /* EMC_WEXT */
343 0x0000 343 0x00000005 /* EMC_WDV */
344 0x0000 344 0x00000005 /* EMC_QUSE */
345 0x0000 345 0x00000004 /* EMC_QRST */
346 0x0000 346 0x0000000a /* EMC_QSAFE */
347 0x0000 347 0x0000000b /* EMC_RDV */
348 0x0000 348 0x000000c0 /* EMC_REFRESH */
349 0x0000 349 0x00000000 /* EMC_BURST_REFRESH_NUM */
350 0x0000 350 0x00000030 /* EMC_PRE_REFRESH_REQ_CNT */
351 0x0000 351 0x00000002 /* EMC_PDEX2WR */
352 0x0000 352 0x00000002 /* EMC_PDEX2RD */
353 0x0000 353 0x00000001 /* EMC_PCHG2PDEN */
354 0x0000 354 0x00000000 /* EMC_ACT2PDEN */
355 0x0000 355 0x00000007 /* EMC_AR2PDEN */
356 0x0000 356 0x0000000f /* EMC_RW2PDEN */
357 0x0000 357 0x00000005 /* EMC_TXSR */
358 0x0000 358 0x00000005 /* EMC_TXSRDLL */
359 0x0000 359 0x00000004 /* EMC_TCKE */
360 0x0000 360 0x00000001 /* EMC_TFAW */
361 0x0000 361 0x00000000 /* EMC_TRPAB */
362 0x0000 362 0x00000004 /* EMC_TCLKSTABLE */
363 0x0000 363 0x00000005 /* EMC_TCLKSTOP */
364 0x0000 364 0x000000c7 /* EMC_TREFBW */
365 0x0000 365 0x00000006 /* EMC_QUSE_EXTRA */
366 0x0000 366 0x00000004 /* EMC_FBIO_CFG6 */
367 0x0000 367 0x00000000 /* EMC_ODT_WRITE */
368 0x0000 368 0x00000000 /* EMC_ODT_READ */
369 0x0000 369 0x00004288 /* EMC_FBIO_CFG5 */
370 0x0078 370 0x007800a4 /* EMC_CFG_DIG_DLL */
371 0x0000 371 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
372 0x000f 372 0x000fc000 /* EMC_DLL_XFORM_DQS0 */
373 0x000f 373 0x000fc000 /* EMC_DLL_XFORM_DQS1 */
374 0x000f 374 0x000fc000 /* EMC_DLL_XFORM_DQS2 */
375 0x000f 375 0x000fc000 /* EMC_DLL_XFORM_DQS3 */
376 0x000f 376 0x000fc000 /* EMC_DLL_XFORM_DQS4 */
377 0x000f 377 0x000fc000 /* EMC_DLL_XFORM_DQS5 */
378 0x000f 378 0x000fc000 /* EMC_DLL_XFORM_DQS6 */
379 0x000f 379 0x000fc000 /* EMC_DLL_XFORM_DQS7 */
380 0x0000 380 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
381 0x0000 381 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
382 0x0000 382 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
383 0x0000 383 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
384 0x0000 384 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
385 0x0000 385 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
386 0x0000 386 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
387 0x0000 387 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
388 0x0000 388 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
389 0x0000 389 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
390 0x0000 390 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
391 0x0000 391 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
392 0x0000 392 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
393 0x0000 393 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
394 0x0000 394 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
395 0x0000 395 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
396 0x000f 396 0x000fc000 /* EMC_DLL_XFORM_DQ0 */
397 0x000f 397 0x000fc000 /* EMC_DLL_XFORM_DQ1 */
398 0x000f 398 0x000fc000 /* EMC_DLL_XFORM_DQ2 */
399 0x000f 399 0x000fc000 /* EMC_DLL_XFORM_DQ3 */
400 0x0000 400 0x000002a0 /* EMC_XM2CMDPADCTRL */
401 0x0800 401 0x0800211c /* EMC_XM2DQSPADCTRL2 */
402 0x0000 402 0x00000000 /* EMC_XM2DQPADCTRL2 */
403 0x77ff 403 0x77fff884 /* EMC_XM2CLKPADCTRL */
404 0x01f1 404 0x01f1f108 /* EMC_XM2COMPPADCTRL */
405 0x0505 405 0x05057404 /* EMC_XM2VTTGENPADCTRL */
406 0x5400 406 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
407 0x0800 407 0x08000168 /* EMC_XM2QUSEPADCTRL */
408 0x0800 408 0x08000000 /* EMC_XM2DQSPADCTRL3 */
409 0x0000 409 0x00000802 /* EMC_CTT_TERM_CTRL */
410 0x0000 410 0x00000000 /* EMC_ZCAL_INTERVAL */
411 0x0000 411 0x00000040 /* EMC_ZCAL_WAIT_CNT */
412 0x000c 412 0x000c000c /* EMC_MRS_WAIT_CNT */
413 0xa0f1 413 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
414 0x0000 414 0x00000000 /* EMC_CTT */
415 0x0000 415 0x00000000 /* EMC_CTT_DURATION */
416 0x8000 416 0x80000287 /* EMC_DYN_SELF_REF_CONTROL */
417 0xe800 417 0xe8000000 /* EMC_FBIO_SPARE */
418 0xff00 418 0xff00ff00 /* EMC_CFG_RSV */
419 >; 419 >;
420 }; 420 };
421 421
422 timing-51000000 { 422 timing-51000000 {
423 clock-frequenc 423 clock-frequency = <51000000>;
424 424
425 nvidia,emc-aut 425 nvidia,emc-auto-cal-interval = <0x001fffff>;
426 nvidia,emc-mod 426 nvidia,emc-mode-1 = <0x80100003>;
427 nvidia,emc-mod 427 nvidia,emc-mode-2 = <0x80200008>;
428 nvidia,emc-mod 428 nvidia,emc-mode-reset = <0x80001221>;
429 nvidia,emc-zca 429 nvidia,emc-zcal-cnt-long = <0x00000040>;
430 nvidia,emc-cfg 430 nvidia,emc-cfg-dyn-self-ref;
431 nvidia,emc-cfg 431 nvidia,emc-cfg-periodic-qrst;
432 432
433 nvidia,emc-con 433 nvidia,emc-configuration = <
434 0x0000 434 0x00000002 /* EMC_RC */
435 0x0000 435 0x00000008 /* EMC_RFC */
436 0x0000 436 0x00000001 /* EMC_RAS */
437 0x0000 437 0x00000000 /* EMC_RP */
438 0x0000 438 0x00000002 /* EMC_R2W */
439 0x0000 439 0x0000000a /* EMC_W2R */
440 0x0000 440 0x00000005 /* EMC_R2P */
441 0x0000 441 0x0000000b /* EMC_W2P */
442 0x0000 442 0x00000000 /* EMC_RD_RCD */
443 0x0000 443 0x00000000 /* EMC_WR_RCD */
444 0x0000 444 0x00000003 /* EMC_RRD */
445 0x0000 445 0x00000001 /* EMC_REXT */
446 0x0000 446 0x00000000 /* EMC_WEXT */
447 0x0000 447 0x00000005 /* EMC_WDV */
448 0x0000 448 0x00000005 /* EMC_QUSE */
449 0x0000 449 0x00000004 /* EMC_QRST */
450 0x0000 450 0x0000000a /* EMC_QSAFE */
451 0x0000 451 0x0000000b /* EMC_RDV */
452 0x0000 452 0x00000181 /* EMC_REFRESH */
453 0x0000 453 0x00000000 /* EMC_BURST_REFRESH_NUM */
454 0x0000 454 0x00000060 /* EMC_PRE_REFRESH_REQ_CNT */
455 0x0000 455 0x00000002 /* EMC_PDEX2WR */
456 0x0000 456 0x00000002 /* EMC_PDEX2RD */
457 0x0000 457 0x00000001 /* EMC_PCHG2PDEN */
458 0x0000 458 0x00000000 /* EMC_ACT2PDEN */
459 0x0000 459 0x00000007 /* EMC_AR2PDEN */
460 0x0000 460 0x0000000f /* EMC_RW2PDEN */
461 0x0000 461 0x00000009 /* EMC_TXSR */
462 0x0000 462 0x00000009 /* EMC_TXSRDLL */
463 0x0000 463 0x00000004 /* EMC_TCKE */
464 0x0000 464 0x00000002 /* EMC_TFAW */
465 0x0000 465 0x00000000 /* EMC_TRPAB */
466 0x0000 466 0x00000004 /* EMC_TCLKSTABLE */
467 0x0000 467 0x00000005 /* EMC_TCLKSTOP */
468 0x0000 468 0x0000018e /* EMC_TREFBW */
469 0x0000 469 0x00000006 /* EMC_QUSE_EXTRA */
470 0x0000 470 0x00000004 /* EMC_FBIO_CFG6 */
471 0x0000 471 0x00000000 /* EMC_ODT_WRITE */
472 0x0000 472 0x00000000 /* EMC_ODT_READ */
473 0x0000 473 0x00004288 /* EMC_FBIO_CFG5 */
474 0x0078 474 0x007800a4 /* EMC_CFG_DIG_DLL */
475 0x0000 475 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
476 0x000f 476 0x000fc000 /* EMC_DLL_XFORM_DQS0 */
477 0x000f 477 0x000fc000 /* EMC_DLL_XFORM_DQS1 */
478 0x000f 478 0x000fc000 /* EMC_DLL_XFORM_DQS2 */
479 0x000f 479 0x000fc000 /* EMC_DLL_XFORM_DQS3 */
480 0x000f 480 0x000fc000 /* EMC_DLL_XFORM_DQS4 */
481 0x000f 481 0x000fc000 /* EMC_DLL_XFORM_DQS5 */
482 0x000f 482 0x000fc000 /* EMC_DLL_XFORM_DQS6 */
483 0x000f 483 0x000fc000 /* EMC_DLL_XFORM_DQS7 */
484 0x0000 484 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
485 0x0000 485 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
486 0x0000 486 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
487 0x0000 487 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
488 0x0000 488 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
489 0x0000 489 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
490 0x0000 490 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
491 0x0000 491 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
492 0x0000 492 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
493 0x0000 493 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
494 0x0000 494 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
495 0x0000 495 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
496 0x0000 496 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
497 0x0000 497 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
498 0x0000 498 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
499 0x0000 499 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
500 0x000f 500 0x000fc000 /* EMC_DLL_XFORM_DQ0 */
501 0x000f 501 0x000fc000 /* EMC_DLL_XFORM_DQ1 */
502 0x000f 502 0x000fc000 /* EMC_DLL_XFORM_DQ2 */
503 0x000f 503 0x000fc000 /* EMC_DLL_XFORM_DQ3 */
504 0x0000 504 0x000002a0 /* EMC_XM2CMDPADCTRL */
505 0x0800 505 0x0800211c /* EMC_XM2DQSPADCTRL2 */
506 0x0000 506 0x00000000 /* EMC_XM2DQPADCTRL2 */
507 0x77ff 507 0x77fff884 /* EMC_XM2CLKPADCTRL */
508 0x01f1 508 0x01f1f108 /* EMC_XM2COMPPADCTRL */
509 0x0505 509 0x05057404 /* EMC_XM2VTTGENPADCTRL */
510 0x5400 510 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
511 0x0800 511 0x08000168 /* EMC_XM2QUSEPADCTRL */
512 0x0800 512 0x08000000 /* EMC_XM2DQSPADCTRL3 */
513 0x0000 513 0x00000802 /* EMC_CTT_TERM_CTRL */
514 0x0000 514 0x00000000 /* EMC_ZCAL_INTERVAL */
515 0x0000 515 0x00000040 /* EMC_ZCAL_WAIT_CNT */
516 0x000c 516 0x000c000c /* EMC_MRS_WAIT_CNT */
517 0xa0f1 517 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
518 0x0000 518 0x00000000 /* EMC_CTT */
519 0x0000 519 0x00000000 /* EMC_CTT_DURATION */
520 0x8000 520 0x8000040b /* EMC_DYN_SELF_REF_CONTROL */
521 0xe800 521 0xe8000000 /* EMC_FBIO_SPARE */
522 0xff00 522 0xff00ff00 /* EMC_CFG_RSV */
523 >; 523 >;
524 }; 524 };
525 525
526 timing-102000000 { 526 timing-102000000 {
527 clock-frequenc 527 clock-frequency = <102000000>;
528 528
529 nvidia,emc-aut 529 nvidia,emc-auto-cal-interval = <0x001fffff>;
530 nvidia,emc-mod 530 nvidia,emc-mode-1 = <0x80100003>;
531 nvidia,emc-mod 531 nvidia,emc-mode-2 = <0x80200008>;
532 nvidia,emc-mod 532 nvidia,emc-mode-reset = <0x80001221>;
533 nvidia,emc-zca 533 nvidia,emc-zcal-cnt-long = <0x00000040>;
534 nvidia,emc-cfg 534 nvidia,emc-cfg-dyn-self-ref;
535 nvidia,emc-cfg 535 nvidia,emc-cfg-periodic-qrst;
536 536
537 nvidia,emc-con 537 nvidia,emc-configuration = <
538 0x0000 538 0x00000005 /* EMC_RC */
539 0x0000 539 0x00000010 /* EMC_RFC */
540 0x0000 540 0x00000003 /* EMC_RAS */
541 0x0000 541 0x00000001 /* EMC_RP */
542 0x0000 542 0x00000002 /* EMC_R2W */
543 0x0000 543 0x0000000a /* EMC_W2R */
544 0x0000 544 0x00000005 /* EMC_R2P */
545 0x0000 545 0x0000000b /* EMC_W2P */
546 0x0000 546 0x00000001 /* EMC_RD_RCD */
547 0x0000 547 0x00000001 /* EMC_WR_RCD */
548 0x0000 548 0x00000003 /* EMC_RRD */
549 0x0000 549 0x00000001 /* EMC_REXT */
550 0x0000 550 0x00000000 /* EMC_WEXT */
551 0x0000 551 0x00000005 /* EMC_WDV */
552 0x0000 552 0x00000005 /* EMC_QUSE */
553 0x0000 553 0x00000004 /* EMC_QRST */
554 0x0000 554 0x0000000a /* EMC_QSAFE */
555 0x0000 555 0x0000000b /* EMC_RDV */
556 0x0000 556 0x00000303 /* EMC_REFRESH */
557 0x0000 557 0x00000000 /* EMC_BURST_REFRESH_NUM */
558 0x0000 558 0x000000c0 /* EMC_PRE_REFRESH_REQ_CNT */
559 0x0000 559 0x00000002 /* EMC_PDEX2WR */
560 0x0000 560 0x00000002 /* EMC_PDEX2RD */
561 0x0000 561 0x00000001 /* EMC_PCHG2PDEN */
562 0x0000 562 0x00000000 /* EMC_ACT2PDEN */
563 0x0000 563 0x00000007 /* EMC_AR2PDEN */
564 0x0000 564 0x0000000f /* EMC_RW2PDEN */
565 0x0000 565 0x00000012 /* EMC_TXSR */
566 0x0000 566 0x00000012 /* EMC_TXSRDLL */
567 0x0000 567 0x00000004 /* EMC_TCKE */
568 0x0000 568 0x00000004 /* EMC_TFAW */
569 0x0000 569 0x00000000 /* EMC_TRPAB */
570 0x0000 570 0x00000004 /* EMC_TCLKSTABLE */
571 0x0000 571 0x00000005 /* EMC_TCLKSTOP */
572 0x0000 572 0x0000031c /* EMC_TREFBW */
573 0x0000 573 0x00000006 /* EMC_QUSE_EXTRA */
574 0x0000 574 0x00000004 /* EMC_FBIO_CFG6 */
575 0x0000 575 0x00000000 /* EMC_ODT_WRITE */
576 0x0000 576 0x00000000 /* EMC_ODT_READ */
577 0x0000 577 0x00004288 /* EMC_FBIO_CFG5 */
578 0x0078 578 0x007800a4 /* EMC_CFG_DIG_DLL */
579 0x0000 579 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
580 0x000f 580 0x000fc000 /* EMC_DLL_XFORM_DQS0 */
581 0x000f 581 0x000fc000 /* EMC_DLL_XFORM_DQS1 */
582 0x000f 582 0x000fc000 /* EMC_DLL_XFORM_DQS2 */
583 0x000f 583 0x000fc000 /* EMC_DLL_XFORM_DQS3 */
584 0x000f 584 0x000fc000 /* EMC_DLL_XFORM_DQS4 */
585 0x000f 585 0x000fc000 /* EMC_DLL_XFORM_DQS5 */
586 0x000f 586 0x000fc000 /* EMC_DLL_XFORM_DQS6 */
587 0x000f 587 0x000fc000 /* EMC_DLL_XFORM_DQS7 */
588 0x0000 588 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
589 0x0000 589 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
590 0x0000 590 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
591 0x0000 591 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
592 0x0000 592 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
593 0x0000 593 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
594 0x0000 594 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
595 0x0000 595 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
596 0x0000 596 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
597 0x0000 597 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
598 0x0000 598 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
599 0x0000 599 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
600 0x0000 600 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
601 0x0000 601 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
602 0x0000 602 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
603 0x0000 603 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
604 0x000f 604 0x000fc000 /* EMC_DLL_XFORM_DQ0 */
605 0x000f 605 0x000fc000 /* EMC_DLL_XFORM_DQ1 */
606 0x000f 606 0x000fc000 /* EMC_DLL_XFORM_DQ2 */
607 0x000f 607 0x000fc000 /* EMC_DLL_XFORM_DQ3 */
608 0x0000 608 0x000002a0 /* EMC_XM2CMDPADCTRL */
609 0x0800 609 0x0800211c /* EMC_XM2DQSPADCTRL2 */
610 0x0000 610 0x00000000 /* EMC_XM2DQPADCTRL2 */
611 0x77ff 611 0x77fff884 /* EMC_XM2CLKPADCTRL */
612 0x01f1 612 0x01f1f108 /* EMC_XM2COMPPADCTRL */
613 0x0505 613 0x05057404 /* EMC_XM2VTTGENPADCTRL */
614 0x5400 614 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
615 0x0800 615 0x08000168 /* EMC_XM2QUSEPADCTRL */
616 0x0800 616 0x08000000 /* EMC_XM2DQSPADCTRL3 */
617 0x0000 617 0x00000802 /* EMC_CTT_TERM_CTRL */
618 0x0000 618 0x00000000 /* EMC_ZCAL_INTERVAL */
619 0x0000 619 0x00000040 /* EMC_ZCAL_WAIT_CNT */
620 0x000c 620 0x000c000c /* EMC_MRS_WAIT_CNT */
621 0xa0f1 621 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
622 0x0000 622 0x00000000 /* EMC_CTT */
623 0x0000 623 0x00000000 /* EMC_CTT_DURATION */
624 0x8000 624 0x80000713 /* EMC_DYN_SELF_REF_CONTROL */
625 0xe800 625 0xe8000000 /* EMC_FBIO_SPARE */
626 0xff00 626 0xff00ff00 /* EMC_CFG_RSV */
627 >; 627 >;
628 }; 628 };
629 629
630 timing-204000000 { 630 timing-204000000 {
631 clock-frequenc 631 clock-frequency = <204000000>;
632 632
633 nvidia,emc-aut 633 nvidia,emc-auto-cal-interval = <0x001fffff>;
634 nvidia,emc-mod 634 nvidia,emc-mode-1 = <0x80100003>;
635 nvidia,emc-mod 635 nvidia,emc-mode-2 = <0x80200008>;
636 nvidia,emc-mod 636 nvidia,emc-mode-reset = <0x80001221>;
637 nvidia,emc-zca 637 nvidia,emc-zcal-cnt-long = <0x00000040>;
638 nvidia,emc-cfg 638 nvidia,emc-cfg-dyn-self-ref;
639 nvidia,emc-cfg 639 nvidia,emc-cfg-periodic-qrst;
640 640
641 nvidia,emc-con 641 nvidia,emc-configuration = <
642 0x0000 642 0x0000000a /* EMC_RC */
643 0x0000 643 0x00000020 /* EMC_RFC */
644 0x0000 644 0x00000007 /* EMC_RAS */
645 0x0000 645 0x00000002 /* EMC_RP */
646 0x0000 646 0x00000002 /* EMC_R2W */
647 0x0000 647 0x0000000a /* EMC_W2R */
648 0x0000 648 0x00000005 /* EMC_R2P */
649 0x0000 649 0x0000000b /* EMC_W2P */
650 0x0000 650 0x00000002 /* EMC_RD_RCD */
651 0x0000 651 0x00000002 /* EMC_WR_RCD */
652 0x0000 652 0x00000003 /* EMC_RRD */
653 0x0000 653 0x00000001 /* EMC_REXT */
654 0x0000 654 0x00000000 /* EMC_WEXT */
655 0x0000 655 0x00000005 /* EMC_WDV */
656 0x0000 656 0x00000005 /* EMC_QUSE */
657 0x0000 657 0x00000004 /* EMC_QRST */
658 0x0000 658 0x0000000a /* EMC_QSAFE */
659 0x0000 659 0x0000000b /* EMC_RDV */
660 0x0000 660 0x00000607 /* EMC_REFRESH */
661 0x0000 661 0x00000000 /* EMC_BURST_REFRESH_NUM */
662 0x0000 662 0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */
663 0x0000 663 0x00000002 /* EMC_PDEX2WR */
664 0x0000 664 0x00000002 /* EMC_PDEX2RD */
665 0x0000 665 0x00000001 /* EMC_PCHG2PDEN */
666 0x0000 666 0x00000000 /* EMC_ACT2PDEN */
667 0x0000 667 0x00000007 /* EMC_AR2PDEN */
668 0x0000 668 0x0000000f /* EMC_RW2PDEN */
669 0x0000 669 0x00000023 /* EMC_TXSR */
670 0x0000 670 0x00000023 /* EMC_TXSRDLL */
671 0x0000 671 0x00000004 /* EMC_TCKE */
672 0x0000 672 0x00000007 /* EMC_TFAW */
673 0x0000 673 0x00000000 /* EMC_TRPAB */
674 0x0000 674 0x00000004 /* EMC_TCLKSTABLE */
675 0x0000 675 0x00000005 /* EMC_TCLKSTOP */
676 0x0000 676 0x00000638 /* EMC_TREFBW */
677 0x0000 677 0x00000006 /* EMC_QUSE_EXTRA */
678 0x0000 678 0x00000006 /* EMC_FBIO_CFG6 */
679 0x0000 679 0x00000000 /* EMC_ODT_WRITE */
680 0x0000 680 0x00000000 /* EMC_ODT_READ */
681 0x0000 681 0x00004288 /* EMC_FBIO_CFG5 */
682 0x0044 682 0x004400a4 /* EMC_CFG_DIG_DLL */
683 0x0000 683 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
684 0x0008 684 0x00080000 /* EMC_DLL_XFORM_DQS0 */
685 0x0008 685 0x00080000 /* EMC_DLL_XFORM_DQS1 */
686 0x0008 686 0x00080000 /* EMC_DLL_XFORM_DQS2 */
687 0x0008 687 0x00080000 /* EMC_DLL_XFORM_DQS3 */
688 0x0008 688 0x00080000 /* EMC_DLL_XFORM_DQS4 */
689 0x0008 689 0x00080000 /* EMC_DLL_XFORM_DQS5 */
690 0x0008 690 0x00080000 /* EMC_DLL_XFORM_DQS6 */
691 0x0008 691 0x00080000 /* EMC_DLL_XFORM_DQS7 */
692 0x0000 692 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
693 0x0000 693 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
694 0x0000 694 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
695 0x0000 695 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
696 0x0000 696 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
697 0x0000 697 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
698 0x0000 698 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
699 0x0000 699 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
700 0x0000 700 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
701 0x0000 701 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
702 0x0000 702 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
703 0x0000 703 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
704 0x0000 704 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
705 0x0000 705 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
706 0x0000 706 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
707 0x0000 707 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
708 0x0008 708 0x00080000 /* EMC_DLL_XFORM_DQ0 */
709 0x0008 709 0x00080000 /* EMC_DLL_XFORM_DQ1 */
710 0x0008 710 0x00080000 /* EMC_DLL_XFORM_DQ2 */
711 0x0008 711 0x00080000 /* EMC_DLL_XFORM_DQ3 */
712 0x0000 712 0x000002a0 /* EMC_XM2CMDPADCTRL */
713 0x0800 713 0x0800211c /* EMC_XM2DQSPADCTRL2 */
714 0x0000 714 0x00000000 /* EMC_XM2DQPADCTRL2 */
715 0x77ff 715 0x77fff884 /* EMC_XM2CLKPADCTRL */
716 0x01f1 716 0x01f1f108 /* EMC_XM2COMPPADCTRL */
717 0x0505 717 0x05057404 /* EMC_XM2VTTGENPADCTRL */
718 0x5400 718 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
719 0x0800 719 0x08000168 /* EMC_XM2QUSEPADCTRL */
720 0x0800 720 0x08000000 /* EMC_XM2DQSPADCTRL3 */
721 0x0000 721 0x00000802 /* EMC_CTT_TERM_CTRL */
722 0x0002 722 0x00020000 /* EMC_ZCAL_INTERVAL */
723 0x0000 723 0x00000100 /* EMC_ZCAL_WAIT_CNT */
724 0x000c 724 0x000c000c /* EMC_MRS_WAIT_CNT */
725 0xa0f1 725 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
726 0x0000 726 0x00000000 /* EMC_CTT */
727 0x0000 727 0x00000000 /* EMC_CTT_DURATION */
728 0x8000 728 0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */
729 0xe800 729 0xe8000000 /* EMC_FBIO_SPARE */
730 0xff00 730 0xff00ff00 /* EMC_CFG_RSV */
731 >; 731 >;
732 }; 732 };
733 733
734 timing-333500000 { 734 timing-333500000 {
735 clock-frequenc 735 clock-frequency = <333500000>;
736 736
737 nvidia,emc-aut 737 nvidia,emc-auto-cal-interval = <0x001fffff>;
738 nvidia,emc-mod 738 nvidia,emc-mode-1 = <0x80100002>;
739 nvidia,emc-mod 739 nvidia,emc-mode-2 = <0x80200000>;
740 nvidia,emc-mod 740 nvidia,emc-mode-reset = <0x80000321>;
741 nvidia,emc-zca 741 nvidia,emc-zcal-cnt-long = <0x00000040>;
742 742
743 nvidia,emc-con 743 nvidia,emc-configuration = <
744 0x0000 744 0x0000000f /* EMC_RC */
745 0x0000 745 0x00000034 /* EMC_RFC */
746 0x0000 746 0x0000000a /* EMC_RAS */
747 0x0000 747 0x00000003 /* EMC_RP */
748 0x0000 748 0x00000003 /* EMC_R2W */
749 0x0000 749 0x00000008 /* EMC_W2R */
750 0x0000 750 0x00000002 /* EMC_R2P */
751 0x0000 751 0x00000009 /* EMC_W2P */
752 0x0000 752 0x00000003 /* EMC_RD_RCD */
753 0x0000 753 0x00000003 /* EMC_WR_RCD */
754 0x0000 754 0x00000002 /* EMC_RRD */
755 0x0000 755 0x00000001 /* EMC_REXT */
756 0x0000 756 0x00000000 /* EMC_WEXT */
757 0x0000 757 0x00000004 /* EMC_WDV */
758 0x0000 758 0x00000006 /* EMC_QUSE */
759 0x0000 759 0x00000004 /* EMC_QRST */
760 0x0000 760 0x0000000a /* EMC_QSAFE */
761 0x0000 761 0x0000000c /* EMC_RDV */
762 0x0000 762 0x000009e9 /* EMC_REFRESH */
763 0x0000 763 0x00000000 /* EMC_BURST_REFRESH_NUM */
764 0x0000 764 0x0000027a /* EMC_PRE_REFRESH_REQ_CNT */
765 0x0000 765 0x00000001 /* EMC_PDEX2WR */
766 0x0000 766 0x00000008 /* EMC_PDEX2RD */
767 0x0000 767 0x00000001 /* EMC_PCHG2PDEN */
768 0x0000 768 0x00000000 /* EMC_ACT2PDEN */
769 0x0000 769 0x00000007 /* EMC_AR2PDEN */
770 0x0000 770 0x0000000e /* EMC_RW2PDEN */
771 0x0000 771 0x00000039 /* EMC_TXSR */
772 0x0000 772 0x00000200 /* EMC_TXSRDLL */
773 0x0000 773 0x00000004 /* EMC_TCKE */
774 0x0000 774 0x0000000a /* EMC_TFAW */
775 0x0000 775 0x00000000 /* EMC_TRPAB */
776 0x0000 776 0x00000004 /* EMC_TCLKSTABLE */
777 0x0000 777 0x00000005 /* EMC_TCLKSTOP */
778 0x0000 778 0x00000a2a /* EMC_TREFBW */
779 0x0000 779 0x00000000 /* EMC_QUSE_EXTRA */
780 0x0000 780 0x00000004 /* EMC_FBIO_CFG6 */
781 0x0000 781 0x00000000 /* EMC_ODT_WRITE */
782 0x0000 782 0x00000000 /* EMC_ODT_READ */
783 0x0000 783 0x00007088 /* EMC_FBIO_CFG5 */
784 0x0026 784 0x002600a4 /* EMC_CFG_DIG_DLL */
785 0x0000 785 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
786 0x0003 786 0x0003c000 /* EMC_DLL_XFORM_DQS0 */
787 0x0003 787 0x0003c000 /* EMC_DLL_XFORM_DQS1 */
788 0x0003 788 0x0003c000 /* EMC_DLL_XFORM_DQS2 */
789 0x0003 789 0x0003c000 /* EMC_DLL_XFORM_DQS3 */
790 0x0001 790 0x00014000 /* EMC_DLL_XFORM_DQS4 */
791 0x0001 791 0x00014000 /* EMC_DLL_XFORM_DQS5 */
792 0x0001 792 0x00014000 /* EMC_DLL_XFORM_DQS6 */
793 0x0001 793 0x00014000 /* EMC_DLL_XFORM_DQS7 */
794 0x0000 794 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
795 0x0000 795 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
796 0x0000 796 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
797 0x0000 797 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
798 0x0000 798 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
799 0x0000 799 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
800 0x0000 800 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
801 0x0000 801 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
802 0x0000 802 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
803 0x0000 803 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
804 0x0000 804 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
805 0x0000 805 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
806 0x0000 806 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
807 0x0000 807 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
808 0x0000 808 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
809 0x0000 809 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
810 0x0004 810 0x00048000 /* EMC_DLL_XFORM_DQ0 */
811 0x0004 811 0x00048000 /* EMC_DLL_XFORM_DQ1 */
812 0x0004 812 0x00048000 /* EMC_DLL_XFORM_DQ2 */
813 0x0004 813 0x00048000 /* EMC_DLL_XFORM_DQ3 */
814 0x0000 814 0x000002a0 /* EMC_XM2CMDPADCTRL */
815 0x0800 815 0x0800013d /* EMC_XM2DQSPADCTRL2 */
816 0x0000 816 0x00000000 /* EMC_XM2DQPADCTRL2 */
817 0x77ff 817 0x77fff884 /* EMC_XM2CLKPADCTRL */
818 0x01f1 818 0x01f1f508 /* EMC_XM2COMPPADCTRL */
819 0x0505 819 0x05057404 /* EMC_XM2VTTGENPADCTRL */
820 0x5400 820 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
821 0x0800 821 0x080001e8 /* EMC_XM2QUSEPADCTRL */
822 0x0800 822 0x08000021 /* EMC_XM2DQSPADCTRL3 */
823 0x0000 823 0x00000802 /* EMC_CTT_TERM_CTRL */
824 0x0002 824 0x00020000 /* EMC_ZCAL_INTERVAL */
825 0x0000 825 0x00000100 /* EMC_ZCAL_WAIT_CNT */
826 0x018b 826 0x018b000c /* EMC_MRS_WAIT_CNT */
827 0xa0f1 827 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
828 0x0000 828 0x00000000 /* EMC_CTT */
829 0x0000 829 0x00000000 /* EMC_CTT_DURATION */
830 0x8000 830 0x800014d4 /* EMC_DYN_SELF_REF_CONTROL */
831 0xe800 831 0xe8000000 /* EMC_FBIO_SPARE */
832 0xff00 832 0xff00ff89 /* EMC_CFG_RSV */
833 >; 833 >;
834 }; 834 };
835 835
836 timing-667000000 { 836 timing-667000000 {
837 clock-frequenc 837 clock-frequency = <667000000>;
838 838
839 nvidia,emc-aut 839 nvidia,emc-auto-cal-interval = <0x001fffff>;
840 nvidia,emc-mod 840 nvidia,emc-mode-1 = <0x80100002>;
841 nvidia,emc-mod 841 nvidia,emc-mode-2 = <0x80200018>;
842 nvidia,emc-mod 842 nvidia,emc-mode-reset = <0x80000b71>;
843 nvidia,emc-zca 843 nvidia,emc-zcal-cnt-long = <0x00000040>;
844 nvidia,emc-cfg 844 nvidia,emc-cfg-periodic-qrst;
845 845
846 nvidia,emc-con 846 nvidia,emc-configuration = <
847 0x0000 847 0x0000001f /* EMC_RC */
848 0x0000 848 0x00000069 /* EMC_RFC */
849 0x0000 849 0x00000017 /* EMC_RAS */
850 0x0000 850 0x00000007 /* EMC_RP */
851 0x0000 851 0x00000005 /* EMC_R2W */
852 0x0000 852 0x0000000c /* EMC_W2R */
853 0x0000 853 0x00000003 /* EMC_R2P */
854 0x0000 854 0x00000011 /* EMC_W2P */
855 0x0000 855 0x00000007 /* EMC_RD_RCD */
856 0x0000 856 0x00000007 /* EMC_WR_RCD */
857 0x0000 857 0x00000002 /* EMC_RRD */
858 0x0000 858 0x00000001 /* EMC_REXT */
859 0x0000 859 0x00000000 /* EMC_WEXT */
860 0x0000 860 0x00000007 /* EMC_WDV */
861 0x0000 861 0x0000000b /* EMC_QUSE */
862 0x0000 862 0x00000009 /* EMC_QRST */
863 0x0000 863 0x0000000b /* EMC_QSAFE */
864 0x0000 864 0x00000011 /* EMC_RDV */
865 0x0000 865 0x00001412 /* EMC_REFRESH */
866 0x0000 866 0x00000000 /* EMC_BURST_REFRESH_NUM */
867 0x0000 867 0x00000504 /* EMC_PRE_REFRESH_REQ_CNT */
868 0x0000 868 0x00000002 /* EMC_PDEX2WR */
869 0x0000 869 0x0000000e /* EMC_PDEX2RD */
870 0x0000 870 0x00000001 /* EMC_PCHG2PDEN */
871 0x0000 871 0x00000000 /* EMC_ACT2PDEN */
872 0x0000 872 0x0000000c /* EMC_AR2PDEN */
873 0x0000 873 0x00000016 /* EMC_RW2PDEN */
874 0x0000 874 0x00000072 /* EMC_TXSR */
875 0x0000 875 0x00000200 /* EMC_TXSRDLL */
876 0x0000 876 0x00000005 /* EMC_TCKE */
877 0x0000 877 0x00000015 /* EMC_TFAW */
878 0x0000 878 0x00000000 /* EMC_TRPAB */
879 0x0000 879 0x00000006 /* EMC_TCLKSTABLE */
880 0x0000 880 0x00000007 /* EMC_TCLKSTOP */
881 0x0000 881 0x00001453 /* EMC_TREFBW */
882 0x0000 882 0x0000000c /* EMC_QUSE_EXTRA */
883 0x0000 883 0x00000004 /* EMC_FBIO_CFG6 */
884 0x0000 884 0x00000000 /* EMC_ODT_WRITE */
885 0x0000 885 0x00000000 /* EMC_ODT_READ */
886 0x0000 886 0x00005088 /* EMC_FBIO_CFG5 */
887 0xf00b 887 0xf00b0191 /* EMC_CFG_DIG_DLL */
888 0x0000 888 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
889 0x0000 889 0x00000008 /* EMC_DLL_XFORM_DQS0 */
890 0x0000 890 0x00000008 /* EMC_DLL_XFORM_DQS1 */
891 0x0000 891 0x00000008 /* EMC_DLL_XFORM_DQS2 */
892 0x0000 892 0x00000008 /* EMC_DLL_XFORM_DQS3 */
893 0x0000 893 0x0000000a /* EMC_DLL_XFORM_DQS4 */
894 0x0000 894 0x0000000a /* EMC_DLL_XFORM_DQS5 */
895 0x0000 895 0x0000000a /* EMC_DLL_XFORM_DQS6 */
896 0x0000 896 0x0000000a /* EMC_DLL_XFORM_DQS7 */
897 0x0000 897 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
898 0x0000 898 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
899 0x0000 899 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
900 0x0000 900 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
901 0x0000 901 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
902 0x0000 902 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
903 0x0000 903 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
904 0x0000 904 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
905 0x0000 905 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
906 0x0000 906 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
907 0x0000 907 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
908 0x0000 908 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
909 0x0000 909 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
910 0x0000 910 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
911 0x0000 911 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
912 0x0000 912 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
913 0x0000 913 0x0000000c /* EMC_DLL_XFORM_DQ0 */
914 0x0000 914 0x0000000c /* EMC_DLL_XFORM_DQ1 */
915 0x0000 915 0x0000000c /* EMC_DLL_XFORM_DQ2 */
916 0x0000 916 0x0000000c /* EMC_DLL_XFORM_DQ3 */
917 0x0000 917 0x000002a0 /* EMC_XM2CMDPADCTRL */
918 0x0600 918 0x0600013d /* EMC_XM2DQSPADCTRL2 */
919 0x2222 919 0x22220000 /* EMC_XM2DQPADCTRL2 */
920 0x77ff 920 0x77fff884 /* EMC_XM2CLKPADCTRL */
921 0x01f1 921 0x01f1f501 /* EMC_XM2COMPPADCTRL */
922 0x0707 922 0x07077404 /* EMC_XM2VTTGENPADCTRL */
923 0x5400 923 0x54000000 /* EMC_XM2VTTGENPADCTRL2 */
924 0x0800 924 0x080001e8 /* EMC_XM2QUSEPADCTRL */
925 0x0a00 925 0x0a000021 /* EMC_XM2DQSPADCTRL3 */
926 0x0000 926 0x00000802 /* EMC_CTT_TERM_CTRL */
927 0x0002 927 0x00020000 /* EMC_ZCAL_INTERVAL */
928 0x0000 928 0x00000100 /* EMC_ZCAL_WAIT_CNT */
929 0x0156 929 0x0156000c /* EMC_MRS_WAIT_CNT */
930 0xa0f1 930 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
931 0x0000 931 0x00000000 /* EMC_CTT */
932 0x0000 932 0x00000000 /* EMC_CTT_DURATION */
933 0x8000 933 0x800028a5 /* EMC_DYN_SELF_REF_CONTROL */
934 0xf800 934 0xf8000000 /* EMC_FBIO_SPARE */
935 0xff00 935 0xff00ff49 /* EMC_CFG_RSV */
936 >; 936 >;
937 }; 937 };
938 }; 938 };
939 939
940 emc-timings-1 { 940 emc-timings-1 {
941 nvidia,ram-code = <1>; 941 nvidia,ram-code = <1>; /* Hynix H5TC2G83CFR */
942 942
943 timing-25500000 { 943 timing-25500000 {
944 clock-frequenc 944 clock-frequency = <25500000>;
945 945
946 nvidia,emc-aut 946 nvidia,emc-auto-cal-interval = <0x001fffff>;
947 nvidia,emc-mod 947 nvidia,emc-mode-1 = <0x80100003>;
948 nvidia,emc-mod 948 nvidia,emc-mode-2 = <0x80200008>;
949 nvidia,emc-mod 949 nvidia,emc-mode-reset = <0x80001221>;
950 nvidia,emc-zca 950 nvidia,emc-zcal-cnt-long = <0x00000040>;
951 nvidia,emc-cfg 951 nvidia,emc-cfg-dyn-self-ref;
952 nvidia,emc-cfg 952 nvidia,emc-cfg-periodic-qrst;
953 953
954 nvidia,emc-con 954 nvidia,emc-configuration = <
955 0x0000 955 0x00000001 /* EMC_RC */
956 0x0000 956 0x00000004 /* EMC_RFC */
957 0x0000 957 0x00000000 /* EMC_RAS */
958 0x0000 958 0x00000000 /* EMC_RP */
959 0x0000 959 0x00000002 /* EMC_R2W */
960 0x0000 960 0x0000000a /* EMC_W2R */
961 0x0000 961 0x00000005 /* EMC_R2P */
962 0x0000 962 0x0000000b /* EMC_W2P */
963 0x0000 963 0x00000000 /* EMC_RD_RCD */
964 0x0000 964 0x00000000 /* EMC_WR_RCD */
965 0x0000 965 0x00000003 /* EMC_RRD */
966 0x0000 966 0x00000001 /* EMC_REXT */
967 0x0000 967 0x00000000 /* EMC_WEXT */
968 0x0000 968 0x00000005 /* EMC_WDV */
969 0x0000 969 0x00000005 /* EMC_QUSE */
970 0x0000 970 0x00000004 /* EMC_QRST */
971 0x0000 971 0x0000000a /* EMC_QSAFE */
972 0x0000 972 0x0000000b /* EMC_RDV */
973 0x0000 973 0x000000c0 /* EMC_REFRESH */
974 0x0000 974 0x00000000 /* EMC_BURST_REFRESH_NUM */
975 0x0000 975 0x00000030 /* EMC_PRE_REFRESH_REQ_CNT */
976 0x0000 976 0x00000002 /* EMC_PDEX2WR */
977 0x0000 977 0x00000002 /* EMC_PDEX2RD */
978 0x0000 978 0x00000001 /* EMC_PCHG2PDEN */
979 0x0000 979 0x00000000 /* EMC_ACT2PDEN */
980 0x0000 980 0x00000007 /* EMC_AR2PDEN */
981 0x0000 981 0x0000000f /* EMC_RW2PDEN */
982 0x0000 982 0x00000005 /* EMC_TXSR */
983 0x0000 983 0x00000005 /* EMC_TXSRDLL */
984 0x0000 984 0x00000004 /* EMC_TCKE */
985 0x0000 985 0x00000001 /* EMC_TFAW */
986 0x0000 986 0x00000000 /* EMC_TRPAB */
987 0x0000 987 0x00000004 /* EMC_TCLKSTABLE */
988 0x0000 988 0x00000005 /* EMC_TCLKSTOP */
989 0x0000 989 0x000000c7 /* EMC_TREFBW */
990 0x0000 990 0x00000006 /* EMC_QUSE_EXTRA */
991 0x0000 991 0x00000004 /* EMC_FBIO_CFG6 */
992 0x0000 992 0x00000000 /* EMC_ODT_WRITE */
993 0x0000 993 0x00000000 /* EMC_ODT_READ */
994 0x0000 994 0x00004288 /* EMC_FBIO_CFG5 */
995 0x0078 995 0x007800a4 /* EMC_CFG_DIG_DLL */
996 0x0000 996 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
997 0x000f 997 0x000fc000 /* EMC_DLL_XFORM_DQS0 */
998 0x000f 998 0x000fc000 /* EMC_DLL_XFORM_DQS1 */
999 0x000f 999 0x000fc000 /* EMC_DLL_XFORM_DQS2 */
1000 0x000 1000 0x000fc000 /* EMC_DLL_XFORM_DQS3 */
1001 0x000 1001 0x000fc000 /* EMC_DLL_XFORM_DQS4 */
1002 0x000 1002 0x000fc000 /* EMC_DLL_XFORM_DQS5 */
1003 0x000 1003 0x000fc000 /* EMC_DLL_XFORM_DQS6 */
1004 0x000 1004 0x000fc000 /* EMC_DLL_XFORM_DQS7 */
1005 0x000 1005 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1006 0x000 1006 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1007 0x000 1007 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1008 0x000 1008 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1009 0x000 1009 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1010 0x000 1010 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1011 0x000 1011 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1012 0x000 1012 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1013 0x000 1013 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1014 0x000 1014 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1015 0x000 1015 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1016 0x000 1016 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1017 0x000 1017 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1018 0x000 1018 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1019 0x000 1019 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1020 0x000 1020 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1021 0x000 1021 0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1022 0x000 1022 0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1023 0x000 1023 0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1024 0x000 1024 0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1025 0x000 1025 0x000002a0 /* EMC_XM2CMDPADCTRL */
1026 0x080 1026 0x0800211c /* EMC_XM2DQSPADCTRL2 */
1027 0x000 1027 0x00000000 /* EMC_XM2DQPADCTRL2 */
1028 0x77f 1028 0x77fff884 /* EMC_XM2CLKPADCTRL */
1029 0x01f 1029 0x01f1f108 /* EMC_XM2COMPPADCTRL */
1030 0x050 1030 0x05057404 /* EMC_XM2VTTGENPADCTRL */
1031 0x540 1031 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1032 0x080 1032 0x08000168 /* EMC_XM2QUSEPADCTRL */
1033 0x080 1033 0x08000000 /* EMC_XM2DQSPADCTRL3 */
1034 0x000 1034 0x00000802 /* EMC_CTT_TERM_CTRL */
1035 0x000 1035 0x00000000 /* EMC_ZCAL_INTERVAL */
1036 0x000 1036 0x00000040 /* EMC_ZCAL_WAIT_CNT */
1037 0x000 1037 0x000c000c /* EMC_MRS_WAIT_CNT */
1038 0xa0f 1038 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1039 0x000 1039 0x00000000 /* EMC_CTT */
1040 0x000 1040 0x00000000 /* EMC_CTT_DURATION */
1041 0x800 1041 0x80000287 /* EMC_DYN_SELF_REF_CONTROL */
1042 0xe80 1042 0xe8000000 /* EMC_FBIO_SPARE */
1043 0xff0 1043 0xff00ff00 /* EMC_CFG_RSV */
1044 >; 1044 >;
1045 }; 1045 };
1046 1046
1047 timing-51000000 { 1047 timing-51000000 {
1048 clock-frequen 1048 clock-frequency = <51000000>;
1049 1049
1050 nvidia,emc-au 1050 nvidia,emc-auto-cal-interval = <0x001fffff>;
1051 nvidia,emc-mo 1051 nvidia,emc-mode-1 = <0x80100003>;
1052 nvidia,emc-mo 1052 nvidia,emc-mode-2 = <0x80200008>;
1053 nvidia,emc-mo 1053 nvidia,emc-mode-reset = <0x80001221>;
1054 nvidia,emc-zc 1054 nvidia,emc-zcal-cnt-long = <0x00000040>;
1055 nvidia,emc-cf 1055 nvidia,emc-cfg-dyn-self-ref;
1056 nvidia,emc-cf 1056 nvidia,emc-cfg-periodic-qrst;
1057 1057
1058 nvidia,emc-co 1058 nvidia,emc-configuration = <
1059 0x000 1059 0x00000002 /* EMC_RC */
1060 0x000 1060 0x00000008 /* EMC_RFC */
1061 0x000 1061 0x00000001 /* EMC_RAS */
1062 0x000 1062 0x00000000 /* EMC_RP */
1063 0x000 1063 0x00000002 /* EMC_R2W */
1064 0x000 1064 0x0000000a /* EMC_W2R */
1065 0x000 1065 0x00000005 /* EMC_R2P */
1066 0x000 1066 0x0000000b /* EMC_W2P */
1067 0x000 1067 0x00000000 /* EMC_RD_RCD */
1068 0x000 1068 0x00000000 /* EMC_WR_RCD */
1069 0x000 1069 0x00000003 /* EMC_RRD */
1070 0x000 1070 0x00000001 /* EMC_REXT */
1071 0x000 1071 0x00000000 /* EMC_WEXT */
1072 0x000 1072 0x00000005 /* EMC_WDV */
1073 0x000 1073 0x00000005 /* EMC_QUSE */
1074 0x000 1074 0x00000004 /* EMC_QRST */
1075 0x000 1075 0x0000000a /* EMC_QSAFE */
1076 0x000 1076 0x0000000b /* EMC_RDV */
1077 0x000 1077 0x00000181 /* EMC_REFRESH */
1078 0x000 1078 0x00000000 /* EMC_BURST_REFRESH_NUM */
1079 0x000 1079 0x00000060 /* EMC_PRE_REFRESH_REQ_CNT */
1080 0x000 1080 0x00000002 /* EMC_PDEX2WR */
1081 0x000 1081 0x00000002 /* EMC_PDEX2RD */
1082 0x000 1082 0x00000001 /* EMC_PCHG2PDEN */
1083 0x000 1083 0x00000000 /* EMC_ACT2PDEN */
1084 0x000 1084 0x00000007 /* EMC_AR2PDEN */
1085 0x000 1085 0x0000000f /* EMC_RW2PDEN */
1086 0x000 1086 0x00000009 /* EMC_TXSR */
1087 0x000 1087 0x00000009 /* EMC_TXSRDLL */
1088 0x000 1088 0x00000004 /* EMC_TCKE */
1089 0x000 1089 0x00000002 /* EMC_TFAW */
1090 0x000 1090 0x00000000 /* EMC_TRPAB */
1091 0x000 1091 0x00000004 /* EMC_TCLKSTABLE */
1092 0x000 1092 0x00000005 /* EMC_TCLKSTOP */
1093 0x000 1093 0x0000018e /* EMC_TREFBW */
1094 0x000 1094 0x00000006 /* EMC_QUSE_EXTRA */
1095 0x000 1095 0x00000004 /* EMC_FBIO_CFG6 */
1096 0x000 1096 0x00000000 /* EMC_ODT_WRITE */
1097 0x000 1097 0x00000000 /* EMC_ODT_READ */
1098 0x000 1098 0x00004288 /* EMC_FBIO_CFG5 */
1099 0x007 1099 0x007800a4 /* EMC_CFG_DIG_DLL */
1100 0x000 1100 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1101 0x000 1101 0x000fc000 /* EMC_DLL_XFORM_DQS0 */
1102 0x000 1102 0x000fc000 /* EMC_DLL_XFORM_DQS1 */
1103 0x000 1103 0x000fc000 /* EMC_DLL_XFORM_DQS2 */
1104 0x000 1104 0x000fc000 /* EMC_DLL_XFORM_DQS3 */
1105 0x000 1105 0x000fc000 /* EMC_DLL_XFORM_DQS4 */
1106 0x000 1106 0x000fc000 /* EMC_DLL_XFORM_DQS5 */
1107 0x000 1107 0x000fc000 /* EMC_DLL_XFORM_DQS6 */
1108 0x000 1108 0x000fc000 /* EMC_DLL_XFORM_DQS7 */
1109 0x000 1109 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1110 0x000 1110 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1111 0x000 1111 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1112 0x000 1112 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1113 0x000 1113 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1114 0x000 1114 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1115 0x000 1115 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1116 0x000 1116 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1117 0x000 1117 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1118 0x000 1118 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1119 0x000 1119 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1120 0x000 1120 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1121 0x000 1121 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1122 0x000 1122 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1123 0x000 1123 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1124 0x000 1124 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1125 0x000 1125 0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1126 0x000 1126 0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1127 0x000 1127 0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1128 0x000 1128 0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1129 0x000 1129 0x000002a0 /* EMC_XM2CMDPADCTRL */
1130 0x080 1130 0x0800211c /* EMC_XM2DQSPADCTRL2 */
1131 0x000 1131 0x00000000 /* EMC_XM2DQPADCTRL2 */
1132 0x77f 1132 0x77fff884 /* EMC_XM2CLKPADCTRL */
1133 0x01f 1133 0x01f1f108 /* EMC_XM2COMPPADCTRL */
1134 0x050 1134 0x05057404 /* EMC_XM2VTTGENPADCTRL */
1135 0x540 1135 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1136 0x080 1136 0x08000168 /* EMC_XM2QUSEPADCTRL */
1137 0x080 1137 0x08000000 /* EMC_XM2DQSPADCTRL3 */
1138 0x000 1138 0x00000802 /* EMC_CTT_TERM_CTRL */
1139 0x000 1139 0x00000000 /* EMC_ZCAL_INTERVAL */
1140 0x000 1140 0x00000040 /* EMC_ZCAL_WAIT_CNT */
1141 0x000 1141 0x000c000c /* EMC_MRS_WAIT_CNT */
1142 0xa0f 1142 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1143 0x000 1143 0x00000000 /* EMC_CTT */
1144 0x000 1144 0x00000000 /* EMC_CTT_DURATION */
1145 0x800 1145 0x8000040b /* EMC_DYN_SELF_REF_CONTROL */
1146 0xe80 1146 0xe8000000 /* EMC_FBIO_SPARE */
1147 0xff0 1147 0xff00ff00 /* EMC_CFG_RSV */
1148 >; 1148 >;
1149 }; 1149 };
1150 1150
1151 timing-102000000 { 1151 timing-102000000 {
1152 clock-frequen 1152 clock-frequency = <102000000>;
1153 1153
1154 nvidia,emc-au 1154 nvidia,emc-auto-cal-interval = <0x001fffff>;
1155 nvidia,emc-mo 1155 nvidia,emc-mode-1 = <0x80100003>;
1156 nvidia,emc-mo 1156 nvidia,emc-mode-2 = <0x80200008>;
1157 nvidia,emc-mo 1157 nvidia,emc-mode-reset = <0x80001221>;
1158 nvidia,emc-zc 1158 nvidia,emc-zcal-cnt-long = <0x00000040>;
1159 nvidia,emc-cf 1159 nvidia,emc-cfg-dyn-self-ref;
1160 nvidia,emc-cf 1160 nvidia,emc-cfg-periodic-qrst;
1161 1161
1162 nvidia,emc-co 1162 nvidia,emc-configuration = <
1163 0x000 1163 0x00000005 /* EMC_RC */
1164 0x000 1164 0x00000010 /* EMC_RFC */
1165 0x000 1165 0x00000003 /* EMC_RAS */
1166 0x000 1166 0x00000001 /* EMC_RP */
1167 0x000 1167 0x00000002 /* EMC_R2W */
1168 0x000 1168 0x0000000a /* EMC_W2R */
1169 0x000 1169 0x00000005 /* EMC_R2P */
1170 0x000 1170 0x0000000b /* EMC_W2P */
1171 0x000 1171 0x00000001 /* EMC_RD_RCD */
1172 0x000 1172 0x00000001 /* EMC_WR_RCD */
1173 0x000 1173 0x00000003 /* EMC_RRD */
1174 0x000 1174 0x00000001 /* EMC_REXT */
1175 0x000 1175 0x00000000 /* EMC_WEXT */
1176 0x000 1176 0x00000005 /* EMC_WDV */
1177 0x000 1177 0x00000005 /* EMC_QUSE */
1178 0x000 1178 0x00000004 /* EMC_QRST */
1179 0x000 1179 0x0000000a /* EMC_QSAFE */
1180 0x000 1180 0x0000000b /* EMC_RDV */
1181 0x000 1181 0x00000303 /* EMC_REFRESH */
1182 0x000 1182 0x00000000 /* EMC_BURST_REFRESH_NUM */
1183 0x000 1183 0x000000c0 /* EMC_PRE_REFRESH_REQ_CNT */
1184 0x000 1184 0x00000002 /* EMC_PDEX2WR */
1185 0x000 1185 0x00000002 /* EMC_PDEX2RD */
1186 0x000 1186 0x00000001 /* EMC_PCHG2PDEN */
1187 0x000 1187 0x00000000 /* EMC_ACT2PDEN */
1188 0x000 1188 0x00000007 /* EMC_AR2PDEN */
1189 0x000 1189 0x0000000f /* EMC_RW2PDEN */
1190 0x000 1190 0x00000012 /* EMC_TXSR */
1191 0x000 1191 0x00000012 /* EMC_TXSRDLL */
1192 0x000 1192 0x00000004 /* EMC_TCKE */
1193 0x000 1193 0x00000004 /* EMC_TFAW */
1194 0x000 1194 0x00000000 /* EMC_TRPAB */
1195 0x000 1195 0x00000004 /* EMC_TCLKSTABLE */
1196 0x000 1196 0x00000005 /* EMC_TCLKSTOP */
1197 0x000 1197 0x0000031c /* EMC_TREFBW */
1198 0x000 1198 0x00000006 /* EMC_QUSE_EXTRA */
1199 0x000 1199 0x00000004 /* EMC_FBIO_CFG6 */
1200 0x000 1200 0x00000000 /* EMC_ODT_WRITE */
1201 0x000 1201 0x00000000 /* EMC_ODT_READ */
1202 0x000 1202 0x00004288 /* EMC_FBIO_CFG5 */
1203 0x007 1203 0x007800a4 /* EMC_CFG_DIG_DLL */
1204 0x000 1204 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1205 0x000 1205 0x000fc000 /* EMC_DLL_XFORM_DQS0 */
1206 0x000 1206 0x000fc000 /* EMC_DLL_XFORM_DQS1 */
1207 0x000 1207 0x000fc000 /* EMC_DLL_XFORM_DQS2 */
1208 0x000 1208 0x000fc000 /* EMC_DLL_XFORM_DQS3 */
1209 0x000 1209 0x000fc000 /* EMC_DLL_XFORM_DQS4 */
1210 0x000 1210 0x000fc000 /* EMC_DLL_XFORM_DQS5 */
1211 0x000 1211 0x000fc000 /* EMC_DLL_XFORM_DQS6 */
1212 0x000 1212 0x000fc000 /* EMC_DLL_XFORM_DQS7 */
1213 0x000 1213 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1214 0x000 1214 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1215 0x000 1215 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1216 0x000 1216 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1217 0x000 1217 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1218 0x000 1218 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1219 0x000 1219 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1220 0x000 1220 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1221 0x000 1221 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1222 0x000 1222 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1223 0x000 1223 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1224 0x000 1224 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1225 0x000 1225 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1226 0x000 1226 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1227 0x000 1227 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1228 0x000 1228 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1229 0x000 1229 0x000fc000 /* EMC_DLL_XFORM_DQ0 */
1230 0x000 1230 0x000fc000 /* EMC_DLL_XFORM_DQ1 */
1231 0x000 1231 0x000fc000 /* EMC_DLL_XFORM_DQ2 */
1232 0x000 1232 0x000fc000 /* EMC_DLL_XFORM_DQ3 */
1233 0x000 1233 0x000002a0 /* EMC_XM2CMDPADCTRL */
1234 0x080 1234 0x0800211c /* EMC_XM2DQSPADCTRL2 */
1235 0x000 1235 0x00000000 /* EMC_XM2DQPADCTRL2 */
1236 0x77f 1236 0x77fff884 /* EMC_XM2CLKPADCTRL */
1237 0x01f 1237 0x01f1f108 /* EMC_XM2COMPPADCTRL */
1238 0x050 1238 0x05057404 /* EMC_XM2VTTGENPADCTRL */
1239 0x540 1239 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1240 0x080 1240 0x08000168 /* EMC_XM2QUSEPADCTRL */
1241 0x080 1241 0x08000000 /* EMC_XM2DQSPADCTRL3 */
1242 0x000 1242 0x00000802 /* EMC_CTT_TERM_CTRL */
1243 0x000 1243 0x00000000 /* EMC_ZCAL_INTERVAL */
1244 0x000 1244 0x00000040 /* EMC_ZCAL_WAIT_CNT */
1245 0x000 1245 0x000c000c /* EMC_MRS_WAIT_CNT */
1246 0xa0f 1246 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1247 0x000 1247 0x00000000 /* EMC_CTT */
1248 0x000 1248 0x00000000 /* EMC_CTT_DURATION */
1249 0x800 1249 0x80000713 /* EMC_DYN_SELF_REF_CONTROL */
1250 0xe80 1250 0xe8000000 /* EMC_FBIO_SPARE */
1251 0xff0 1251 0xff00ff00 /* EMC_CFG_RSV */
1252 >; 1252 >;
1253 }; 1253 };
1254 1254
1255 timing-204000000 { 1255 timing-204000000 {
1256 clock-frequen 1256 clock-frequency = <204000000>;
1257 1257
1258 nvidia,emc-au 1258 nvidia,emc-auto-cal-interval = <0x001fffff>;
1259 nvidia,emc-mo 1259 nvidia,emc-mode-1 = <0x80100003>;
1260 nvidia,emc-mo 1260 nvidia,emc-mode-2 = <0x80200008>;
1261 nvidia,emc-mo 1261 nvidia,emc-mode-reset = <0x80001221>;
1262 nvidia,emc-zc 1262 nvidia,emc-zcal-cnt-long = <0x00000040>;
1263 nvidia,emc-cf 1263 nvidia,emc-cfg-dyn-self-ref;
1264 nvidia,emc-cf 1264 nvidia,emc-cfg-periodic-qrst;
1265 1265
1266 nvidia,emc-co 1266 nvidia,emc-configuration = <
1267 0x000 1267 0x0000000a /* EMC_RC */
1268 0x000 1268 0x00000020 /* EMC_RFC */
1269 0x000 1269 0x00000007 /* EMC_RAS */
1270 0x000 1270 0x00000002 /* EMC_RP */
1271 0x000 1271 0x00000002 /* EMC_R2W */
1272 0x000 1272 0x0000000a /* EMC_W2R */
1273 0x000 1273 0x00000005 /* EMC_R2P */
1274 0x000 1274 0x0000000b /* EMC_W2P */
1275 0x000 1275 0x00000002 /* EMC_RD_RCD */
1276 0x000 1276 0x00000002 /* EMC_WR_RCD */
1277 0x000 1277 0x00000003 /* EMC_RRD */
1278 0x000 1278 0x00000001 /* EMC_REXT */
1279 0x000 1279 0x00000000 /* EMC_WEXT */
1280 0x000 1280 0x00000005 /* EMC_WDV */
1281 0x000 1281 0x00000005 /* EMC_QUSE */
1282 0x000 1282 0x00000004 /* EMC_QRST */
1283 0x000 1283 0x0000000a /* EMC_QSAFE */
1284 0x000 1284 0x0000000b /* EMC_RDV */
1285 0x000 1285 0x00000607 /* EMC_REFRESH */
1286 0x000 1286 0x00000000 /* EMC_BURST_REFRESH_NUM */
1287 0x000 1287 0x00000181 /* EMC_PRE_REFRESH_REQ_CNT */
1288 0x000 1288 0x00000002 /* EMC_PDEX2WR */
1289 0x000 1289 0x00000002 /* EMC_PDEX2RD */
1290 0x000 1290 0x00000001 /* EMC_PCHG2PDEN */
1291 0x000 1291 0x00000000 /* EMC_ACT2PDEN */
1292 0x000 1292 0x00000007 /* EMC_AR2PDEN */
1293 0x000 1293 0x0000000f /* EMC_RW2PDEN */
1294 0x000 1294 0x00000023 /* EMC_TXSR */
1295 0x000 1295 0x00000023 /* EMC_TXSRDLL */
1296 0x000 1296 0x00000004 /* EMC_TCKE */
1297 0x000 1297 0x00000007 /* EMC_TFAW */
1298 0x000 1298 0x00000000 /* EMC_TRPAB */
1299 0x000 1299 0x00000004 /* EMC_TCLKSTABLE */
1300 0x000 1300 0x00000005 /* EMC_TCLKSTOP */
1301 0x000 1301 0x00000638 /* EMC_TREFBW */
1302 0x000 1302 0x00000006 /* EMC_QUSE_EXTRA */
1303 0x000 1303 0x00000006 /* EMC_FBIO_CFG6 */
1304 0x000 1304 0x00000000 /* EMC_ODT_WRITE */
1305 0x000 1305 0x00000000 /* EMC_ODT_READ */
1306 0x000 1306 0x00004288 /* EMC_FBIO_CFG5 */
1307 0x004 1307 0x004400a4 /* EMC_CFG_DIG_DLL */
1308 0x000 1308 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1309 0x000 1309 0x00080000 /* EMC_DLL_XFORM_DQS0 */
1310 0x000 1310 0x00080000 /* EMC_DLL_XFORM_DQS1 */
1311 0x000 1311 0x00080000 /* EMC_DLL_XFORM_DQS2 */
1312 0x000 1312 0x00080000 /* EMC_DLL_XFORM_DQS3 */
1313 0x000 1313 0x00080000 /* EMC_DLL_XFORM_DQS4 */
1314 0x000 1314 0x00080000 /* EMC_DLL_XFORM_DQS5 */
1315 0x000 1315 0x00080000 /* EMC_DLL_XFORM_DQS6 */
1316 0x000 1316 0x00080000 /* EMC_DLL_XFORM_DQS7 */
1317 0x000 1317 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1318 0x000 1318 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1319 0x000 1319 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1320 0x000 1320 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1321 0x000 1321 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1322 0x000 1322 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1323 0x000 1323 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1324 0x000 1324 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1325 0x000 1325 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1326 0x000 1326 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1327 0x000 1327 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1328 0x000 1328 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1329 0x000 1329 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1330 0x000 1330 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1331 0x000 1331 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1332 0x000 1332 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1333 0x000 1333 0x00080000 /* EMC_DLL_XFORM_DQ0 */
1334 0x000 1334 0x00080000 /* EMC_DLL_XFORM_DQ1 */
1335 0x000 1335 0x00080000 /* EMC_DLL_XFORM_DQ2 */
1336 0x000 1336 0x00080000 /* EMC_DLL_XFORM_DQ3 */
1337 0x000 1337 0x000002a0 /* EMC_XM2CMDPADCTRL */
1338 0x080 1338 0x0800211c /* EMC_XM2DQSPADCTRL2 */
1339 0x000 1339 0x00000000 /* EMC_XM2DQPADCTRL2 */
1340 0x77f 1340 0x77fff884 /* EMC_XM2CLKPADCTRL */
1341 0x01f 1341 0x01f1f108 /* EMC_XM2COMPPADCTRL */
1342 0x050 1342 0x05057404 /* EMC_XM2VTTGENPADCTRL */
1343 0x540 1343 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1344 0x080 1344 0x08000168 /* EMC_XM2QUSEPADCTRL */
1345 0x080 1345 0x08000000 /* EMC_XM2DQSPADCTRL3 */
1346 0x000 1346 0x00000802 /* EMC_CTT_TERM_CTRL */
1347 0x000 1347 0x00020000 /* EMC_ZCAL_INTERVAL */
1348 0x000 1348 0x00000100 /* EMC_ZCAL_WAIT_CNT */
1349 0x000 1349 0x000c000c /* EMC_MRS_WAIT_CNT */
1350 0xa0f 1350 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1351 0x000 1351 0x00000000 /* EMC_CTT */
1352 0x000 1352 0x00000000 /* EMC_CTT_DURATION */
1353 0x800 1353 0x80000d22 /* EMC_DYN_SELF_REF_CONTROL */
1354 0xe80 1354 0xe8000000 /* EMC_FBIO_SPARE */
1355 0xff0 1355 0xff00ff00 /* EMC_CFG_RSV */
1356 >; 1356 >;
1357 }; 1357 };
1358 1358
1359 timing-333500000 { 1359 timing-333500000 {
1360 clock-frequen 1360 clock-frequency = <333500000>;
1361 1361
1362 nvidia,emc-au 1362 nvidia,emc-auto-cal-interval = <0x001fffff>;
1363 nvidia,emc-mo 1363 nvidia,emc-mode-1 = <0x80100002>;
1364 nvidia,emc-mo 1364 nvidia,emc-mode-2 = <0x80200000>;
1365 nvidia,emc-mo 1365 nvidia,emc-mode-reset = <0x80000321>;
1366 nvidia,emc-zc 1366 nvidia,emc-zcal-cnt-long = <0x00000040>;
1367 1367
1368 nvidia,emc-co 1368 nvidia,emc-configuration = <
1369 0x000 1369 0x0000000f /* EMC_RC */
1370 0x000 1370 0x00000034 /* EMC_RFC */
1371 0x000 1371 0x0000000a /* EMC_RAS */
1372 0x000 1372 0x00000003 /* EMC_RP */
1373 0x000 1373 0x00000003 /* EMC_R2W */
1374 0x000 1374 0x00000008 /* EMC_W2R */
1375 0x000 1375 0x00000002 /* EMC_R2P */
1376 0x000 1376 0x00000009 /* EMC_W2P */
1377 0x000 1377 0x00000003 /* EMC_RD_RCD */
1378 0x000 1378 0x00000003 /* EMC_WR_RCD */
1379 0x000 1379 0x00000002 /* EMC_RRD */
1380 0x000 1380 0x00000001 /* EMC_REXT */
1381 0x000 1381 0x00000000 /* EMC_WEXT */
1382 0x000 1382 0x00000004 /* EMC_WDV */
1383 0x000 1383 0x00000006 /* EMC_QUSE */
1384 0x000 1384 0x00000004 /* EMC_QRST */
1385 0x000 1385 0x0000000a /* EMC_QSAFE */
1386 0x000 1386 0x0000000c /* EMC_RDV */
1387 0x000 1387 0x000009e9 /* EMC_REFRESH */
1388 0x000 1388 0x00000000 /* EMC_BURST_REFRESH_NUM */
1389 0x000 1389 0x0000027a /* EMC_PRE_REFRESH_REQ_CNT */
1390 0x000 1390 0x00000001 /* EMC_PDEX2WR */
1391 0x000 1391 0x00000008 /* EMC_PDEX2RD */
1392 0x000 1392 0x00000001 /* EMC_PCHG2PDEN */
1393 0x000 1393 0x00000000 /* EMC_ACT2PDEN */
1394 0x000 1394 0x00000007 /* EMC_AR2PDEN */
1395 0x000 1395 0x0000000e /* EMC_RW2PDEN */
1396 0x000 1396 0x00000039 /* EMC_TXSR */
1397 0x000 1397 0x00000200 /* EMC_TXSRDLL */
1398 0x000 1398 0x00000004 /* EMC_TCKE */
1399 0x000 1399 0x0000000a /* EMC_TFAW */
1400 0x000 1400 0x00000000 /* EMC_TRPAB */
1401 0x000 1401 0x00000004 /* EMC_TCLKSTABLE */
1402 0x000 1402 0x00000005 /* EMC_TCLKSTOP */
1403 0x000 1403 0x00000a2a /* EMC_TREFBW */
1404 0x000 1404 0x00000000 /* EMC_QUSE_EXTRA */
1405 0x000 1405 0x00000004 /* EMC_FBIO_CFG6 */
1406 0x000 1406 0x00000000 /* EMC_ODT_WRITE */
1407 0x000 1407 0x00000000 /* EMC_ODT_READ */
1408 0x000 1408 0x00007088 /* EMC_FBIO_CFG5 */
1409 0x002 1409 0x002600a4 /* EMC_CFG_DIG_DLL */
1410 0x000 1410 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1411 0x000 1411 0x0003c000 /* EMC_DLL_XFORM_DQS0 */
1412 0x000 1412 0x0003c000 /* EMC_DLL_XFORM_DQS1 */
1413 0x000 1413 0x0003c000 /* EMC_DLL_XFORM_DQS2 */
1414 0x000 1414 0x0003c000 /* EMC_DLL_XFORM_DQS3 */
1415 0x000 1415 0x00014000 /* EMC_DLL_XFORM_DQS4 */
1416 0x000 1416 0x00014000 /* EMC_DLL_XFORM_DQS5 */
1417 0x000 1417 0x00014000 /* EMC_DLL_XFORM_DQS6 */
1418 0x000 1418 0x00014000 /* EMC_DLL_XFORM_DQS7 */
1419 0x000 1419 0x00018000 /* EMC_DLL_XFORM_QUSE0 */
1420 0x000 1420 0x00018000 /* EMC_DLL_XFORM_QUSE1 */
1421 0x000 1421 0x00018000 /* EMC_DLL_XFORM_QUSE2 */
1422 0x000 1422 0x00018000 /* EMC_DLL_XFORM_QUSE3 */
1423 0x000 1423 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1424 0x000 1424 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1425 0x000 1425 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1426 0x000 1426 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1427 0x000 1427 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1428 0x000 1428 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1429 0x000 1429 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1430 0x000 1430 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1431 0x000 1431 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1432 0x000 1432 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1433 0x000 1433 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1434 0x000 1434 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1435 0x000 1435 0x00048000 /* EMC_DLL_XFORM_DQ0 */
1436 0x000 1436 0x00048000 /* EMC_DLL_XFORM_DQ1 */
1437 0x000 1437 0x00048000 /* EMC_DLL_XFORM_DQ2 */
1438 0x000 1438 0x00048000 /* EMC_DLL_XFORM_DQ3 */
1439 0x000 1439 0x000002a0 /* EMC_XM2CMDPADCTRL */
1440 0x060 1440 0x0600013d /* EMC_XM2DQSPADCTRL2 */
1441 0x000 1441 0x00000000 /* EMC_XM2DQPADCTRL2 */
1442 0x77f 1442 0x77fff884 /* EMC_XM2CLKPADCTRL */
1443 0x01f 1443 0x01f1f508 /* EMC_XM2COMPPADCTRL */
1444 0x050 1444 0x05057404 /* EMC_XM2VTTGENPADCTRL */
1445 0x540 1445 0x54000007 /* EMC_XM2VTTGENPADCTRL2 */
1446 0x080 1446 0x080001e8 /* EMC_XM2QUSEPADCTRL */
1447 0x080 1447 0x08000021 /* EMC_XM2DQSPADCTRL3 */
1448 0x000 1448 0x00000802 /* EMC_CTT_TERM_CTRL */
1449 0x000 1449 0x00020000 /* EMC_ZCAL_INTERVAL */
1450 0x000 1450 0x00000100 /* EMC_ZCAL_WAIT_CNT */
1451 0x018 1451 0x018b000c /* EMC_MRS_WAIT_CNT */
1452 0xa0f 1452 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1453 0x000 1453 0x00000000 /* EMC_CTT */
1454 0x000 1454 0x00000000 /* EMC_CTT_DURATION */
1455 0x800 1455 0x800014d4 /* EMC_DYN_SELF_REF_CONTROL */
1456 0xf80 1456 0xf8000000 /* EMC_FBIO_SPARE */
1457 0xff0 1457 0xff00ff89 /* EMC_CFG_RSV */
1458 >; 1458 >;
1459 }; 1459 };
1460 1460
1461 timing-667000000 { 1461 timing-667000000 {
1462 clock-frequen 1462 clock-frequency = <667000000>;
1463 1463
1464 nvidia,emc-au 1464 nvidia,emc-auto-cal-interval = <0x001fffff>;
1465 nvidia,emc-mo 1465 nvidia,emc-mode-1 = <0x80100002>;
1466 nvidia,emc-mo 1466 nvidia,emc-mode-2 = <0x80200018>;
1467 nvidia,emc-mo 1467 nvidia,emc-mode-reset = <0x80000b71>;
1468 nvidia,emc-zc 1468 nvidia,emc-zcal-cnt-long = <0x00000040>;
1469 nvidia,emc-cf 1469 nvidia,emc-cfg-periodic-qrst;
1470 1470
1471 nvidia,emc-co 1471 nvidia,emc-configuration = <
1472 0x000 1472 0x00000020 /* EMC_RC */
1473 0x000 1473 0x0000006a /* EMC_RFC */
1474 0x000 1474 0x00000017 /* EMC_RAS */
1475 0x000 1475 0x00000007 /* EMC_RP */
1476 0x000 1476 0x00000005 /* EMC_R2W */
1477 0x000 1477 0x0000000c /* EMC_W2R */
1478 0x000 1478 0x00000003 /* EMC_R2P */
1479 0x000 1479 0x00000011 /* EMC_W2P */
1480 0x000 1480 0x00000007 /* EMC_RD_RCD */
1481 0x000 1481 0x00000007 /* EMC_WR_RCD */
1482 0x000 1482 0x00000002 /* EMC_RRD */
1483 0x000 1483 0x00000001 /* EMC_REXT */
1484 0x000 1484 0x00000000 /* EMC_WEXT */
1485 0x000 1485 0x00000007 /* EMC_WDV */
1486 0x000 1486 0x0000000a /* EMC_QUSE */
1487 0x000 1487 0x00000009 /* EMC_QRST */
1488 0x000 1488 0x0000000b /* EMC_QSAFE */
1489 0x000 1489 0x00000011 /* EMC_RDV */
1490 0x000 1490 0x00001412 /* EMC_REFRESH */
1491 0x000 1491 0x00000000 /* EMC_BURST_REFRESH_NUM */
1492 0x000 1492 0x00000504 /* EMC_PRE_REFRESH_REQ_CNT */
1493 0x000 1493 0x00000002 /* EMC_PDEX2WR */
1494 0x000 1494 0x0000000e /* EMC_PDEX2RD */
1495 0x000 1495 0x00000001 /* EMC_PCHG2PDEN */
1496 0x000 1496 0x00000000 /* EMC_ACT2PDEN */
1497 0x000 1497 0x0000000c /* EMC_AR2PDEN */
1498 0x000 1498 0x00000016 /* EMC_RW2PDEN */
1499 0x000 1499 0x00000072 /* EMC_TXSR */
1500 0x000 1500 0x00000200 /* EMC_TXSRDLL */
1501 0x000 1501 0x00000005 /* EMC_TCKE */
1502 0x000 1502 0x00000015 /* EMC_TFAW */
1503 0x000 1503 0x00000000 /* EMC_TRPAB */
1504 0x000 1504 0x00000006 /* EMC_TCLKSTABLE */
1505 0x000 1505 0x00000007 /* EMC_TCLKSTOP */
1506 0x000 1506 0x00001453 /* EMC_TREFBW */
1507 0x000 1507 0x0000000b /* EMC_QUSE_EXTRA */
1508 0x000 1508 0x00000006 /* EMC_FBIO_CFG6 */
1509 0x000 1509 0x00000000 /* EMC_ODT_WRITE */
1510 0x000 1510 0x00000000 /* EMC_ODT_READ */
1511 0x000 1511 0x00005088 /* EMC_FBIO_CFG5 */
1512 0xf00 1512 0xf00b0191 /* EMC_CFG_DIG_DLL */
1513 0x000 1513 0x00008000 /* EMC_CFG_DIG_DLL_PERIOD */
1514 0x000 1514 0x0000000a /* EMC_DLL_XFORM_DQS0 */
1515 0x000 1515 0x0000000a /* EMC_DLL_XFORM_DQS1 */
1516 0x000 1516 0x0000000a /* EMC_DLL_XFORM_DQS2 */
1517 0x000 1517 0x0000000a /* EMC_DLL_XFORM_DQS3 */
1518 0x000 1518 0x0000000a /* EMC_DLL_XFORM_DQS4 */
1519 0x000 1519 0x0000000a /* EMC_DLL_XFORM_DQS5 */
1520 0x000 1520 0x0000000a /* EMC_DLL_XFORM_DQS6 */
1521 0x000 1521 0x0000000a /* EMC_DLL_XFORM_DQS7 */
1522 0x000 1522 0x00000000 /* EMC_DLL_XFORM_QUSE0 */
1523 0x000 1523 0x00000000 /* EMC_DLL_XFORM_QUSE1 */
1524 0x000 1524 0x00000000 /* EMC_DLL_XFORM_QUSE2 */
1525 0x000 1525 0x00000000 /* EMC_DLL_XFORM_QUSE3 */
1526 0x000 1526 0x00000000 /* EMC_DLL_XFORM_QUSE4 */
1527 0x000 1527 0x00000000 /* EMC_DLL_XFORM_QUSE5 */
1528 0x000 1528 0x00000000 /* EMC_DLL_XFORM_QUSE6 */
1529 0x000 1529 0x00000000 /* EMC_DLL_XFORM_QUSE7 */
1530 0x000 1530 0x00000000 /* EMC_DLI_TRIM_TXDQS0 */
1531 0x000 1531 0x00000000 /* EMC_DLI_TRIM_TXDQS1 */
1532 0x000 1532 0x00000000 /* EMC_DLI_TRIM_TXDQS2 */
1533 0x000 1533 0x00000000 /* EMC_DLI_TRIM_TXDQS3 */
1534 0x000 1534 0x00000000 /* EMC_DLI_TRIM_TXDQS4 */
1535 0x000 1535 0x00000000 /* EMC_DLI_TRIM_TXDQS5 */
1536 0x000 1536 0x00000000 /* EMC_DLI_TRIM_TXDQS6 */
1537 0x000 1537 0x00000000 /* EMC_DLI_TRIM_TXDQS7 */
1538 0x000 1538 0x0000000c /* EMC_DLL_XFORM_DQ0 */
1539 0x000 1539 0x0000000c /* EMC_DLL_XFORM_DQ1 */
1540 0x000 1540 0x0000000c /* EMC_DLL_XFORM_DQ2 */
1541 0x000 1541 0x0000000c /* EMC_DLL_XFORM_DQ3 */
1542 0x000 1542 0x000002a0 /* EMC_XM2CMDPADCTRL */
1543 0x040 1543 0x0400013d /* EMC_XM2DQSPADCTRL2 */
1544 0x222 1544 0x22220000 /* EMC_XM2DQPADCTRL2 */
1545 0x77f 1545 0x77fff884 /* EMC_XM2CLKPADCTRL */
1546 0x01f 1546 0x01f1f501 /* EMC_XM2COMPPADCTRL */
1547 0x070 1547 0x07077404 /* EMC_XM2VTTGENPADCTRL */
1548 0x540 1548 0x54000000 /* EMC_XM2VTTGENPADCTRL2 */
1549 0x080 1549 0x080001e8 /* EMC_XM2QUSEPADCTRL */
1550 0x0a0 1550 0x0a000021 /* EMC_XM2DQSPADCTRL3 */
1551 0x000 1551 0x00000802 /* EMC_CTT_TERM_CTRL */
1552 0x000 1552 0x00020000 /* EMC_ZCAL_INTERVAL */
1553 0x000 1553 0x00000100 /* EMC_ZCAL_WAIT_CNT */
1554 0x015 1554 0x0155000c /* EMC_MRS_WAIT_CNT */
1555 0xa0f 1555 0xa0f10000 /* EMC_AUTO_CAL_CONFIG */
1556 0x000 1556 0x00000000 /* EMC_CTT */
1557 0x000 1557 0x00000000 /* EMC_CTT_DURATION */
1558 0x800 1558 0x800028a5 /* EMC_DYN_SELF_REF_CONTROL */
1559 0xe80 1559 0xe8000000 /* EMC_FBIO_SPARE */
1560 0xff0 1560 0xff00ff49 /* EMC_CFG_RSV */
1561 >; 1561 >;
1562 }; 1562 };
1563 }; 1563 };
1564 }; 1564 };
1565 1565
1566 opp-table-actmon { 1566 opp-table-actmon {
1567 /delete-node/ opp-750000000; 1567 /delete-node/ opp-750000000;
1568 /delete-node/ opp-800000000; 1568 /delete-node/ opp-800000000;
1569 /delete-node/ opp-900000000; 1569 /delete-node/ opp-900000000;
1570 }; 1570 };
1571 1571
1572 opp-table-emc { 1572 opp-table-emc {
1573 /delete-node/ opp-750000000-1 1573 /delete-node/ opp-750000000-1300;
1574 /delete-node/ opp-800000000-1 1574 /delete-node/ opp-800000000-1300;
1575 /delete-node/ opp-900000000-1 1575 /delete-node/ opp-900000000-1350;
1576 }; 1576 };
1577 }; 1577 };
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