1 // SPDX-License-Identifier: GPL-2.0 1 // SPDX-License-Identifier: GPL-2.0
2 2
3 #include "tegra30-asus-nexus7-grouper-common.d 3 #include "tegra30-asus-nexus7-grouper-common.dtsi"
4 #include "tegra30-asus-nexus7-tilapia-memory-t 4 #include "tegra30-asus-nexus7-tilapia-memory-timings.dtsi"
5 5
6 / { 6 / {
7 compatible = "asus,tilapia", "asus,gro 7 compatible = "asus,tilapia", "asus,grouper", "nvidia,tegra30";
8 8
9 gpio@6000d000 { 9 gpio@6000d000 {
10 init-mode-3g-hog { 10 init-mode-3g-hog {
11 gpio-hog; 11 gpio-hog;
12 gpios = <TEGRA_GPIO(D, 12 gpios = <TEGRA_GPIO(D, 2) GPIO_ACTIVE_HIGH>,
13 <TEGRA_GPIO(C, 13 <TEGRA_GPIO(C, 6) GPIO_ACTIVE_HIGH>,
14 <TEGRA_GPIO(W, 14 <TEGRA_GPIO(W, 3) GPIO_ACTIVE_HIGH>,
15 <TEGRA_GPIO(P, 15 <TEGRA_GPIO(P, 1) GPIO_ACTIVE_HIGH>,
16 <TEGRA_GPIO(X, 16 <TEGRA_GPIO(X, 5) GPIO_ACTIVE_HIGH>,
17 <TEGRA_GPIO(U, 17 <TEGRA_GPIO(U, 5) GPIO_ACTIVE_HIGH>,
18 <TEGRA_GPIO(X, 18 <TEGRA_GPIO(X, 7) GPIO_ACTIVE_HIGH>,
19 <TEGRA_GPIO(X, 19 <TEGRA_GPIO(X, 0) GPIO_ACTIVE_HIGH>,
20 <TEGRA_GPIO(EE 20 <TEGRA_GPIO(EE, 1) GPIO_ACTIVE_HIGH>,
21 <TEGRA_GPIO(Y, 21 <TEGRA_GPIO(Y, 2) GPIO_ACTIVE_HIGH>,
22 <TEGRA_GPIO(Y, 22 <TEGRA_GPIO(Y, 3) GPIO_ACTIVE_HIGH>,
23 <TEGRA_GPIO(R, 23 <TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>,
24 <TEGRA_GPIO(U, 24 <TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>,
25 <TEGRA_GPIO(U, 25 <TEGRA_GPIO(U, 3) GPIO_ACTIVE_HIGH>,
26 <TEGRA_GPIO(N, 26 <TEGRA_GPIO(N, 1) GPIO_ACTIVE_HIGH>,
27 <TEGRA_GPIO(N, 27 <TEGRA_GPIO(N, 2) GPIO_ACTIVE_HIGH>,
28 <TEGRA_GPIO(N, 28 <TEGRA_GPIO(N, 0) GPIO_ACTIVE_HIGH>,
29 <TEGRA_GPIO(N, 29 <TEGRA_GPIO(N, 3) GPIO_ACTIVE_HIGH>;
30 output-low; 30 output-low;
31 }; 31 };
32 }; 32 };
33 33
34 pinmux@70000868 { 34 pinmux@70000868 {
35 state_default: pinmux { 35 state_default: pinmux {
36 lcd_dc1_pd2 { 36 lcd_dc1_pd2 {
37 nvidia,pins = 37 nvidia,pins = "lcd_dc1_pd2";
38 nvidia,functio 38 nvidia,function = "displaya";
39 nvidia,pull = 39 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
40 nvidia,tristat 40 nvidia,tristate = <TEGRA_PIN_DISABLE>;
41 nvidia,enable- 41 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
42 }; 42 };
43 lcd_pwr2_pc6 { 43 lcd_pwr2_pc6 {
44 nvidia,pins = 44 nvidia,pins = "lcd_pwr2_pc6";
45 nvidia,functio 45 nvidia,function = "displaya";
46 nvidia,pull = 46 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
47 nvidia,tristat 47 nvidia,tristate = <TEGRA_PIN_DISABLE>;
48 nvidia,enable- 48 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
49 }; 49 };
50 spi2_cs2_n_pw3 { 50 spi2_cs2_n_pw3 {
51 nvidia,pins = 51 nvidia,pins = "spi2_cs2_n_pw3";
52 nvidia,functio 52 nvidia,function = "spi2";
53 nvidia,pull = 53 nvidia,pull = <TEGRA_PIN_PULL_UP>;
54 nvidia,tristat 54 nvidia,tristate = <TEGRA_PIN_DISABLE>;
55 nvidia,enable- 55 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
56 }; 56 };
57 dap3_din_pp1 { 57 dap3_din_pp1 {
58 nvidia,pins = 58 nvidia,pins = "dap3_din_pp1";
59 nvidia,functio 59 nvidia,function = "i2s2";
60 nvidia,pull = 60 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
61 nvidia,tristat 61 nvidia,tristate = <TEGRA_PIN_DISABLE>;
62 nvidia,enable- 62 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
63 }; 63 };
64 spi1_sck_px5 { 64 spi1_sck_px5 {
65 nvidia,pins = 65 nvidia,pins = "spi1_sck_px5";
66 nvidia,functio 66 nvidia,function = "spi1";
67 nvidia,pull = 67 nvidia,pull = <TEGRA_PIN_PULL_UP>;
68 nvidia,tristat 68 nvidia,tristate = <TEGRA_PIN_DISABLE>;
69 nvidia,enable- 69 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
70 }; 70 };
71 pu5 { 71 pu5 {
72 nvidia,pins = 72 nvidia,pins = "pu5";
73 nvidia,functio 73 nvidia,function = "pwm2";
74 nvidia,pull = 74 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
75 nvidia,tristat 75 nvidia,tristate = <TEGRA_PIN_DISABLE>;
76 nvidia,enable- 76 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
77 }; 77 };
78 spi1_miso_px7 { 78 spi1_miso_px7 {
79 nvidia,pins = 79 nvidia,pins = "spi1_miso_px7";
80 nvidia,functio 80 nvidia,function = "spi1";
81 nvidia,pull = 81 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
82 nvidia,tristat 82 nvidia,tristate = <TEGRA_PIN_DISABLE>;
83 nvidia,enable- 83 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
84 }; 84 };
85 spi2_mosi_px0 { 85 spi2_mosi_px0 {
86 nvidia,pins = 86 nvidia,pins = "spi2_mosi_px0";
87 nvidia,functio 87 nvidia,function = "spi2";
88 nvidia,pull = 88 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
89 nvidia,tristat 89 nvidia,tristate = <TEGRA_PIN_DISABLE>;
90 nvidia,enable- 90 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
91 }; 91 };
92 clk3_req_pee1 { 92 clk3_req_pee1 {
93 nvidia,pins = 93 nvidia,pins = "clk3_req_pee1";
94 nvidia,functio 94 nvidia,function = "dev3";
95 nvidia,pull = 95 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
96 nvidia,tristat 96 nvidia,tristate = <TEGRA_PIN_DISABLE>;
97 nvidia,enable- 97 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
98 }; 98 };
99 ulpi_nxt_py2 { 99 ulpi_nxt_py2 {
100 nvidia,pins = 100 nvidia,pins = "ulpi_nxt_py2";
101 nvidia,functio 101 nvidia,function = "uartd";
102 nvidia,pull = 102 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
103 nvidia,tristat 103 nvidia,tristate = <TEGRA_PIN_DISABLE>;
104 nvidia,enable- 104 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
105 }; 105 };
106 ulpi_stp_py3 { 106 ulpi_stp_py3 {
107 nvidia,pins = 107 nvidia,pins = "ulpi_stp_py3";
108 nvidia,functio 108 nvidia,function = "uartd";
109 nvidia,pull = 109 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
110 nvidia,tristat 110 nvidia,tristate = <TEGRA_PIN_DISABLE>;
111 nvidia,enable- 111 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
112 }; 112 };
113 kb_row7_pr7 { 113 kb_row7_pr7 {
114 nvidia,pins = 114 nvidia,pins = "kb_row7_pr7";
115 nvidia,functio 115 nvidia,function = "kbc";
116 nvidia,pull = 116 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
117 nvidia,tristat 117 nvidia,tristate = <TEGRA_PIN_DISABLE>;
118 nvidia,enable- 118 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
119 }; 119 };
120 pu4 { 120 pu4 {
121 nvidia,pins = 121 nvidia,pins = "pu4";
122 nvidia,functio 122 nvidia,function = "pwm1";
123 nvidia,pull = 123 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
124 nvidia,tristat 124 nvidia,tristate = <TEGRA_PIN_DISABLE>;
125 nvidia,enable- 125 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
126 }; 126 };
127 pu3 { 127 pu3 {
128 nvidia,pins = 128 nvidia,pins = "pu3";
129 nvidia,functio 129 nvidia,function = "rsvd4";
130 nvidia,pull = 130 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
131 nvidia,tristat 131 nvidia,tristate = <TEGRA_PIN_DISABLE>;
132 nvidia,enable- 132 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
133 }; 133 };
134 kb_row15_ps7 { 134 kb_row15_ps7 {
135 nvidia,pins = 135 nvidia,pins = "kb_row15_ps7";
136 nvidia,functio 136 nvidia,function = "kbc";
137 nvidia,pull = 137 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
138 nvidia,tristat 138 nvidia,tristate = <TEGRA_PIN_DISABLE>;
139 nvidia,enable- 139 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
140 }; 140 };
141 dap3_sclk_pp3 { 141 dap3_sclk_pp3 {
142 nvidia,pins = 142 nvidia,pins = "dap3_sclk_pp3";
143 nvidia,functio 143 nvidia,function = "i2s2";
144 nvidia,pull = 144 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
145 nvidia,tristat 145 nvidia,tristate = <TEGRA_PIN_DISABLE>;
146 nvidia,enable- 146 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
147 }; 147 };
148 kb_row3_pr3 { 148 kb_row3_pr3 {
149 nvidia,pins = 149 nvidia,pins = "kb_row3_pr3",
150 150 "kb_row13_ps5";
151 nvidia,functio 151 nvidia,function = "kbc";
152 nvidia,pull = 152 nvidia,pull = <TEGRA_PIN_PULL_UP>;
153 nvidia,tristat 153 nvidia,tristate = <TEGRA_PIN_DISABLE>;
154 nvidia,enable- 154 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
155 }; 155 };
156 kb_row13_ps5 { 156 kb_row13_ps5 {
157 nvidia,pins = 157 nvidia,pins = "kb_row13_ps5";
158 nvidia,functio 158 nvidia,function = "kbc";
159 nvidia,pull = 159 nvidia,pull = <TEGRA_PIN_PULL_UP>;
160 nvidia,tristat 160 nvidia,tristate = <TEGRA_PIN_DISABLE>;
161 nvidia,enable- 161 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
162 }; 162 };
163 gmi_wp_n_pc7 { 163 gmi_wp_n_pc7 {
164 nvidia,pins = 164 nvidia,pins = "gmi_wp_n_pc7",
165 165 "gmi_wait_pi7",
166 166 "gmi_cs4_n_pk2",
167 167 "gmi_cs3_n_pk4";
168 nvidia,functio 168 nvidia,function = "rsvd1";
169 nvidia,pull = 169 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
170 nvidia,tristat 170 nvidia,tristate = <TEGRA_PIN_ENABLE>;
171 nvidia,enable- 171 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
172 }; 172 };
173 gmi_cs6_n_pi3 { 173 gmi_cs6_n_pi3 {
174 nvidia,pins = 174 nvidia,pins = "gmi_cs6_n_pi3";
175 nvidia,functio 175 nvidia,function = "gmi";
176 nvidia,pull = 176 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
177 nvidia,tristat 177 nvidia,tristate = <TEGRA_PIN_ENABLE>;
178 nvidia,enable- 178 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
179 }; 179 };
180 }; 180 };
181 }; 181 };
182 182
183 i2c@7000c500 { 183 i2c@7000c500 {
184 proximity-sensor@28 { 184 proximity-sensor@28 {
185 compatible = "microchi 185 compatible = "microchip,cap1106";
186 reg = <0x28>; 186 reg = <0x28>;
187 187
188 /* 188 /*
189 * Binding doesn't sup 189 * Binding doesn't support specifying linux,input-type
190 * and this results in 190 * and this results in unwanted key-presses handled by
191 * applications, hence 191 * applications, hence keep it disabled for now.
192 */ 192 */
193 status = "disabled"; 193 status = "disabled";
194 194
195 interrupt-parent = <&g 195 interrupt-parent = <&gpio>;
196 interrupts = <TEGRA_GP 196 interrupts = <TEGRA_GPIO(R, 3) IRQ_TYPE_LEVEL_HIGH>;
197 197
198 linux,keycodes = <KEY_ 198 linux,keycodes = <KEY_RESERVED>,
199 <KEY_ 199 <KEY_RESERVED>,
200 <KEY_ 200 <KEY_RESERVED>,
201 <KEY_ 201 <KEY_RESERVED>,
202 <KEY_ 202 <KEY_RESERVED>,
203 <SW_F 203 <SW_FRONT_PROXIMITY>;
204 }; 204 };
205 205
206 nfc@2a { 206 nfc@2a {
207 compatible = "nxp,pn54 207 compatible = "nxp,pn544-i2c";
208 reg = <0x2a>; 208 reg = <0x2a>;
209 209
210 interrupt-parent = <&g 210 interrupt-parent = <&gpio>;
211 interrupts = <TEGRA_GP 211 interrupts = <TEGRA_GPIO(S, 7) IRQ_TYPE_EDGE_RISING>;
212 212
213 enable-gpios = <&gpi 213 enable-gpios = <&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
214 firmware-gpios = <&gpi 214 firmware-gpios = <&gpio TEGRA_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
215 }; 215 };
216 }; 216 };
217 217
218 display-panel { 218 display-panel {
219 enable-gpios = <&gpio TEGRA_GP 219 enable-gpios = <&gpio TEGRA_GPIO(V, 6) GPIO_ACTIVE_HIGH>;
220 220
221 panel-timing { 221 panel-timing {
222 clock-frequency = <817 222 clock-frequency = <81750000>;
223 hactive = <800>; 223 hactive = <800>;
224 vactive = <1280>; 224 vactive = <1280>;
225 hfront-porch = <64>; 225 hfront-porch = <64>;
226 hback-porch = <128>; 226 hback-porch = <128>;
227 hsync-len = <64>; 227 hsync-len = <64>;
228 vsync-len = <1>; 228 vsync-len = <1>;
229 vfront-porch = <5>; 229 vfront-porch = <5>;
230 vback-porch = <2>; 230 vback-porch = <2>;
231 }; 231 };
232 }; 232 };
233 }; 233 };
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