1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/thermal/thermal.h>
4 #include "tegra30.dtsi"
5 #include "tegra30-cpu-opp.dtsi"
6 #include "tegra30-cpu-opp-microvolt.dtsi"
7
8 /**
9 * This file contains common DT entry for all
10 * There is multiple fab version of Cardhu sta
11 * Cardhu fab version A01 and A03 are not supp
12 * A02 will have different sets of GPIOs for f
13 * Cardhu fab version A04. The Cardhu fab vers
14 * compatible with fab version A04. Based on C
15 * related dts file need to be chosen like for
16 * use tegra30-cardhu-a02.dts, Cardhu fab vers
17 * tegra30-cardhu-a04.dts.
18 * The identification of board is done in two
19 * on PCB and by reading board id eeprom.
20 * The sticker will have number like 600-81291
21 * number is the fab version like here it is 0
22 * The (downstream internal) U-Boot of Cardhu
23 * follows:
24 * BoardID: 0C5B, SKU: 0A01, Fab: 02, Rev: 45.
25 * In this Fab version is 02 i.e. A02.
26 * The BoardID I2C eeprom is interfaced throug
27 * The location 0x8 of this eeprom contains th
28 * wide.
29 */
30
31 / {
32 model = "NVIDIA Tegra30 Cardhu evaluat
33 compatible = "nvidia,cardhu", "nvidia,
34
35 aliases {
36 rtc0 = "/i2c@7000d000/tps65911
37 rtc1 = "/rtc@7000e000";
38 serial0 = &uarta;
39 serial1 = &uartc;
40 };
41
42 chosen {
43 stdout-path = "serial0:115200n
44 };
45
46 memory@80000000 {
47 reg = <0x80000000 0x40000000>;
48 };
49
50 pcie@3000 {
51 status = "okay";
52
53 /* AVDD_PEXA and VDD_PEXA inpu
54 avdd-pexb-supply = <&ldo1_reg>
55 vdd-pexb-supply = <&ldo1_reg>;
56 avdd-pex-pll-supply = <&ldo1_r
57 hvdd-pex-supply = <&pex_hvdd_3
58 vddio-pex-ctl-supply = <&sys_3
59 avdd-plle-supply = <&ldo2_reg>
60
61 pci@1,0 {
62 nvidia,num-lanes = <4>
63 };
64
65 pci@2,0 {
66 nvidia,num-lanes = <1>
67 };
68
69 pci@3,0 {
70 status = "okay";
71 nvidia,num-lanes = <1>
72 };
73 };
74
75 host1x@50000000 {
76 dc@54200000 {
77 rgb {
78 status = "okay
79
80 nvidia,panel =
81 };
82 };
83 };
84
85 pinmux@70000868 {
86 pinctrl-names = "default";
87 pinctrl-0 = <&state_default>;
88
89 state_default: pinmux {
90 sdmmc1_clk_pz0 {
91 nvidia,pins =
92 nvidia,functio
93 nvidia,pull =
94 nvidia,tristat
95 };
96 sdmmc1_cmd_pz1 {
97 nvidia,pins =
98
99
100
101
102 nvidia,functio
103 nvidia,pull =
104 nvidia,tristat
105 };
106 sdmmc3_clk_pa6 {
107 nvidia,pins =
108 nvidia,functio
109 nvidia,pull =
110 nvidia,tristat
111 };
112 sdmmc3_cmd_pa7 {
113 nvidia,pins =
114
115
116
117
118 nvidia,functio
119 nvidia,pull =
120 nvidia,tristat
121 };
122 sdmmc4_clk_pcc4 {
123 nvidia,pins =
124
125 nvidia,functio
126 nvidia,pull =
127 nvidia,tristat
128 };
129 sdmmc4_dat0_paa0 {
130 nvidia,pins =
131
132
133
134
135
136
137
138 nvidia,functio
139 nvidia,pull =
140 nvidia,tristat
141 };
142 dap2_fs_pa2 {
143 nvidia,pins =
144
145
146
147 nvidia,functio
148 nvidia,pull =
149 nvidia,tristat
150 };
151 sdio3 {
152 nvidia,pins =
153 nvidia,high-sp
154 nvidia,schmitt
155 nvidia,pull-do
156 nvidia,pull-up
157 nvidia,slew-ra
158 nvidia,slew-ra
159 };
160 uart3_txd_pw6 {
161 nvidia,pins =
162
163
164
165 nvidia,functio
166 nvidia,pull =
167 nvidia,tristat
168 };
169 };
170 };
171
172 serial@70006000 {
173 /delete-property/ dmas;
174 /delete-property/ dma-names;
175 status = "okay";
176 };
177
178 serial@70006200 {
179 compatible = "nvidia,tegra30-h
180 reset-names = "serial";
181 /delete-property/ reg-shift;
182 status = "okay";
183 };
184
185 pwm@7000a000 {
186 status = "okay";
187 };
188
189 panelddc: i2c@7000c000 {
190 status = "okay";
191 clock-frequency = <100000>;
192 };
193
194 i2c@7000c400 {
195 status = "okay";
196 clock-frequency = <100000>;
197 };
198
199 i2c@7000c500 {
200 status = "okay";
201 clock-frequency = <100000>;
202
203 /* ALS and Proximity sensor */
204 isl29028@44 {
205 compatible = "isil,isl
206 reg = <0x44>;
207 interrupt-parent = <&g
208 interrupts = <TEGRA_GP
209 };
210
211 i2cmux@70 {
212 compatible = "nxp,pca9
213 #address-cells = <1>;
214 #size-cells = <0>;
215 reg = <0x70>;
216 reset-gpios = <&gpio T
217 };
218 };
219
220 i2c@7000c700 {
221 status = "okay";
222 clock-frequency = <100000>;
223 };
224
225 i2c@7000d000 {
226 status = "okay";
227 clock-frequency = <100000>;
228
229 wm8903: wm8903@1a {
230 compatible = "wlf,wm89
231 reg = <0x1a>;
232 interrupt-parent = <&g
233 interrupts = <TEGRA_GP
234
235 gpio-controller;
236 #gpio-cells = <2>;
237
238 micdet-cfg = <0>;
239 micdet-delay = <100>;
240 gpio-cfg = <0xffffffff
241 };
242
243 pmic: tps65911@2d {
244 compatible = "ti,tps65
245 reg = <0x2d>;
246
247 interrupts = <GIC_SPI
248 #interrupt-cells = <2>
249 interrupt-controller;
250 wakeup-source;
251
252 ti,system-power-contro
253
254 #gpio-cells = <2>;
255 gpio-controller;
256
257 vcc1-supply = <&vdd_ac
258 vcc2-supply = <&vdd_ac
259 vcc3-supply = <&vio_re
260 vcc4-supply = <&vdd_5v
261 vcc5-supply = <&vdd_ac
262 vcc6-supply = <&vdd2_r
263 vcc7-supply = <&vdd_ac
264 vccio-supply = <&vdd_a
265
266 regulators {
267 vdd1_reg: vdd1
268 regula
269 regula
270 regula
271 regula
272 };
273
274 vdd2_reg: vdd2
275 regula
276 regula
277 regula
278 regula
279 };
280
281 vddctrl_reg: v
282 regula
283 regula
284 regula
285 regula
286 regula
287 regula
288 regula
289
290 nvidia
291 };
292
293 vio_reg: vio {
294 regula
295 regula
296 regula
297 regula
298 };
299
300 ldo1_reg: ldo1
301 regula
302 regula
303 regula
304 };
305
306 ldo2_reg: ldo2
307 regula
308 regula
309 regula
310 };
311
312 /* LDO3 is not
313
314 ldo4_reg: ldo4
315 regula
316 regula
317 regula
318 regula
319 };
320
321 ldo5_reg: ldo5
322 regula
323 regula
324 regula
325 regula
326 };
327
328 ldo6_reg: ldo6
329 regula
330 regula
331 regula
332 };
333
334 ldo7_reg: ldo7
335 regula
336 regula
337 regula
338 regula
339 };
340
341 ldo8_reg: ldo8
342 regula
343 regula
344 regula
345 regula
346 };
347 };
348 };
349
350 nct1008: temperature-sensor@4c
351 compatible = "onnn,nct
352 reg = <0x4c>;
353 vcc-supply = <&sys_3v3
354 interrupt-parent = <&g
355 interrupts = <TEGRA_GP
356 #thermal-sensor-cells
357 };
358
359 vdd_core: tps62361@60 {
360 compatible = "ti,tps62
361 reg = <0x60>;
362
363 regulator-name = "tps6
364 regulator-min-microvol
365 regulator-max-microvol
366 regulator-coupled-with
367 regulator-coupled-max-
368 regulator-max-step-mic
369 regulator-boot-on;
370 regulator-always-on;
371 ti,vsel0-state-high;
372 ti,vsel1-state-high;
373
374 nvidia,tegra-core-regu
375 };
376 };
377
378 spi@7000da00 {
379 status = "okay";
380 spi-max-frequency = <25000000>
381
382 flash@1 {
383 compatible = "winbond,
384 reg = <1>;
385 spi-max-frequency = <2
386 };
387 };
388
389 pmc@7000e400 {
390 status = "okay";
391 nvidia,invert-interrupt;
392 nvidia,suspend-mode = <1>;
393 nvidia,cpu-pwr-good-time = <20
394 nvidia,cpu-pwr-off-time = <200
395 nvidia,core-pwr-good-time = <3
396 nvidia,core-pwr-off-time = <0>
397 nvidia,core-power-req-active-h
398 nvidia,sys-clock-req-active-hi
399 core-supply = <&vdd_core>;
400 };
401
402 ahub@70080000 {
403 i2s@70080400 {
404 status = "okay";
405 };
406 };
407
408 mmc@78000000 {
409 status = "okay";
410 cd-gpios = <&gpio TEGRA_GPIO(I
411 wp-gpios = <&gpio TEGRA_GPIO(T
412 power-gpios = <&gpio TEGRA_GPI
413 bus-width = <4>;
414 };
415
416 mmc@78000600 {
417 status = "okay";
418 bus-width = <8>;
419 non-removable;
420 };
421
422 usb@7d008000 {
423 status = "okay";
424 };
425
426 usb-phy@7d008000 {
427 vbus-supply = <&usb3_vbus_reg>
428 status = "okay";
429 };
430
431 backlight: backlight {
432 compatible = "pwm-backlight";
433
434 enable-gpios = <&gpio TEGRA_GP
435 power-supply = <&vdd_bl_reg>;
436 pwms = <&pwm 0 5000000>;
437
438 brightness-levels = <0 4 8 16
439 default-brightness-level = <6>
440 };
441
442 clk32k_in: clock-32k {
443 compatible = "fixed-clock";
444 clock-frequency = <32768>;
445 #clock-cells = <0>;
446 };
447
448 cpus {
449 cpu0: cpu@0 {
450 cpu-supply = <&vddctrl
451 operating-points-v2 =
452 #cooling-cells = <2>;
453 };
454
455 cpu1: cpu@1 {
456 cpu-supply = <&vddctrl
457 operating-points-v2 =
458 #cooling-cells = <2>;
459 };
460
461 cpu2: cpu@2 {
462 cpu-supply = <&vddctrl
463 operating-points-v2 =
464 #cooling-cells = <2>;
465 };
466
467 cpu3: cpu@3 {
468 cpu-supply = <&vddctrl
469 operating-points-v2 =
470 #cooling-cells = <2>;
471 };
472 };
473
474 gpio-keys {
475 compatible = "gpio-keys";
476
477 key-power {
478 label = "Power";
479 interrupt-parent = <&p
480 interrupts = <2 0>;
481 linux,code = <KEY_POWE
482 debounce-interval = <1
483 wakeup-source;
484 };
485
486 key-volume-down {
487 label = "Volume Down";
488 gpios = <&gpio TEGRA_G
489 linux,code = <KEY_VOLU
490 debounce-interval = <1
491 };
492
493 key-volume-up {
494 label = "Volume Up";
495 gpios = <&gpio TEGRA_G
496 linux,code = <KEY_VOLU
497 debounce-interval = <1
498 };
499 };
500
501 panel: panel {
502 compatible = "chunghwa,claa101
503 ddc-i2c-bus = <&panelddc>;
504
505 power-supply = <&vdd_pnl1_reg>
506 enable-gpios = <&gpio TEGRA_GP
507
508 backlight = <&backlight>;
509 };
510
511 vdd_ac_bat_reg: regulator-acbat {
512 compatible = "regulator-fixed"
513 regulator-name = "vdd_ac_bat";
514 regulator-min-microvolt = <500
515 regulator-max-microvolt = <500
516 regulator-always-on;
517 };
518
519 cam_1v8_reg: regulator-cam {
520 compatible = "regulator-fixed"
521 regulator-name = "cam_1v8";
522 regulator-min-microvolt = <180
523 regulator-max-microvolt = <180
524 enable-active-high;
525 gpio = <&gpio TEGRA_GPIO(BB, 4
526 vin-supply = <&vio_reg>;
527 };
528
529 cp_5v_reg: regulator-5v0cp {
530 compatible = "regulator-fixed"
531 regulator-name = "cp_5v";
532 regulator-min-microvolt = <500
533 regulator-max-microvolt = <500
534 regulator-boot-on;
535 regulator-always-on;
536 enable-active-high;
537 gpio = <&pmic 0 GPIO_ACTIVE_HI
538 };
539
540 emmc_3v3_reg: regulator-emmc {
541 compatible = "regulator-fixed"
542 regulator-name = "emmc_3v3";
543 regulator-min-microvolt = <330
544 regulator-max-microvolt = <330
545 regulator-always-on;
546 regulator-boot-on;
547 enable-active-high;
548 gpio = <&gpio TEGRA_GPIO(D, 1)
549 vin-supply = <&sys_3v3_reg>;
550 };
551
552 modem_3v3_reg: regulator-modem {
553 compatible = "regulator-fixed"
554 regulator-name = "modem_3v3";
555 regulator-min-microvolt = <330
556 regulator-max-microvolt = <330
557 enable-active-high;
558 gpio = <&gpio TEGRA_GPIO(D, 6)
559 };
560
561 pex_hvdd_3v3_reg: regulator-pex {
562 compatible = "regulator-fixed"
563 regulator-name = "pex_hvdd_3v3
564 regulator-min-microvolt = <330
565 regulator-max-microvolt = <330
566 enable-active-high;
567 gpio = <&gpio TEGRA_GPIO(L, 7)
568 vin-supply = <&sys_3v3_reg>;
569 };
570
571 vdd_cam1_ldo_reg: regulator-cam1 {
572 compatible = "regulator-fixed"
573 regulator-name = "vdd_cam1_ldo
574 regulator-min-microvolt = <280
575 regulator-max-microvolt = <280
576 enable-active-high;
577 gpio = <&gpio TEGRA_GPIO(R, 6)
578 vin-supply = <&sys_3v3_reg>;
579 };
580
581 vdd_cam2_ldo_reg: regulator-cam2 {
582 compatible = "regulator-fixed"
583 regulator-name = "vdd_cam2_ldo
584 regulator-min-microvolt = <280
585 regulator-max-microvolt = <280
586 enable-active-high;
587 gpio = <&gpio TEGRA_GPIO(R, 7)
588 vin-supply = <&sys_3v3_reg>;
589 };
590
591 vdd_cam3_ldo_reg: regulator-cam3 {
592 compatible = "regulator-fixed"
593 regulator-name = "vdd_cam3_ldo
594 regulator-min-microvolt = <330
595 regulator-max-microvolt = <330
596 enable-active-high;
597 gpio = <&gpio TEGRA_GPIO(S, 0)
598 vin-supply = <&sys_3v3_reg>;
599 };
600
601 vdd_com_reg: regulator-com {
602 compatible = "regulator-fixed"
603 regulator-name = "vdd_com";
604 regulator-min-microvolt = <330
605 regulator-max-microvolt = <330
606 regulator-always-on;
607 regulator-boot-on;
608 enable-active-high;
609 gpio = <&gpio TEGRA_GPIO(D, 0)
610 vin-supply = <&sys_3v3_reg>;
611 };
612
613 vdd_fuse_3v3_reg: regulator-fuse {
614 compatible = "regulator-fixed"
615 regulator-name = "vdd_fuse_3v3
616 regulator-min-microvolt = <330
617 regulator-max-microvolt = <330
618 enable-active-high;
619 gpio = <&gpio TEGRA_GPIO(L, 6)
620 vin-supply = <&sys_3v3_reg>;
621 };
622
623 vdd_pnl1_reg: regulator-pnl1 {
624 compatible = "regulator-fixed"
625 regulator-name = "vdd_pnl1";
626 regulator-min-microvolt = <330
627 regulator-max-microvolt = <330
628 regulator-always-on;
629 regulator-boot-on;
630 enable-active-high;
631 gpio = <&gpio TEGRA_GPIO(L, 4)
632 vin-supply = <&sys_3v3_reg>;
633 };
634
635 vdd_vid_reg: regulator-vid {
636 compatible = "regulator-fixed"
637 regulator-name = "vddio_vid";
638 regulator-min-microvolt = <500
639 regulator-max-microvolt = <500
640 enable-active-high;
641 gpio = <&gpio TEGRA_GPIO(T, 0)
642 gpio-open-drain;
643 vin-supply = <&vdd_5v0_reg>;
644 };
645
646 sound {
647 compatible = "nvidia,tegra-aud
648 "nvidia,tegra-aud
649 nvidia,model = "NVIDIA Tegra C
650
651 nvidia,audio-routing =
652 "Headphone Jack", "HPO
653 "Headphone Jack", "HPO
654 "Int Spk", "ROP",
655 "Int Spk", "RON",
656 "Int Spk", "LOP",
657 "Int Spk", "LON",
658 "Mic Jack", "MICBIAS",
659 "IN1L", "Mic Jack";
660
661 nvidia,i2s-controller = <&tegr
662 nvidia,audio-codec = <&wm8903>
663
664 nvidia,spkr-en-gpios = <&wm890
665 nvidia,hp-det-gpios = <&gpio T
666 GPIO_ACTIVE_LOW>;
667
668 clocks = <&tegra_car TEGRA30_C
669 <&tegra_car TEGRA30_C
670 <&tegra_pmc TEGRA_PMC
671 clock-names = "pll_a", "pll_a_
672
673 assigned-clocks = <&tegra_car
674 <&tegra_pmc
675
676 assigned-clock-parents = <&teg
677 <&teg
678 };
679
680 thermal-zones {
681 cpu-thermal {
682 polling-delay-passive
683 polling-delay = <5000>
684
685 thermal-sensors = <&nc
686
687 trips {
688 trip0: cpu-ale
689 /* thr
690 temper
691 hyster
692 type =
693 };
694
695 trip1: cpu-cri
696 /* shu
697 temper
698 hyster
699 type =
700 };
701 };
702
703 cooling-maps {
704 map0 {
705 trip =
706 coolin
707
708
709
710 };
711 };
712 };
713 };
714 };
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