1 // SPDX-License-Identifier: GPL-2.0+ 1 // SPDX-License-Identifier: GPL-2.0+
2 // 2 //
3 // Copyright 2012 Sascha Hauer, Pengutronix <s. 3 // Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
4 4
5 #include <dt-bindings/gpio/gpio.h> 5 #include <dt-bindings/gpio/gpio.h>
6 #include "imx25-pinfunc.h" 6 #include "imx25-pinfunc.h"
7 7
8 / { 8 / {
9 #address-cells = <1>; 9 #address-cells = <1>;
10 #size-cells = <1>; 10 #size-cells = <1>;
11 /* 11 /*
12 * The decompressor and also some boot 12 * The decompressor and also some bootloaders rely on a
13 * pre-existing /chosen node to be ava 13 * pre-existing /chosen node to be available to insert the
14 * command line and merge other ATAGS 14 * command line and merge other ATAGS info.
15 */ 15 */
16 chosen {}; 16 chosen {};
17 17
18 aliases { 18 aliases {
19 ethernet0 = &fec; 19 ethernet0 = &fec;
20 gpio0 = &gpio1; 20 gpio0 = &gpio1;
21 gpio1 = &gpio2; 21 gpio1 = &gpio2;
22 gpio2 = &gpio3; 22 gpio2 = &gpio3;
23 gpio3 = &gpio4; 23 gpio3 = &gpio4;
24 i2c0 = &i2c1; 24 i2c0 = &i2c1;
25 i2c1 = &i2c2; 25 i2c1 = &i2c2;
26 i2c2 = &i2c3; 26 i2c2 = &i2c3;
27 mmc0 = &esdhc1; 27 mmc0 = &esdhc1;
28 mmc1 = &esdhc2; 28 mmc1 = &esdhc2;
29 pwm0 = &pwm1; 29 pwm0 = &pwm1;
30 pwm1 = &pwm2; 30 pwm1 = &pwm2;
31 pwm2 = &pwm3; 31 pwm2 = &pwm3;
32 pwm3 = &pwm4; 32 pwm3 = &pwm4;
33 serial0 = &uart1; 33 serial0 = &uart1;
34 serial1 = &uart2; 34 serial1 = &uart2;
35 serial2 = &uart3; 35 serial2 = &uart3;
36 serial3 = &uart4; 36 serial3 = &uart4;
37 serial4 = &uart5; 37 serial4 = &uart5;
38 spi0 = &spi1; 38 spi0 = &spi1;
39 spi1 = &spi2; 39 spi1 = &spi2;
40 spi2 = &spi3; 40 spi2 = &spi3;
41 usb0 = &usbotg; 41 usb0 = &usbotg;
42 usb1 = &usbhost1; 42 usb1 = &usbhost1;
43 }; 43 };
44 44
45 cpus { 45 cpus {
46 #address-cells = <1>; 46 #address-cells = <1>;
47 #size-cells = <0>; 47 #size-cells = <0>;
48 48
49 cpu@0 { 49 cpu@0 {
50 compatible = "arm,arm9 50 compatible = "arm,arm926ej-s";
51 device_type = "cpu"; 51 device_type = "cpu";
52 reg = <0>; 52 reg = <0>;
53 }; 53 };
54 }; 54 };
55 55
56 asic: asic-interrupt-controller@680000 56 asic: asic-interrupt-controller@68000000 {
57 compatible = "fsl,imx25-asic", 57 compatible = "fsl,imx25-asic", "fsl,avic";
58 interrupt-controller; 58 interrupt-controller;
59 #interrupt-cells = <1>; 59 #interrupt-cells = <1>;
60 reg = <0x68000000 0x8000000>; 60 reg = <0x68000000 0x8000000>;
61 }; 61 };
62 62
63 clocks { 63 clocks {
64 osc { 64 osc {
65 compatible = "fixed-cl 65 compatible = "fixed-clock";
66 #clock-cells = <0>; 66 #clock-cells = <0>;
67 clock-frequency = <240 67 clock-frequency = <24000000>;
68 }; 68 };
69 }; 69 };
70 70
71 usbphy0: usb-phy0 { 71 usbphy0: usb-phy0 {
72 compatible = "usb-nop-xceiv"; 72 compatible = "usb-nop-xceiv";
73 #phy-cells = <0>; 73 #phy-cells = <0>;
74 }; 74 };
75 75
76 usbphy1: usb-phy1 { 76 usbphy1: usb-phy1 {
77 compatible = "usb-nop-xceiv"; 77 compatible = "usb-nop-xceiv";
78 #phy-cells = <0>; 78 #phy-cells = <0>;
79 }; 79 };
80 80
81 soc: soc { 81 soc: soc {
82 #address-cells = <1>; 82 #address-cells = <1>;
83 #size-cells = <1>; 83 #size-cells = <1>;
84 compatible = "simple-bus"; 84 compatible = "simple-bus";
85 interrupt-parent = <&asic>; 85 interrupt-parent = <&asic>;
86 ranges; 86 ranges;
87 87
88 bus@43f00000 { /* AIPS1 */ 88 bus@43f00000 { /* AIPS1 */
89 compatible = "fsl,aips 89 compatible = "fsl,aips-bus", "simple-bus";
90 #address-cells = <1>; 90 #address-cells = <1>;
91 #size-cells = <1>; 91 #size-cells = <1>;
92 reg = <0x43f00000 0x10 92 reg = <0x43f00000 0x100000>;
93 ranges; 93 ranges;
94 94
95 aips1: bridge@43f00000 95 aips1: bridge@43f00000 {
96 compatible = " 96 compatible = "fsl,imx25-aips";
97 reg = <0x43f00 97 reg = <0x43f00000 0x4000>;
98 }; 98 };
99 99
100 i2c1: i2c@43f80000 { 100 i2c1: i2c@43f80000 {
101 #address-cells 101 #address-cells = <1>;
102 #size-cells = 102 #size-cells = <0>;
103 compatible = " 103 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
104 reg = <0x43f80 104 reg = <0x43f80000 0x4000>;
105 clocks = <&clk 105 clocks = <&clks 48>;
106 clock-names = 106 clock-names = "ipg";
107 interrupts = < 107 interrupts = <3>;
108 status = "disa 108 status = "disabled";
109 }; 109 };
110 110
111 i2c3: i2c@43f84000 { 111 i2c3: i2c@43f84000 {
112 #address-cells 112 #address-cells = <1>;
113 #size-cells = 113 #size-cells = <0>;
114 compatible = " 114 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
115 reg = <0x43f84 115 reg = <0x43f84000 0x4000>;
116 clocks = <&clk 116 clocks = <&clks 48>;
117 clock-names = 117 clock-names = "ipg";
118 interrupts = < 118 interrupts = <10>;
119 status = "disa 119 status = "disabled";
120 }; 120 };
121 121
122 can1: can@43f88000 { 122 can1: can@43f88000 {
123 compatible = " 123 compatible = "fsl,imx25-flexcan";
124 reg = <0x43f88 124 reg = <0x43f88000 0x4000>;
125 interrupts = < 125 interrupts = <43>;
126 clocks = <&clk 126 clocks = <&clks 75>, <&clks 75>;
127 clock-names = 127 clock-names = "ipg", "per";
128 status = "disa 128 status = "disabled";
129 }; 129 };
130 130
131 can2: can@43f8c000 { 131 can2: can@43f8c000 {
132 compatible = " 132 compatible = "fsl,imx25-flexcan";
133 reg = <0x43f8c 133 reg = <0x43f8c000 0x4000>;
134 interrupts = < 134 interrupts = <44>;
135 clocks = <&clk 135 clocks = <&clks 76>, <&clks 76>;
136 clock-names = 136 clock-names = "ipg", "per";
137 status = "disa 137 status = "disabled";
138 }; 138 };
139 139
140 uart1: serial@43f90000 140 uart1: serial@43f90000 {
141 compatible = " 141 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
142 reg = <0x43f90 142 reg = <0x43f90000 0x4000>;
143 interrupts = < 143 interrupts = <45>;
144 clocks = <&clk 144 clocks = <&clks 120>, <&clks 57>;
145 clock-names = 145 clock-names = "ipg", "per";
146 status = "disa 146 status = "disabled";
147 }; 147 };
148 148
149 uart2: serial@43f94000 149 uart2: serial@43f94000 {
150 compatible = " 150 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
151 reg = <0x43f94 151 reg = <0x43f94000 0x4000>;
152 interrupts = < 152 interrupts = <32>;
153 clocks = <&clk 153 clocks = <&clks 121>, <&clks 57>;
154 clock-names = 154 clock-names = "ipg", "per";
155 status = "disa 155 status = "disabled";
156 }; 156 };
157 157
158 i2c2: i2c@43f98000 { 158 i2c2: i2c@43f98000 {
159 #address-cells 159 #address-cells = <1>;
160 #size-cells = 160 #size-cells = <0>;
161 compatible = " 161 compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
162 reg = <0x43f98 162 reg = <0x43f98000 0x4000>;
163 clocks = <&clk 163 clocks = <&clks 48>;
164 clock-names = 164 clock-names = "ipg";
165 interrupts = < 165 interrupts = <4>;
166 status = "disa 166 status = "disabled";
167 }; 167 };
168 168
169 owire@43f9c000 { 169 owire@43f9c000 {
170 #address-cells 170 #address-cells = <1>;
171 #size-cells = 171 #size-cells = <0>;
172 reg = <0x43f9c 172 reg = <0x43f9c000 0x4000>;
173 clocks = <&clk 173 clocks = <&clks 51>;
174 clock-names = 174 clock-names = "";
175 interrupts = < 175 interrupts = <2>;
176 status = "disa 176 status = "disabled";
177 }; 177 };
178 178
179 spi1: spi@43fa4000 { 179 spi1: spi@43fa4000 {
180 #address-cells 180 #address-cells = <1>;
181 #size-cells = 181 #size-cells = <0>;
182 compatible = " 182 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
183 reg = <0x43fa4 183 reg = <0x43fa4000 0x4000>;
184 clocks = <&clk 184 clocks = <&clks 78>, <&clks 78>;
185 clock-names = 185 clock-names = "ipg", "per";
186 interrupts = < 186 interrupts = <14>;
187 status = "disa 187 status = "disabled";
188 }; 188 };
189 189
190 kpp: kpp@43fa8000 { 190 kpp: kpp@43fa8000 {
191 compatible = " 191 compatible = "fsl,imx25-kpp", "fsl,imx21-kpp";
192 reg = <0x43fa8 192 reg = <0x43fa8000 0x4000>;
193 clocks = <&clk 193 clocks = <&clks 102>;
194 interrupts = < 194 interrupts = <24>;
195 status = "disa 195 status = "disabled";
196 }; 196 };
197 197
198 iomuxc: iomuxc@43fac00 198 iomuxc: iomuxc@43fac000 {
199 compatible = " 199 compatible = "fsl,imx25-iomuxc";
200 reg = <0x43fac 200 reg = <0x43fac000 0x4000>;
201 }; 201 };
202 202
203 audmux: audmux@43fb000 203 audmux: audmux@43fb0000 {
204 compatible = " 204 compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
205 reg = <0x43fb0 205 reg = <0x43fb0000 0x4000>;
206 status = "disa 206 status = "disabled";
207 }; 207 };
208 }; 208 };
209 209
210 spba-bus@50000000 { 210 spba-bus@50000000 {
211 compatible = "fsl,spba 211 compatible = "fsl,spba-bus", "simple-bus";
212 #address-cells = <1>; 212 #address-cells = <1>;
213 #size-cells = <1>; 213 #size-cells = <1>;
214 reg = <0x50000000 0x40 214 reg = <0x50000000 0x40000>;
215 ranges; 215 ranges;
216 216
217 spi3: spi@50004000 { 217 spi3: spi@50004000 {
218 #address-cells 218 #address-cells = <1>;
219 #size-cells = 219 #size-cells = <0>;
220 compatible = " 220 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
221 reg = <0x50004 221 reg = <0x50004000 0x4000>;
222 interrupts = < 222 interrupts = <0>;
223 clocks = <&clk 223 clocks = <&clks 80>, <&clks 80>;
224 clock-names = 224 clock-names = "ipg", "per";
225 status = "disa 225 status = "disabled";
226 }; 226 };
227 227
228 uart4: serial@50008000 228 uart4: serial@50008000 {
229 compatible = " 229 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
230 reg = <0x50008 230 reg = <0x50008000 0x4000>;
231 interrupts = < 231 interrupts = <5>;
232 clocks = <&clk 232 clocks = <&clks 123>, <&clks 57>;
233 clock-names = 233 clock-names = "ipg", "per";
234 status = "disa 234 status = "disabled";
235 }; 235 };
236 236
237 uart3: serial@5000c000 237 uart3: serial@5000c000 {
238 compatible = " 238 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
239 reg = <0x5000c 239 reg = <0x5000c000 0x4000>;
240 interrupts = < 240 interrupts = <18>;
241 clocks = <&clk 241 clocks = <&clks 122>, <&clks 57>;
242 clock-names = 242 clock-names = "ipg", "per";
243 status = "disa 243 status = "disabled";
244 }; 244 };
245 245
246 spi2: spi@50010000 { 246 spi2: spi@50010000 {
247 #address-cells 247 #address-cells = <1>;
248 #size-cells = 248 #size-cells = <0>;
249 compatible = " 249 compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
250 reg = <0x50010 250 reg = <0x50010000 0x4000>;
251 clocks = <&clk 251 clocks = <&clks 79>, <&clks 79>;
252 clock-names = 252 clock-names = "ipg", "per";
253 interrupts = < 253 interrupts = <13>;
254 status = "disa 254 status = "disabled";
255 }; 255 };
256 256
257 ssi2: ssi@50014000 { 257 ssi2: ssi@50014000 {
258 #sound-dai-cel 258 #sound-dai-cells = <0>;
259 compatible = " 259 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
260 reg = <0x50014 260 reg = <0x50014000 0x4000>;
261 interrupts = < 261 interrupts = <11>;
262 clocks = <&clk 262 clocks = <&clks 118>;
263 clock-names = 263 clock-names = "ipg";
264 dmas = <&sdma 264 dmas = <&sdma 24 1 0>,
265 <&sdma 265 <&sdma 25 1 0>;
266 dma-names = "r 266 dma-names = "rx", "tx";
267 fsl,fifo-depth 267 fsl,fifo-depth = <15>;
268 status = "disa 268 status = "disabled";
269 }; 269 };
270 270
271 esai@50018000 { 271 esai@50018000 {
272 reg = <0x50018 272 reg = <0x50018000 0x4000>;
273 interrupts = < 273 interrupts = <7>;
274 }; 274 };
275 275
276 uart5: serial@5002c000 276 uart5: serial@5002c000 {
277 compatible = " 277 compatible = "fsl,imx25-uart", "fsl,imx21-uart";
278 reg = <0x5002c 278 reg = <0x5002c000 0x4000>;
279 interrupts = < 279 interrupts = <40>;
280 clocks = <&clk 280 clocks = <&clks 124>, <&clks 57>;
281 clock-names = 281 clock-names = "ipg", "per";
282 status = "disa 282 status = "disabled";
283 }; 283 };
284 284
285 tscadc: tscadc@5003000 285 tscadc: tscadc@50030000 {
286 compatible = " 286 compatible = "fsl,imx25-tsadc";
287 reg = <0x50030 287 reg = <0x50030000 0xc>;
288 interrupts = < 288 interrupts = <46>;
289 clocks = <&clk 289 clocks = <&clks 119>;
290 clock-names = 290 clock-names = "ipg";
291 interrupt-cont 291 interrupt-controller;
292 #interrupt-cel 292 #interrupt-cells = <1>;
293 #address-cells 293 #address-cells = <1>;
294 #size-cells = 294 #size-cells = <1>;
295 status = "disa 295 status = "disabled";
296 ranges; 296 ranges;
297 297
298 adc: adc@50030 298 adc: adc@50030800 {
299 compat 299 compatible = "fsl,imx25-gcq";
300 reg = 300 reg = <0x50030800 0x60>;
301 interr 301 interrupt-parent = <&tscadc>;
302 interr 302 interrupts = <1>;
303 #addre 303 #address-cells = <1>;
304 #size- 304 #size-cells = <0>;
305 status 305 status = "disabled";
306 }; 306 };
307 307
308 tsc: tcq@50030 308 tsc: tcq@50030400 {
309 compat 309 compatible = "fsl,imx25-tcq";
310 reg = 310 reg = <0x50030400 0x60>;
311 interr 311 interrupt-parent = <&tscadc>;
312 interr 312 interrupts = <0>;
313 fsl,wi 313 fsl,wires = <4>;
314 status 314 status = "disabled";
315 }; 315 };
316 }; 316 };
317 317
318 ssi1: ssi@50034000 { 318 ssi1: ssi@50034000 {
319 #sound-dai-cel 319 #sound-dai-cells = <0>;
320 compatible = " 320 compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
321 reg = <0x50034 321 reg = <0x50034000 0x4000>;
322 interrupts = < 322 interrupts = <12>;
323 clocks = <&clk 323 clocks = <&clks 117>;
324 clock-names = 324 clock-names = "ipg";
325 dmas = <&sdma 325 dmas = <&sdma 28 1 0>,
326 <&sdma 326 <&sdma 29 1 0>;
327 dma-names = "r 327 dma-names = "rx", "tx";
328 fsl,fifo-depth 328 fsl,fifo-depth = <15>;
329 status = "disa 329 status = "disabled";
330 }; 330 };
331 331
332 fec: ethernet@50038000 332 fec: ethernet@50038000 {
333 compatible = " 333 compatible = "fsl,imx25-fec";
334 reg = <0x50038 334 reg = <0x50038000 0x4000>;
335 interrupts = < 335 interrupts = <57>;
336 clocks = <&clk 336 clocks = <&clks 88>, <&clks 65>;
337 clock-names = 337 clock-names = "ipg", "ahb";
338 status = "disa 338 status = "disabled";
339 }; 339 };
340 }; 340 };
341 341
342 bus@53f00000 { /* AIPS2 */ 342 bus@53f00000 { /* AIPS2 */
343 compatible = "fsl,aips 343 compatible = "fsl,aips-bus", "simple-bus";
344 #address-cells = <1>; 344 #address-cells = <1>;
345 #size-cells = <1>; 345 #size-cells = <1>;
346 reg = <0x53f00000 0x10 346 reg = <0x53f00000 0x100000>;
347 ranges; 347 ranges;
348 348
349 aips2: bridge@53f00000 349 aips2: bridge@53f00000 {
350 compatible = " 350 compatible = "fsl,imx25-aips";
351 reg = <0x53f00 351 reg = <0x53f00000 0x4000>;
352 }; 352 };
353 353
354 clks: ccm@53f80000 { 354 clks: ccm@53f80000 {
355 compatible = " 355 compatible = "fsl,imx25-ccm";
356 reg = <0x53f80 356 reg = <0x53f80000 0x4000>;
357 interrupts = < 357 interrupts = <31>;
358 #clock-cells = 358 #clock-cells = <1>;
359 }; 359 };
360 360
361 gpt4: timer@53f84000 { 361 gpt4: timer@53f84000 {
362 compatible = " 362 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
363 reg = <0x53f84 363 reg = <0x53f84000 0x4000>;
364 clocks = <&clk 364 clocks = <&clks 95>, <&clks 47>;
365 clock-names = 365 clock-names = "ipg", "per";
366 interrupts = < 366 interrupts = <1>;
367 }; 367 };
368 368
369 gpt3: timer@53f88000 { 369 gpt3: timer@53f88000 {
370 compatible = " 370 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
371 reg = <0x53f88 371 reg = <0x53f88000 0x4000>;
372 clocks = <&clk 372 clocks = <&clks 94>, <&clks 47>;
373 clock-names = 373 clock-names = "ipg", "per";
374 interrupts = < 374 interrupts = <29>;
375 }; 375 };
376 376
377 gpt2: timer@53f8c000 { 377 gpt2: timer@53f8c000 {
378 compatible = " 378 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
379 reg = <0x53f8c 379 reg = <0x53f8c000 0x4000>;
380 clocks = <&clk 380 clocks = <&clks 93>, <&clks 47>;
381 clock-names = 381 clock-names = "ipg", "per";
382 interrupts = < 382 interrupts = <53>;
383 }; 383 };
384 384
385 gpt1: timer@53f90000 { 385 gpt1: timer@53f90000 {
386 compatible = " 386 compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
387 reg = <0x53f90 387 reg = <0x53f90000 0x4000>;
388 clocks = <&clk 388 clocks = <&clks 92>, <&clks 47>;
389 clock-names = 389 clock-names = "ipg", "per";
390 interrupts = < 390 interrupts = <54>;
391 }; 391 };
392 392
393 epit1: timer@53f94000 393 epit1: timer@53f94000 {
394 compatible = " 394 compatible = "fsl,imx25-epit";
395 reg = <0x53f94 395 reg = <0x53f94000 0x4000>;
396 clocks = <&clk 396 clocks = <&clks 83>, <&clks 43>;
397 clock-names = 397 clock-names = "ipg", "per";
398 interrupts = < 398 interrupts = <28>;
399 }; 399 };
400 400
401 epit2: timer@53f98000 401 epit2: timer@53f98000 {
402 compatible = " 402 compatible = "fsl,imx25-epit";
403 reg = <0x53f98 403 reg = <0x53f98000 0x4000>;
404 clocks = <&clk 404 clocks = <&clks 84>, <&clks 43>;
405 clock-names = 405 clock-names = "ipg", "per";
406 interrupts = < 406 interrupts = <27>;
407 }; 407 };
408 408
409 gpio4: gpio@53f9c000 { 409 gpio4: gpio@53f9c000 {
410 compatible = " 410 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
411 reg = <0x53f9c 411 reg = <0x53f9c000 0x4000>;
412 interrupts = < 412 interrupts = <23>;
413 gpio-controlle 413 gpio-controller;
414 #gpio-cells = 414 #gpio-cells = <2>;
415 interrupt-cont 415 interrupt-controller;
416 #interrupt-cel 416 #interrupt-cells = <2>;
417 }; 417 };
418 418
419 pwm2: pwm@53fa0000 { 419 pwm2: pwm@53fa0000 {
420 compatible = " 420 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
421 #pwm-cells = < 421 #pwm-cells = <3>;
422 reg = <0x53fa0 422 reg = <0x53fa0000 0x4000>;
423 clocks = <&clk 423 clocks = <&clks 106>, <&clks 52>;
424 clock-names = 424 clock-names = "ipg", "per";
425 interrupts = < 425 interrupts = <36>;
426 }; 426 };
427 427
428 gpio3: gpio@53fa4000 { 428 gpio3: gpio@53fa4000 {
429 compatible = " 429 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
430 reg = <0x53fa4 430 reg = <0x53fa4000 0x4000>;
431 interrupts = < 431 interrupts = <16>;
432 gpio-controlle 432 gpio-controller;
433 #gpio-cells = 433 #gpio-cells = <2>;
434 interrupt-cont 434 interrupt-controller;
435 #interrupt-cel 435 #interrupt-cells = <2>;
436 }; 436 };
437 437
438 pwm3: pwm@53fa8000 { 438 pwm3: pwm@53fa8000 {
439 compatible = " 439 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
440 #pwm-cells = < 440 #pwm-cells = <3>;
441 reg = <0x53fa8 441 reg = <0x53fa8000 0x4000>;
442 clocks = <&clk 442 clocks = <&clks 107>, <&clks 52>;
443 clock-names = 443 clock-names = "ipg", "per";
444 interrupts = < 444 interrupts = <41>;
445 }; 445 };
446 446
447 scc: crypto@53fac000 { 447 scc: crypto@53fac000 {
448 compatible = " 448 compatible = "fsl,imx25-scc";
449 reg = <0x53fac 449 reg = <0x53fac000 0x4000>;
450 clocks = <&clk 450 clocks = <&clks 111>;
451 clock-names = 451 clock-names = "ipg";
452 interrupts = < 452 interrupts = <49>, <50>;
453 interrupt-name 453 interrupt-names = "scm", "smn";
454 }; 454 };
455 455
456 rngb: rngb@53fb0000 { 456 rngb: rngb@53fb0000 {
457 compatible = " 457 compatible = "fsl,imx25-rngb";
458 reg = <0x53fb0 458 reg = <0x53fb0000 0x4000>;
459 clocks = <&clk 459 clocks = <&clks 109>;
460 interrupts = < 460 interrupts = <22>;
461 }; 461 };
462 462
463 esdhc1: mmc@53fb4000 { 463 esdhc1: mmc@53fb4000 {
464 compatible = " 464 compatible = "fsl,imx25-esdhc";
465 reg = <0x53fb4 465 reg = <0x53fb4000 0x4000>;
466 interrupts = < 466 interrupts = <9>;
467 clocks = <&clk 467 clocks = <&clks 86>, <&clks 63>, <&clks 45>;
468 clock-names = 468 clock-names = "ipg", "ahb", "per";
469 status = "disa 469 status = "disabled";
470 }; 470 };
471 471
472 esdhc2: mmc@53fb8000 { 472 esdhc2: mmc@53fb8000 {
473 compatible = " 473 compatible = "fsl,imx25-esdhc";
474 reg = <0x53fb8 474 reg = <0x53fb8000 0x4000>;
475 interrupts = < 475 interrupts = <8>;
476 clocks = <&clk 476 clocks = <&clks 87>, <&clks 64>, <&clks 46>;
477 clock-names = 477 clock-names = "ipg", "ahb", "per";
478 status = "disa 478 status = "disabled";
479 }; 479 };
480 480
481 lcdc: lcdc@53fbc000 { 481 lcdc: lcdc@53fbc000 {
482 compatible = " 482 compatible = "fsl,imx25-fb", "fsl,imx21-fb";
483 reg = <0x53fbc 483 reg = <0x53fbc000 0x4000>;
484 interrupts = < 484 interrupts = <39>;
485 clocks = <&clk 485 clocks = <&clks 103>, <&clks 66>, <&clks 49>;
486 clock-names = 486 clock-names = "ipg", "ahb", "per";
487 status = "disa 487 status = "disabled";
488 }; 488 };
489 489
490 slcdc@53fc0000 { 490 slcdc@53fc0000 {
491 reg = <0x53fc0 491 reg = <0x53fc0000 0x4000>;
492 interrupts = < 492 interrupts = <38>;
493 status = "disa 493 status = "disabled";
494 }; 494 };
495 495
496 pwm4: pwm@53fc8000 { 496 pwm4: pwm@53fc8000 {
497 compatible = " 497 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
498 #pwm-cells = < 498 #pwm-cells = <3>;
499 reg = <0x53fc8 499 reg = <0x53fc8000 0x4000>;
500 clocks = <&clk 500 clocks = <&clks 108>, <&clks 52>;
501 clock-names = 501 clock-names = "ipg", "per";
502 interrupts = < 502 interrupts = <42>;
503 }; 503 };
504 504
505 gpio1: gpio@53fcc000 { 505 gpio1: gpio@53fcc000 {
506 compatible = " 506 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
507 reg = <0x53fcc 507 reg = <0x53fcc000 0x4000>;
508 interrupts = < 508 interrupts = <52>;
509 gpio-controlle 509 gpio-controller;
510 #gpio-cells = 510 #gpio-cells = <2>;
511 interrupt-cont 511 interrupt-controller;
512 #interrupt-cel 512 #interrupt-cells = <2>;
513 }; 513 };
514 514
515 gpio2: gpio@53fd0000 { 515 gpio2: gpio@53fd0000 {
516 compatible = " 516 compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
517 reg = <0x53fd0 517 reg = <0x53fd0000 0x4000>;
518 interrupts = < 518 interrupts = <51>;
519 gpio-controlle 519 gpio-controller;
520 #gpio-cells = 520 #gpio-cells = <2>;
521 interrupt-cont 521 interrupt-controller;
522 #interrupt-cel 522 #interrupt-cells = <2>;
523 }; 523 };
524 524
525 sdma: dma-controller@5 525 sdma: dma-controller@53fd4000 {
526 compatible = " 526 compatible = "fsl,imx25-sdma";
527 reg = <0x53fd4 527 reg = <0x53fd4000 0x4000>;
528 clocks = <&clk 528 clocks = <&clks 112>, <&clks 68>;
529 clock-names = 529 clock-names = "ipg", "ahb";
530 #dma-cells = < 530 #dma-cells = <3>;
531 interrupts = < 531 interrupts = <34>;
532 fsl,sdma-ram-s 532 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin";
533 }; 533 };
534 534
535 watchdog@53fdc000 { 535 watchdog@53fdc000 {
536 compatible = " 536 compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
537 reg = <0x53fdc 537 reg = <0x53fdc000 0x4000>;
538 clocks = <&clk 538 clocks = <&clks 126>;
539 interrupts = < 539 interrupts = <55>;
540 }; 540 };
541 541
542 pwm1: pwm@53fe0000 { 542 pwm1: pwm@53fe0000 {
543 compatible = " 543 compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
544 #pwm-cells = < 544 #pwm-cells = <3>;
545 reg = <0x53fe0 545 reg = <0x53fe0000 0x4000>;
546 clocks = <&clk 546 clocks = <&clks 105>, <&clks 52>;
547 clock-names = 547 clock-names = "ipg", "per";
548 interrupts = < 548 interrupts = <26>;
549 }; 549 };
550 550
551 iim: efuse@53ff0000 { 551 iim: efuse@53ff0000 {
552 compatible = " 552 compatible = "fsl,imx25-iim";
553 reg = <0x53ff0 553 reg = <0x53ff0000 0x4000>;
554 interrupts = < 554 interrupts = <19>;
555 clocks = <&clk 555 clocks = <&clks 99>;
556 }; 556 };
557 557
558 usbotg: usb@53ff4000 { 558 usbotg: usb@53ff4000 {
559 compatible = " 559 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
560 reg = <0x53ff4 560 reg = <0x53ff4000 0x0200>;
561 interrupts = < 561 interrupts = <37>;
562 clocks = <&clk 562 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
563 clock-names = 563 clock-names = "ipg", "ahb", "per";
564 fsl,usbmisc = 564 fsl,usbmisc = <&usbmisc 0>;
565 fsl,usbphy = < 565 fsl,usbphy = <&usbphy0>;
566 phy_type = "ut 566 phy_type = "utmi";
567 dr_mode = "otg 567 dr_mode = "otg";
568 status = "disa 568 status = "disabled";
569 }; 569 };
570 570
571 usbhost1: usb@53ff4400 571 usbhost1: usb@53ff4400 {
572 compatible = " 572 compatible = "fsl,imx25-usb", "fsl,imx27-usb";
573 reg = <0x53ff4 573 reg = <0x53ff4400 0x0200>;
574 interrupts = < 574 interrupts = <35>;
575 clocks = <&clk 575 clocks = <&clks 9>, <&clks 70>, <&clks 8>;
576 clock-names = 576 clock-names = "ipg", "ahb", "per";
577 fsl,usbmisc = 577 fsl,usbmisc = <&usbmisc 1>;
578 fsl,usbphy = < 578 fsl,usbphy = <&usbphy1>;
579 maximum-speed 579 maximum-speed = "full-speed";
580 phy_type = "se 580 phy_type = "serial";
581 dr_mode = "hos 581 dr_mode = "host";
582 status = "disa 582 status = "disabled";
583 }; 583 };
584 584
585 usbmisc: usbmisc@53ff4 585 usbmisc: usbmisc@53ff4600 {
586 #index-cells = 586 #index-cells = <1>;
587 compatible = " 587 compatible = "fsl,imx25-usbmisc";
588 reg = <0x53ff4 588 reg = <0x53ff4600 0x00f>;
589 }; 589 };
590 590
591 dryice@53ffc000 { 591 dryice@53ffc000 {
592 compatible = " 592 compatible = "fsl,imx25-rtc";
593 reg = <0x53ffc 593 reg = <0x53ffc000 0x4000>;
594 clocks = <&clk 594 clocks = <&clks 81>;
595 interrupts = < 595 interrupts = <25 56>;
596 }; 596 };
597 }; 597 };
598 598
599 iram: sram@78000000 { 599 iram: sram@78000000 {
600 compatible = "mmio-sra 600 compatible = "mmio-sram";
601 reg = <0x78000000 0x20 601 reg = <0x78000000 0x20000>;
602 ranges = <0 0x78000000 602 ranges = <0 0x78000000 0x20000>;
603 #address-cells = <1>; 603 #address-cells = <1>;
604 #size-cells = <1>; 604 #size-cells = <1>;
605 }; 605 };
606 606
607 bus@80000000 { 607 bus@80000000 {
608 compatible = "fsl,emi- 608 compatible = "fsl,emi-bus", "simple-bus";
609 #address-cells = <1>; 609 #address-cells = <1>;
610 #size-cells = <1>; 610 #size-cells = <1>;
611 reg = <0x80000000 0x3b 611 reg = <0x80000000 0x3b002000>;
612 ranges; 612 ranges;
613 613
614 nfc: nand@bb000000 { 614 nfc: nand@bb000000 {
615 #address-cells 615 #address-cells = <1>;
616 #size-cells = 616 #size-cells = <1>;
617 617
618 compatible = " 618 compatible = "fsl,imx25-nand";
619 reg = <0xbb000 619 reg = <0xbb000000 0x2000>;
620 clocks = <&clk 620 clocks = <&clks 50>;
621 clock-names = 621 clock-names = "";
622 interrupts = < 622 interrupts = <33>;
623 status = "disa 623 status = "disabled";
624 }; 624 };
625 }; 625 };
626 }; 626 };
627 }; 627 };
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