1 // SPDX-License-Identifier: GPL-2.0-or-later 1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 2 /* 3 * Copyright 2013 Eukréa Electromatique <denis 3 * Copyright 2013 Eukréa Electromatique <denis@eukrea.com> 4 */ 4 */ 5 5 6 /dts-v1/; 6 /dts-v1/; 7 7 8 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/input/input.h> 10 #include "imx35-eukrea-cpuimx35.dtsi" 10 #include "imx35-eukrea-cpuimx35.dtsi" 11 11 12 / { 12 / { 13 model = "Eukrea CPUIMX35"; 13 model = "Eukrea CPUIMX35"; 14 compatible = "eukrea,mbimxsd35-baseboa 14 compatible = "eukrea,mbimxsd35-baseboard", "eukrea,cpuimx35", "fsl,imx35"; 15 15 16 gpio-keys { 16 gpio-keys { 17 compatible = "gpio-keys"; 17 compatible = "gpio-keys"; 18 pinctrl-names = "default"; 18 pinctrl-names = "default"; 19 pinctrl-0 = <&pinctrl_bp1>; 19 pinctrl-0 = <&pinctrl_bp1>; 20 20 21 button { 21 button { 22 label = "BP1"; 22 label = "BP1"; 23 gpios = <&gpio3 25 GPI 23 gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 24 linux,code = <BTN_MISC 24 linux,code = <BTN_MISC>; 25 wakeup-source; 25 wakeup-source; 26 linux,input-type = <1> 26 linux,input-type = <1>; 27 }; 27 }; 28 }; 28 }; 29 29 30 leds { 30 leds { 31 compatible = "gpio-leds"; 31 compatible = "gpio-leds"; 32 pinctrl-names = "default"; 32 pinctrl-names = "default"; 33 pinctrl-0 = <&pinctrl_led1>; 33 pinctrl-0 = <&pinctrl_led1>; 34 34 35 led1 { 35 led1 { 36 label = "led1"; 36 label = "led1"; 37 gpios = <&gpio3 29 GPI 37 gpios = <&gpio3 29 GPIO_ACTIVE_LOW>; 38 linux,default-trigger 38 linux,default-trigger = "heartbeat"; 39 }; 39 }; 40 }; 40 }; 41 41 42 sound { 42 sound { 43 compatible = "eukrea,asoc-tlv3 43 compatible = "eukrea,asoc-tlv320"; 44 eukrea,model = "imx35-eukrea-t 44 eukrea,model = "imx35-eukrea-tlv320aic23"; 45 ssi-controller = <&ssi1>; 45 ssi-controller = <&ssi1>; 46 fsl,mux-int-port = <1>; 46 fsl,mux-int-port = <1>; 47 fsl,mux-ext-port = <4>; 47 fsl,mux-ext-port = <4>; 48 }; 48 }; 49 }; 49 }; 50 50 51 &audmux { 51 &audmux { 52 pinctrl-names = "default"; 52 pinctrl-names = "default"; 53 pinctrl-0 = <&pinctrl_audmux>; 53 pinctrl-0 = <&pinctrl_audmux>; 54 status = "okay"; 54 status = "okay"; 55 }; 55 }; 56 56 57 &esdhc1 { 57 &esdhc1 { 58 pinctrl-names = "default"; 58 pinctrl-names = "default"; 59 pinctrl-0 = <&pinctrl_esdhc1>; 59 pinctrl-0 = <&pinctrl_esdhc1>; 60 cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW> 60 cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>; 61 status = "okay"; 61 status = "okay"; 62 }; 62 }; 63 63 64 &i2c1 { 64 &i2c1 { 65 tlv320aic23: codec@1a { 65 tlv320aic23: codec@1a { 66 compatible = "ti,tlv320aic23"; 66 compatible = "ti,tlv320aic23"; 67 reg = <0x1a>; 67 reg = <0x1a>; 68 }; 68 }; 69 }; 69 }; 70 70 71 &iomuxc { 71 &iomuxc { 72 imx35-eukrea { 72 imx35-eukrea { 73 pinctrl_audmux: audmuxgrp { 73 pinctrl_audmux: audmuxgrp { 74 fsl,pins = < 74 fsl,pins = < 75 MX35_PAD_STXFS 75 MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS 0x80000000 76 MX35_PAD_STXD4 76 MX35_PAD_STXD4__AUDMUX_AUD4_TXD 0x80000000 77 MX35_PAD_SRXD4 77 MX35_PAD_SRXD4__AUDMUX_AUD4_RXD 0x80000000 78 MX35_PAD_SCK4_ 78 MX35_PAD_SCK4__AUDMUX_AUD4_TXC 0x80000000 79 >; 79 >; 80 }; 80 }; 81 81 82 pinctrl_bp1: bp1grp { 82 pinctrl_bp1: bp1grp { 83 fsl,pins = <MX35_PAD_L 83 fsl,pins = <MX35_PAD_LD19__GPIO3_25 0x80000000>; 84 }; 84 }; 85 85 86 pinctrl_esdhc1: esdhc1grp { 86 pinctrl_esdhc1: esdhc1grp { 87 fsl,pins = < 87 fsl,pins = < 88 MX35_PAD_SD1_C 88 MX35_PAD_SD1_CMD__ESDHC1_CMD 0x80000000 89 MX35_PAD_SD1_C 89 MX35_PAD_SD1_CLK__ESDHC1_CLK 0x80000000 90 MX35_PAD_SD1_D 90 MX35_PAD_SD1_DATA0__ESDHC1_DAT0 0x80000000 91 MX35_PAD_SD1_D 91 MX35_PAD_SD1_DATA1__ESDHC1_DAT1 0x80000000 92 MX35_PAD_SD1_D 92 MX35_PAD_SD1_DATA2__ESDHC1_DAT2 0x80000000 93 MX35_PAD_SD1_D 93 MX35_PAD_SD1_DATA3__ESDHC1_DAT3 0x80000000 94 MX35_PAD_LD18_ 94 MX35_PAD_LD18__GPIO3_24 0x80000000 /* CD */ 95 >; 95 >; 96 }; 96 }; 97 97 98 pinctrl_led1: led1grp { 98 pinctrl_led1: led1grp { 99 fsl,pins = <MX35_PAD_L 99 fsl,pins = <MX35_PAD_LD23__GPIO3_29 0x80000000>; 100 }; 100 }; 101 101 102 pinctrl_reg_lcd_3v3: reg-lcd-3 102 pinctrl_reg_lcd_3v3: reg-lcd-3v3 { 103 fsl,pins = <MX35_PAD_D 103 fsl,pins = <MX35_PAD_D3_CLS__GPIO1_4 0x80000000>; 104 }; 104 }; 105 105 106 pinctrl_uart1: uart1grp { 106 pinctrl_uart1: uart1grp { 107 fsl,pins = < 107 fsl,pins = < 108 MX35_PAD_TXD1_ 108 MX35_PAD_TXD1__UART1_TXD_MUX 0x1c5 109 MX35_PAD_RXD1_ 109 MX35_PAD_RXD1__UART1_RXD_MUX 0x1c5 110 MX35_PAD_CTS1_ 110 MX35_PAD_CTS1__UART1_CTS 0x1c5 111 MX35_PAD_RTS1_ 111 MX35_PAD_RTS1__UART1_RTS 0x1c5 112 >; 112 >; 113 }; 113 }; 114 114 115 pinctrl_uart2: uart2grp { 115 pinctrl_uart2: uart2grp { 116 fsl,pins = < 116 fsl,pins = < 117 MX35_PAD_RXD2_ 117 MX35_PAD_RXD2__UART2_RXD_MUX 0x1c5 118 MX35_PAD_TXD2_ 118 MX35_PAD_TXD2__UART2_TXD_MUX 0x1c5 119 MX35_PAD_RTS2_ 119 MX35_PAD_RTS2__UART2_RTS 0x1c5 120 MX35_PAD_CTS2_ 120 MX35_PAD_CTS2__UART2_CTS 0x1c5 121 >; 121 >; 122 }; 122 }; 123 }; 123 }; 124 }; 124 }; 125 125 126 &ssi1 { 126 &ssi1 { 127 codec-handle = <&tlv320aic23>; 127 codec-handle = <&tlv320aic23>; 128 status = "okay"; 128 status = "okay"; 129 }; 129 }; 130 130 131 &uart1 { 131 &uart1 { 132 pinctrl-names = "default"; 132 pinctrl-names = "default"; 133 pinctrl-0 = <&pinctrl_uart1>; 133 pinctrl-0 = <&pinctrl_uart1>; 134 uart-has-rtscts; 134 uart-has-rtscts; 135 status = "okay"; 135 status = "okay"; 136 }; 136 }; 137 137 138 &uart2 { 138 &uart2 { 139 pinctrl-names = "default"; 139 pinctrl-names = "default"; 140 pinctrl-0 = <&pinctrl_uart2>; 140 pinctrl-0 = <&pinctrl_uart2>; 141 uart-has-rtscts; 141 uart-has-rtscts; 142 status = "okay"; 142 status = "okay"; 143 }; 143 }; 144 144 145 &usbhost1 { 145 &usbhost1 { 146 phy_type = "serial"; 146 phy_type = "serial"; 147 dr_mode = "host"; 147 dr_mode = "host"; 148 status = "okay"; 148 status = "okay"; 149 }; 149 }; 150 150 151 &usbotg { 151 &usbotg { 152 phy_type = "utmi"; 152 phy_type = "utmi"; 153 dr_mode = "otg"; 153 dr_mode = "otg"; 154 external-vbus-divider; 154 external-vbus-divider; 155 status = "okay"; 155 status = "okay"; 156 }; 156 };
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