1 // SPDX-License-Identifier: GPL-2.0-or-later 1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* 2 /*
3 * Copyright (C) 2013 Marek Vasut <marex@denx.d 3 * Copyright (C) 2013 Marek Vasut <marex@denx.de>
4 */ 4 */
5 5
6 /dts-v1/; 6 /dts-v1/;
7 #include "imx53-m53.dtsi" 7 #include "imx53-m53.dtsi"
8 8
9 / { 9 / {
10 model = "Aries/DENX M53EVK"; 10 model = "Aries/DENX M53EVK";
11 compatible = "aries,imx53-m53evk", "de 11 compatible = "aries,imx53-m53evk", "denx,imx53-m53evk", "fsl,imx53";
12 12
13 display1: disp1 { 13 display1: disp1 {
14 compatible = "fsl,imx-parallel 14 compatible = "fsl,imx-parallel-display";
15 interface-pix-fmt = "bgr666"; 15 interface-pix-fmt = "bgr666";
16 pinctrl-names = "default"; 16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_ipu_disp 17 pinctrl-0 = <&pinctrl_ipu_disp1>;
18 18
19 display-timings { 19 display-timings {
20 native-mode = <&timing 20 native-mode = <&timing0>;
21 timing0: timing-800x48 21 timing0: timing-800x480p60 {
22 clock-frequenc 22 clock-frequency = <31500000>;
23 hactive = <800 23 hactive = <800>;
24 vactive = <480 24 vactive = <480>;
25 hfront-porch = 25 hfront-porch = <40>;
26 hback-porch = 26 hback-porch = <88>;
27 hsync-len = <1 27 hsync-len = <128>;
28 vback-porch = 28 vback-porch = <33>;
29 vfront-porch = 29 vfront-porch = <9>;
30 vsync-len = <3 30 vsync-len = <3>;
31 vsync-active = 31 vsync-active = <1>;
32 }; 32 };
33 }; 33 };
34 34
35 port { 35 port {
36 display1_in: endpoint 36 display1_in: endpoint {
37 remote-endpoin 37 remote-endpoint = <&ipu_di1_disp1>;
38 }; 38 };
39 }; 39 };
40 }; 40 };
41 41
42 backlight { 42 backlight {
43 compatible = "pwm-backlight"; 43 compatible = "pwm-backlight";
44 pwms = <&pwm1 0 3000 0>; 44 pwms = <&pwm1 0 3000 0>;
45 brightness-levels = <0 4 8 16 45 brightness-levels = <0 4 8 16 32 64 128 255>;
46 default-brightness-level = <6> 46 default-brightness-level = <6>;
47 power-supply = <®_backlight 47 power-supply = <®_backlight>;
48 }; 48 };
49 49
50 leds { 50 leds {
51 compatible = "gpio-leds"; 51 compatible = "gpio-leds";
52 pinctrl-names = "default"; 52 pinctrl-names = "default";
53 pinctrl-0 = <&led_pin_gpio>; 53 pinctrl-0 = <&led_pin_gpio>;
54 54
55 led-user1 { 55 led-user1 {
56 label = "user1"; 56 label = "user1";
57 gpios = <&gpio2 8 0>; 57 gpios = <&gpio2 8 0>;
58 linux,default-trigger 58 linux,default-trigger = "heartbeat";
59 }; 59 };
60 60
61 led-user2 { 61 led-user2 {
62 label = "user2"; 62 label = "user2";
63 gpios = <&gpio2 9 0>; 63 gpios = <&gpio2 9 0>;
64 linux,default-trigger 64 linux,default-trigger = "heartbeat";
65 }; 65 };
66 }; 66 };
67 67
68 reg_usbh1_vbus: regulator-usbh1-vbus { 68 reg_usbh1_vbus: regulator-usbh1-vbus {
69 compatible = "regulator-fixed" 69 compatible = "regulator-fixed";
70 regulator-name = "vbus"; 70 regulator-name = "vbus";
71 regulator-min-microvolt = <500 71 regulator-min-microvolt = <5000000>;
72 regulator-max-microvolt = <500 72 regulator-max-microvolt = <5000000>;
73 gpio = <&gpio1 2 0>; 73 gpio = <&gpio1 2 0>;
74 }; 74 };
75 75
76 reg_usb_otg_vbus: regulator-usb-otg-vb 76 reg_usb_otg_vbus: regulator-usb-otg-vbus {
77 compatible = "regulator-fixed" 77 compatible = "regulator-fixed";
78 regulator-name = "usb_otg_vbus 78 regulator-name = "usb_otg_vbus";
79 regulator-min-microvolt = <500 79 regulator-min-microvolt = <5000000>;
80 regulator-max-microvolt = <500 80 regulator-max-microvolt = <5000000>;
81 gpio = <&gpio1 4 0>; 81 gpio = <&gpio1 4 0>;
82 }; 82 };
83 83
84 sound { 84 sound {
85 compatible = "fsl,imx53-m53evk 85 compatible = "fsl,imx53-m53evk-sgtl5000",
86 "fsl,imx-audio-sg 86 "fsl,imx-audio-sgtl5000";
87 model = "imx53-m53evk-sgtl5000 87 model = "imx53-m53evk-sgtl5000";
88 ssi-controller = <&ssi2>; 88 ssi-controller = <&ssi2>;
89 audio-codec = <&sgtl5000>; 89 audio-codec = <&sgtl5000>;
90 audio-routing = 90 audio-routing =
91 "MIC_IN", "Mic Jack", 91 "MIC_IN", "Mic Jack",
92 "Mic Jack", "Mic Bias" 92 "Mic Jack", "Mic Bias",
93 "LINE_IN", "Line In Ja 93 "LINE_IN", "Line In Jack",
94 "Headphone Jack", "HP_ 94 "Headphone Jack", "HP_OUT",
95 "Ext Spk", "LINE_OUT"; 95 "Ext Spk", "LINE_OUT";
96 mux-int-port = <2>; 96 mux-int-port = <2>;
97 mux-ext-port = <4>; 97 mux-ext-port = <4>;
98 }; 98 };
99 }; 99 };
100 100
101 &audmux { 101 &audmux {
102 pinctrl-names = "default"; 102 pinctrl-names = "default";
103 pinctrl-0 = <&pinctrl_audmux>; 103 pinctrl-0 = <&pinctrl_audmux>;
104 status = "okay"; 104 status = "okay";
105 }; 105 };
106 106
107 &can1 { 107 &can1 {
108 pinctrl-names = "default"; 108 pinctrl-names = "default";
109 pinctrl-0 = <&pinctrl_can1>; 109 pinctrl-0 = <&pinctrl_can1>;
110 status = "okay"; 110 status = "okay";
111 }; 111 };
112 112
113 &can2 { 113 &can2 {
114 pinctrl-names = "default"; 114 pinctrl-names = "default";
115 pinctrl-0 = <&pinctrl_can2>; 115 pinctrl-0 = <&pinctrl_can2>;
116 status = "okay"; 116 status = "okay";
117 }; 117 };
118 118
119 &esdhc1 { 119 &esdhc1 {
120 pinctrl-names = "default"; 120 pinctrl-names = "default";
121 pinctrl-0 = <&pinctrl_esdhc1>; 121 pinctrl-0 = <&pinctrl_esdhc1>;
122 cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; 122 cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
123 wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH> 123 wp-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
124 status = "okay"; 124 status = "okay";
125 }; 125 };
126 126
127 &fec { 127 &fec {
128 pinctrl-names = "default"; 128 pinctrl-names = "default";
129 pinctrl-0 = <&pinctrl_fec>; 129 pinctrl-0 = <&pinctrl_fec>;
130 phy-mode = "rmii"; 130 phy-mode = "rmii";
131 status = "okay"; 131 status = "okay";
132 }; 132 };
133 133
134 &i2c1 { 134 &i2c1 {
135 pinctrl-names = "default"; 135 pinctrl-names = "default";
136 pinctrl-0 = <&pinctrl_i2c1>; 136 pinctrl-0 = <&pinctrl_i2c1>;
137 status = "okay"; 137 status = "okay";
138 138
139 sgtl5000: codec@a { 139 sgtl5000: codec@a {
140 compatible = "fsl,sgtl5000"; 140 compatible = "fsl,sgtl5000";
141 reg = <0x0a>; 141 reg = <0x0a>;
142 #sound-dai-cells = <0>; 142 #sound-dai-cells = <0>;
143 VDDA-supply = <®_3p2v>; 143 VDDA-supply = <®_3p2v>;
144 VDDIO-supply = <®_3p2v>; 144 VDDIO-supply = <®_3p2v>;
145 clocks = <&clks IMX5_CLK_SSI_E 145 clocks = <&clks IMX5_CLK_SSI_EXT1_GATE>;
146 }; 146 };
147 }; 147 };
148 148
149 &i2c3 { 149 &i2c3 {
150 pinctrl-names = "default"; 150 pinctrl-names = "default";
151 pinctrl-0 = <&pinctrl_i2c3>; 151 pinctrl-0 = <&pinctrl_i2c3>;
152 status = "okay"; 152 status = "okay";
153 }; 153 };
154 154
155 &iomuxc { 155 &iomuxc {
156 pinctrl-names = "default"; 156 pinctrl-names = "default";
157 pinctrl-0 = <&pinctrl_hog>; 157 pinctrl-0 = <&pinctrl_hog>;
158 158
159 imx53-m53evk { 159 imx53-m53evk {
160 pinctrl_usb: usbgrp { 160 pinctrl_usb: usbgrp {
161 fsl,pins = < 161 fsl,pins = <
162 MX53_PAD_GPIO_ 162 MX53_PAD_GPIO_2__GPIO1_2 0x80000000
163 MX53_PAD_GPIO_ 163 MX53_PAD_GPIO_3__USBOH3_USBH1_OC 0x80000000
164 >; 164 >;
165 }; 165 };
166 166
167 pinctrl_usbotg: usbotggrp { 167 pinctrl_usbotg: usbotggrp {
168 fsl,pins = < 168 fsl,pins = <
169 MX53_PAD_GPIO_ 169 MX53_PAD_GPIO_4__GPIO1_4 0x000b0
170 >; 170 >;
171 }; 171 };
172 172
173 led_pin_gpio: led_gpio { 173 led_pin_gpio: led_gpio {
174 fsl,pins = < 174 fsl,pins = <
175 MX53_PAD_PATA_ 175 MX53_PAD_PATA_DATA8__GPIO2_8 0x80000000
176 MX53_PAD_PATA_ 176 MX53_PAD_PATA_DATA9__GPIO2_9 0x80000000
177 >; 177 >;
178 }; 178 };
179 179
180 pinctrl_audmux: audmuxgrp { 180 pinctrl_audmux: audmuxgrp {
181 fsl,pins = < 181 fsl,pins = <
182 MX53_PAD_SD2_D 182 MX53_PAD_SD2_DATA3__AUDMUX_AUD4_TXC 0x80000000
183 MX53_PAD_SD2_D 183 MX53_PAD_SD2_DATA2__AUDMUX_AUD4_TXD 0x80000000
184 MX53_PAD_SD2_D 184 MX53_PAD_SD2_DATA1__AUDMUX_AUD4_TXFS 0x80000000
185 MX53_PAD_SD2_D 185 MX53_PAD_SD2_DATA0__AUDMUX_AUD4_RXD 0x80000000
186 >; 186 >;
187 }; 187 };
188 188
189 pinctrl_can1: can1grp { 189 pinctrl_can1: can1grp {
190 fsl,pins = < 190 fsl,pins = <
191 MX53_PAD_GPIO_ 191 MX53_PAD_GPIO_7__CAN1_TXCAN 0x80000000
192 MX53_PAD_GPIO_ 192 MX53_PAD_GPIO_8__CAN1_RXCAN 0x80000000
193 >; 193 >;
194 }; 194 };
195 195
196 pinctrl_can2: can2grp { 196 pinctrl_can2: can2grp {
197 fsl,pins = < 197 fsl,pins = <
198 MX53_PAD_KEY_C 198 MX53_PAD_KEY_COL4__CAN2_TXCAN 0x80000000
199 MX53_PAD_KEY_R 199 MX53_PAD_KEY_ROW4__CAN2_RXCAN 0x80000000
200 >; 200 >;
201 }; 201 };
202 202
203 pinctrl_esdhc1: esdhc1grp { 203 pinctrl_esdhc1: esdhc1grp {
204 fsl,pins = < 204 fsl,pins = <
205 MX53_PAD_SD1_D 205 MX53_PAD_SD1_DATA0__ESDHC1_DAT0 0x1d5
206 MX53_PAD_SD1_D 206 MX53_PAD_SD1_DATA1__ESDHC1_DAT1 0x1d5
207 MX53_PAD_SD1_D 207 MX53_PAD_SD1_DATA2__ESDHC1_DAT2 0x1d5
208 MX53_PAD_SD1_D 208 MX53_PAD_SD1_DATA3__ESDHC1_DAT3 0x1d5
209 MX53_PAD_SD1_C 209 MX53_PAD_SD1_CMD__ESDHC1_CMD 0x1d5
210 MX53_PAD_SD1_C 210 MX53_PAD_SD1_CLK__ESDHC1_CLK 0x1d5
211 >; 211 >;
212 }; 212 };
213 213
214 pinctrl_fec: fecgrp { 214 pinctrl_fec: fecgrp {
215 fsl,pins = < 215 fsl,pins = <
216 MX53_PAD_FEC_M 216 MX53_PAD_FEC_MDC__FEC_MDC 0x80000000
217 MX53_PAD_FEC_M 217 MX53_PAD_FEC_MDIO__FEC_MDIO 0x80000000
218 MX53_PAD_FEC_R 218 MX53_PAD_FEC_REF_CLK__FEC_TX_CLK 0x80000000
219 MX53_PAD_FEC_R 219 MX53_PAD_FEC_RX_ER__FEC_RX_ER 0x80000000
220 MX53_PAD_FEC_C 220 MX53_PAD_FEC_CRS_DV__FEC_RX_DV 0x80000000
221 MX53_PAD_FEC_R 221 MX53_PAD_FEC_RXD1__FEC_RDATA_1 0x80000000
222 MX53_PAD_FEC_R 222 MX53_PAD_FEC_RXD0__FEC_RDATA_0 0x80000000
223 MX53_PAD_FEC_T 223 MX53_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000
224 MX53_PAD_FEC_T 224 MX53_PAD_FEC_TXD1__FEC_TDATA_1 0x80000000
225 MX53_PAD_FEC_T 225 MX53_PAD_FEC_TXD0__FEC_TDATA_0 0x80000000
226 >; 226 >;
227 }; 227 };
228 228
229 pinctrl_i2c1: i2c1grp { 229 pinctrl_i2c1: i2c1grp {
230 fsl,pins = < 230 fsl,pins = <
231 MX53_PAD_EIM_D 231 MX53_PAD_EIM_D21__I2C1_SCL 0xc0000000
232 MX53_PAD_EIM_D 232 MX53_PAD_EIM_D28__I2C1_SDA 0xc0000000
233 >; 233 >;
234 }; 234 };
235 235
236 pinctrl_i2c3: i2c3grp { 236 pinctrl_i2c3: i2c3grp {
237 fsl,pins = < 237 fsl,pins = <
238 MX53_PAD_GPIO_ 238 MX53_PAD_GPIO_6__I2C3_SDA 0xc0000000
239 MX53_PAD_GPIO_ 239 MX53_PAD_GPIO_5__I2C3_SCL 0xc0000000
240 >; 240 >;
241 }; 241 };
242 242
243 pinctrl_ipu_disp1: ipudisp1grp 243 pinctrl_ipu_disp1: ipudisp1grp {
244 fsl,pins = < 244 fsl,pins = <
245 MX53_PAD_EIM_D 245 MX53_PAD_EIM_DA9__IPU_DISP1_DAT_0 0x5
246 MX53_PAD_EIM_D 246 MX53_PAD_EIM_DA8__IPU_DISP1_DAT_1 0x5
247 MX53_PAD_EIM_D 247 MX53_PAD_EIM_DA7__IPU_DISP1_DAT_2 0x5
248 MX53_PAD_EIM_D 248 MX53_PAD_EIM_DA6__IPU_DISP1_DAT_3 0x5
249 MX53_PAD_EIM_D 249 MX53_PAD_EIM_DA5__IPU_DISP1_DAT_4 0x5
250 MX53_PAD_EIM_D 250 MX53_PAD_EIM_DA4__IPU_DISP1_DAT_5 0x5
251 MX53_PAD_EIM_D 251 MX53_PAD_EIM_DA3__IPU_DISP1_DAT_6 0x5
252 MX53_PAD_EIM_D 252 MX53_PAD_EIM_DA2__IPU_DISP1_DAT_7 0x5
253 MX53_PAD_EIM_D 253 MX53_PAD_EIM_DA1__IPU_DISP1_DAT_8 0x5
254 MX53_PAD_EIM_D 254 MX53_PAD_EIM_DA0__IPU_DISP1_DAT_9 0x5
255 MX53_PAD_EIM_E 255 MX53_PAD_EIM_EB1__IPU_DISP1_DAT_10 0x5
256 MX53_PAD_EIM_E 256 MX53_PAD_EIM_EB0__IPU_DISP1_DAT_11 0x5
257 MX53_PAD_EIM_A 257 MX53_PAD_EIM_A17__IPU_DISP1_DAT_12 0x5
258 MX53_PAD_EIM_A 258 MX53_PAD_EIM_A18__IPU_DISP1_DAT_13 0x5
259 MX53_PAD_EIM_A 259 MX53_PAD_EIM_A19__IPU_DISP1_DAT_14 0x5
260 MX53_PAD_EIM_A 260 MX53_PAD_EIM_A20__IPU_DISP1_DAT_15 0x5
261 MX53_PAD_EIM_A 261 MX53_PAD_EIM_A21__IPU_DISP1_DAT_16 0x5
262 MX53_PAD_EIM_A 262 MX53_PAD_EIM_A22__IPU_DISP1_DAT_17 0x5
263 MX53_PAD_EIM_A 263 MX53_PAD_EIM_A23__IPU_DISP1_DAT_18 0x5
264 MX53_PAD_EIM_A 264 MX53_PAD_EIM_A24__IPU_DISP1_DAT_19 0x5
265 MX53_PAD_EIM_D 265 MX53_PAD_EIM_D31__IPU_DISP1_DAT_20 0x5
266 MX53_PAD_EIM_D 266 MX53_PAD_EIM_D30__IPU_DISP1_DAT_21 0x5
267 MX53_PAD_EIM_D 267 MX53_PAD_EIM_D26__IPU_DISP1_DAT_22 0x5
268 MX53_PAD_EIM_D 268 MX53_PAD_EIM_D27__IPU_DISP1_DAT_23 0x5
269 MX53_PAD_EIM_A 269 MX53_PAD_EIM_A16__IPU_DI1_DISP_CLK 0x5
270 MX53_PAD_EIM_D 270 MX53_PAD_EIM_DA13__IPU_DI1_D0_CS 0x5
271 MX53_PAD_EIM_D 271 MX53_PAD_EIM_DA14__IPU_DI1_D1_CS 0x5
272 MX53_PAD_EIM_D 272 MX53_PAD_EIM_DA15__IPU_DI1_PIN1 0x5
273 MX53_PAD_EIM_D 273 MX53_PAD_EIM_DA11__IPU_DI1_PIN2 0x5
274 MX53_PAD_EIM_D 274 MX53_PAD_EIM_DA12__IPU_DI1_PIN3 0x5
275 MX53_PAD_EIM_A 275 MX53_PAD_EIM_A25__IPU_DI1_PIN12 0x5
276 MX53_PAD_EIM_D 276 MX53_PAD_EIM_DA10__IPU_DI1_PIN15 0x5
277 >; 277 >;
278 }; 278 };
279 279
280 pinctrl_pwm1: pwm1grp { 280 pinctrl_pwm1: pwm1grp {
281 fsl,pins = < 281 fsl,pins = <
282 MX53_PAD_DISP0 282 MX53_PAD_DISP0_DAT8__PWM1_PWMO 0x5
283 >; 283 >;
284 }; 284 };
285 285
286 pinctrl_uart1: uart1grp { 286 pinctrl_uart1: uart1grp {
287 fsl,pins = < 287 fsl,pins = <
288 MX53_PAD_PATA_ 288 MX53_PAD_PATA_DIOW__UART1_TXD_MUX 0x1e4
289 MX53_PAD_PATA_ 289 MX53_PAD_PATA_DMACK__UART1_RXD_MUX 0x1e4
290 >; 290 >;
291 }; 291 };
292 292
293 pinctrl_uart2: uart2grp { 293 pinctrl_uart2: uart2grp {
294 fsl,pins = < 294 fsl,pins = <
295 MX53_PAD_PATA_ 295 MX53_PAD_PATA_BUFFER_EN__UART2_RXD_MUX 0x1e4
296 MX53_PAD_PATA_ 296 MX53_PAD_PATA_DMARQ__UART2_TXD_MUX 0x1e4
297 >; 297 >;
298 }; 298 };
299 299
300 pinctrl_uart3: uart3grp { 300 pinctrl_uart3: uart3grp {
301 fsl,pins = < 301 fsl,pins = <
302 MX53_PAD_PATA_ 302 MX53_PAD_PATA_CS_0__UART3_TXD_MUX 0x1e4
303 MX53_PAD_PATA_ 303 MX53_PAD_PATA_CS_1__UART3_RXD_MUX 0x1e4
304 MX53_PAD_PATA_ 304 MX53_PAD_PATA_DA_1__UART3_CTS 0x1e4
305 MX53_PAD_PATA_ 305 MX53_PAD_PATA_DA_2__UART3_RTS 0x1e4
306 >; 306 >;
307 }; 307 };
308 }; 308 };
309 }; 309 };
310 310
311 &ipu_di1_disp1 { 311 &ipu_di1_disp1 {
312 remote-endpoint = <&display1_in>; 312 remote-endpoint = <&display1_in>;
313 }; 313 };
314 314
315 &pwm1 { 315 &pwm1 {
316 pinctrl-names = "default"; 316 pinctrl-names = "default";
317 pinctrl-0 = <&pinctrl_pwm1>; 317 pinctrl-0 = <&pinctrl_pwm1>;
318 status = "okay"; 318 status = "okay";
319 }; 319 };
320 320
321 &sata { 321 &sata {
322 status = "okay"; 322 status = "okay";
323 }; 323 };
324 324
325 &ssi2 { 325 &ssi2 {
326 status = "okay"; 326 status = "okay";
327 }; 327 };
328 328
329 &uart1 { 329 &uart1 {
330 pinctrl-names = "default"; 330 pinctrl-names = "default";
331 pinctrl-0 = <&pinctrl_uart1>; 331 pinctrl-0 = <&pinctrl_uart1>;
332 status = "okay"; 332 status = "okay";
333 }; 333 };
334 334
335 &uart2 { 335 &uart2 {
336 pinctrl-names = "default"; 336 pinctrl-names = "default";
337 pinctrl-0 = <&pinctrl_uart2>; 337 pinctrl-0 = <&pinctrl_uart2>;
338 status = "okay"; 338 status = "okay";
339 }; 339 };
340 340
341 &uart3 { 341 &uart3 {
342 pinctrl-names = "default"; 342 pinctrl-names = "default";
343 pinctrl-0 = <&pinctrl_uart3>; 343 pinctrl-0 = <&pinctrl_uart3>;
344 status = "okay"; 344 status = "okay";
345 }; 345 };
346 346
347 &usbh1 { 347 &usbh1 {
348 pinctrl-names = "default"; 348 pinctrl-names = "default";
349 pinctrl-0 = <&pinctrl_usb>; 349 pinctrl-0 = <&pinctrl_usb>;
350 vbus-supply = <®_usbh1_vbus>; 350 vbus-supply = <®_usbh1_vbus>;
351 phy_type = "utmi"; 351 phy_type = "utmi";
352 status = "okay"; 352 status = "okay";
353 }; 353 };
354 354
355 &usbotg { 355 &usbotg {
356 pinctrl-names = "default"; 356 pinctrl-names = "default";
357 pinctrl-0 = <&pinctrl_usbotg>; 357 pinctrl-0 = <&pinctrl_usbotg>;
358 dr_mode = "otg"; 358 dr_mode = "otg";
359 vbus-supply = <®_usb_otg_vbus>; 359 vbus-supply = <®_usb_otg_vbus>;
360 disable-over-current; 360 disable-over-current;
361 status = "okay"; 361 status = "okay";
362 }; 362 };
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